Re: [Intel-gfx] [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake.

2010-08-05 Thread Zhenyu Wang 
On 2010.08.05 09:05:15 +0100, Chris Wilson wrote:
 
 Please illuminate the poor ignorant fool (that's me) what the requirements
 for eDP are. Even better in patch form. ;-)
 
 Does eDP require panel fitting always?

yeah, you can see recently added panel fitting support for eDP, it
should be same as LVDS actually. I think if you duplicate
intel_pch_lvds_mode_fixup() for eDP, that should also work. ;)

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[Intel-gfx] [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake.

2010-08-05 Thread Chris Wilson 
v2: Hook in DP paths to keep FULLSCREEN panel fitting on eDP.

Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Zhenyu Wang zhen...@linux.intel.com
---
 drivers/gpu/drm/i915/Makefile|1 +
 drivers/gpu/drm/i915/i915_drv.h  |2 +
 drivers/gpu/drm/i915/intel_display.c |   16 ++---
 drivers/gpu/drm/i915/intel_dp.c  |   20 ++-
 drivers/gpu/drm/i915/intel_drv.h |7 ++
 drivers/gpu/drm/i915/intel_lvds.c|   32 +++---
 drivers/gpu/drm/i915/intel_panel.c   |  111 ++
 7 files changed, 143 insertions(+), 46 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_panel.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 384fd45..5c8e534 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -19,6 +19,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
  intel_hdmi.o \
  intel_sdvo.o \
  intel_modes.o \
+ intel_panel.o \
  intel_i2c.o \
  intel_fb.o \
  intel_tv.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ad8dab5..6da15d8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -610,6 +610,8 @@ typedef struct drm_i915_private {
struct sdvo_device_mapping sdvo_mappings[2];
/* indicate whether the LVDS_BORDER should be enabled or not */
unsigned int lvds_border_bits;
+   /* Panel fitter placement and size for Ironlake+ */
+   u32 pch_pf_pos, pch_pf_size;
 
struct drm_crtc *plane_to_crtc_mapping[2];
struct drm_crtc *pipe_to_crtc_mapping[2];
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 07f893f..9b5fab4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1914,15 +1914,13 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, 
int mode)
/* Enable panel fitting for LVDS */
if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)
|| HAS_eDP || intel_pch_has_edp(crtc)) {
-   temp = I915_READ(pf_ctl_reg);
-   I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | 
PF_FILTER_MED_3x3);
-
-   /* currently full aspect */
-   I915_WRITE(pf_win_pos, 0);
-
-   I915_WRITE(pf_win_size,
-  (dev_priv-panel_fixed_mode-hdisplay  16) 
|
-  (dev_priv-panel_fixed_mode-vdisplay));
+   if (dev_priv-pch_pf_size) {
+   temp = I915_READ(pf_ctl_reg);
+   I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | 
PF_FILTER_MED_3x3);
+   I915_WRITE(pf_win_pos, dev_priv-pch_pf_pos);
+   I915_WRITE(pf_win_size, dev_priv-pch_pf_size);
+   } else
+   I915_WRITE(pf_ctl_reg, temp  ~PF_ENABLE);
}
 
/* Enable CPU pipe */
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c4c5868..cee5d9c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -523,21 +523,9 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct 
drm_display_mode *mode,
 
if ((IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) 
dev_priv-panel_fixed_mode) {
-   struct drm_display_mode *fixed_mode = 
dev_priv-panel_fixed_mode;
-
-   adjusted_mode-hdisplay = fixed_mode-hdisplay;
-   adjusted_mode-hsync_start = fixed_mode-hsync_start;
-   adjusted_mode-hsync_end = fixed_mode-hsync_end;
-   adjusted_mode-htotal = fixed_mode-htotal;
-
-   adjusted_mode-vdisplay = fixed_mode-vdisplay;
-   adjusted_mode-vsync_start = fixed_mode-vsync_start;
-   adjusted_mode-vsync_end = fixed_mode-vsync_end;
-   adjusted_mode-vtotal = fixed_mode-vtotal;
-
-   adjusted_mode-clock = fixed_mode-clock;
-   drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
-
+   intel_fixed_panel_mode(dev_priv-panel_fixed_mode, 
adjusted_mode);
+   intel_pch_panel_fitting(dev, DRM_MODE_SCALE_FULLSCREEN,
+   mode, adjusted_mode);
/*
 * the mode-clock is used to calculate the DataLink M/N
 * of the pipe. For the eDP the fixed clock should be used.
@@ -572,8 +560,10 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct 
drm_display_mode *mode,
  count %d clock %d\n,
  intel_dp-link_bw, intel_dp-lane_count,
  adjusted_mode-clock);
+
return true;
}
+
return false;
 }
 
diff --git

Re: [Intel-gfx] [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake.

2010-08-05 Thread Zhenyu Wang 
On 2010.08.05 11:25:26 +0100, Chris Wilson wrote:
 v2: Hook in DP paths to keep FULLSCREEN panel fitting on eDP.
 

Looks fine to me. 

Reviewed-by: Zhenyu Wang zhen...@linux.intel.com

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[Intel-gfx] [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake.

2010-08-04 Thread Chris Wilson 
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
 drivers/gpu/drm/i915/i915_drv.h  |2 +
 drivers/gpu/drm/i915/intel_display.c |   16 +++
 drivers/gpu/drm/i915/intel_lvds.c|   70 --
 3 files changed, 75 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ad8dab5..6da15d8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -610,6 +610,8 @@ typedef struct drm_i915_private {
struct sdvo_device_mapping sdvo_mappings[2];
/* indicate whether the LVDS_BORDER should be enabled or not */
unsigned int lvds_border_bits;
+   /* Panel fitter placement and size for Ironlake+ */
+   u32 pch_pf_pos, pch_pf_size;
 
struct drm_crtc *plane_to_crtc_mapping[2];
struct drm_crtc *pipe_to_crtc_mapping[2];
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 07f893f..9b5fab4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1914,15 +1914,13 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, 
int mode)
/* Enable panel fitting for LVDS */
if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)
|| HAS_eDP || intel_pch_has_edp(crtc)) {
-   temp = I915_READ(pf_ctl_reg);
-   I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | 
PF_FILTER_MED_3x3);
-
-   /* currently full aspect */
-   I915_WRITE(pf_win_pos, 0);
-
-   I915_WRITE(pf_win_size,
-  (dev_priv-panel_fixed_mode-hdisplay  16) 
|
-  (dev_priv-panel_fixed_mode-vdisplay));
+   if (dev_priv-pch_pf_size) {
+   temp = I915_READ(pf_ctl_reg);
+   I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | 
PF_FILTER_MED_3x3);
+   I915_WRITE(pf_win_pos, dev_priv-pch_pf_pos);
+   I915_WRITE(pf_win_size, dev_priv-pch_pf_size);
+   } else
+   I915_WRITE(pf_ctl_reg, temp  ~PF_ENABLE);
}
 
/* Enable CPU pipe */
diff --git a/drivers/gpu/drm/i915/intel_lvds.c 
b/drivers/gpu/drm/i915/intel_lvds.c
index 312ac30..abbe32e 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -218,6 +218,68 @@ static inline u32 panel_fitter_scaling(u32 source, u32 
target)
return (FACTOR * ratio + FACTOR/2) / FACTOR;
 }
 
+static bool
+intel_pch_lvds_mode_fixup(struct intel_lvds *intel_lvds,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+   struct drm_device *dev = intel_lvds-base.enc.dev;
+   struct drm_i915_private *dev_priv = dev-dev_private;
+   struct drm_display_mode *fixed_mode = dev_priv-panel_fixed_mode;
+   int x, y, width, height;
+
+   x = y = width = height = 0;
+
+   /* Native modes don't need fitting */
+   if (adjusted_mode-hdisplay == mode-hdisplay 
+   adjusted_mode-vdisplay == mode-vdisplay)
+   goto done;
+
+   switch (intel_lvds-fitting_mode) {
+   case DRM_MODE_SCALE_CENTER:
+   width = mode-hdisplay;
+   height = mode-vdisplay;
+   x = (fixed_mode-hdisplay - width + 1)/2;
+   y = (fixed_mode-vdisplay - height + 1)/2;
+   break;
+
+   case DRM_MODE_SCALE_ASPECT:
+   /* Scale but preserve the aspect ratio */
+   {
+   u32 scaled_width = fixed_mode-hdisplay * 
mode-vdisplay;
+   u32 scaled_height = mode-hdisplay * 
fixed_mode-vdisplay;
+   if (scaled_width  scaled_height) { /* pillar */
+   width = scaled_height / mode-vdisplay;
+   x = (fixed_mode-hdisplay - width + 1) / 2;
+   y = 0;
+   height = fixed_mode-vdisplay;
+   } else if (scaled_width  scaled_height) { /* letter */
+   height = scaled_width / mode-hdisplay;
+   y = (fixed_mode-vdisplay - height + 1) / 2;
+   x = 0;
+   width = fixed_mode-hdisplay;
+   } else {
+   x = y = 0;
+   width = fixed_mode-hdisplay;
+   height = fixed_mode-vdisplay;
+   }
+   }
+   break;
+
+   default:
+   case DRM_MODE_SCALE_FULLSCREEN:
+   x = y = 0;
+   width = fixed_mode-hdisplay;
+   height = fixed_mode-vdisplay;
+

Re: [Intel-gfx] [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake.

2010-08-04 Thread Zhenyu Wang 
On 2010.08.04 15:04:01 +0100, Chris Wilson wrote:
 Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
 ---
  drivers/gpu/drm/i915/i915_drv.h  |2 +
  drivers/gpu/drm/i915/intel_display.c |   16 +++
  drivers/gpu/drm/i915/intel_lvds.c|   70 
 --
  3 files changed, 75 insertions(+), 13 deletions(-)
 
 diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
 index ad8dab5..6da15d8 100644
 --- a/drivers/gpu/drm/i915/i915_drv.h
 +++ b/drivers/gpu/drm/i915/i915_drv.h
 @@ -610,6 +610,8 @@ typedef struct drm_i915_private {
   struct sdvo_device_mapping sdvo_mappings[2];
   /* indicate whether the LVDS_BORDER should be enabled or not */
   unsigned int lvds_border_bits;
 + /* Panel fitter placement and size for Ironlake+ */
 + u32 pch_pf_pos, pch_pf_size;
  
   struct drm_crtc *plane_to_crtc_mapping[2];
   struct drm_crtc *pipe_to_crtc_mapping[2];
 diff --git a/drivers/gpu/drm/i915/intel_display.c 
 b/drivers/gpu/drm/i915/intel_display.c
 index 07f893f..9b5fab4 100644
 --- a/drivers/gpu/drm/i915/intel_display.c
 +++ b/drivers/gpu/drm/i915/intel_display.c
 @@ -1914,15 +1914,13 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, 
 int mode)
   /* Enable panel fitting for LVDS */
   if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)
   || HAS_eDP || intel_pch_has_edp(crtc)) {
 - temp = I915_READ(pf_ctl_reg);
 - I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | 
 PF_FILTER_MED_3x3);
 -
 - /* currently full aspect */
 - I915_WRITE(pf_win_pos, 0);
 -
 - I915_WRITE(pf_win_size,
 -(dev_priv-panel_fixed_mode-hdisplay  16) 
 |
 -(dev_priv-panel_fixed_mode-vdisplay));
 + if (dev_priv-pch_pf_size) {
 + temp = I915_READ(pf_ctl_reg);
 + I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | 
 PF_FILTER_MED_3x3);
 + I915_WRITE(pf_win_pos, dev_priv-pch_pf_pos);
 + I915_WRITE(pf_win_size, dev_priv-pch_pf_size);
 + } else
 + I915_WRITE(pf_ctl_reg, temp  ~PF_ENABLE);
   }

So this breaks panel fitting setting on eDP...


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[Intel-gfx] [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake.

2010-07-21 Thread Chris Wilson 
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
 drivers/gpu/drm/i915/i915_drv.h  |2 +
 drivers/gpu/drm/i915/intel_display.c |   16 +++
 drivers/gpu/drm/i915/intel_lvds.c|   70 --
 3 files changed, 75 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 57d24f8..0e7bf85 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -599,6 +599,8 @@ typedef struct drm_i915_private {
struct sdvo_device_mapping sdvo_mappings[2];
/* indicate whether the LVDS_BORDER should be enabled or not */
unsigned int lvds_border_bits;
+   /* Panel fitter placement and size for Ironlake+ */
+   u32 pch_pf_pos, pch_pf_size;
 
struct drm_crtc *plane_to_crtc_mapping[2];
struct drm_crtc *pipe_to_crtc_mapping[2];
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index d56184c..d476752 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1918,15 +1918,13 @@ static int ironlake_crtc_dpms(struct drm_crtc *crtc, 
int mode)
 
/* Enable panel fitting for LVDS */
if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-   temp = I915_READ(pf_ctl_reg);
-   I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | 
PF_FILTER_MED_3x3);
-
-   /* currently full aspect */
-   I915_WRITE(pf_win_pos, 0);
-
-   I915_WRITE(pf_win_size,
-  (dev_priv-panel_fixed_mode-hdisplay  16) 
|
-  (dev_priv-panel_fixed_mode-vdisplay));
+   if (dev_priv-pch_pf_size) {
+   temp = I915_READ(pf_ctl_reg);
+   I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | 
PF_FILTER_MED_3x3);
+   I915_WRITE(pf_win_pos, dev_priv-pch_pf_pos);
+   I915_WRITE(pf_win_size, dev_priv-pch_pf_size);
+   } else
+   I915_WRITE(pf_ctl_reg, temp  ~PF_ENABLE);
}
 
/* Enable CPU pipe */
diff --git a/drivers/gpu/drm/i915/intel_lvds.c 
b/drivers/gpu/drm/i915/intel_lvds.c
index 6b399e0..56d233d 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -215,6 +215,68 @@ static inline u32 panel_fitter_scaling(u32 source, u32 
target)
return (FACTOR * ratio + FACTOR/2) / FACTOR;
 }
 
+static bool
+intel_pch_lvds_mode_fixup(struct intel_lvds *intel_lvds,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+   struct drm_device *dev = intel_lvds-base.enc.dev;
+   struct drm_i915_private *dev_priv = dev-dev_private;
+   struct drm_display_mode *fixed_mode = dev_priv-panel_fixed_mode;
+   int x, y, width, height;
+
+   x = y = width = height = 0;
+
+   /* Native modes don't need fitting */
+   if (adjusted_mode-hdisplay == mode-hdisplay 
+   adjusted_mode-vdisplay == mode-vdisplay)
+   goto done;
+
+   switch (intel_lvds-fitting_mode) {
+   case DRM_MODE_SCALE_CENTER:
+   width = mode-hdisplay;
+   height = mode-vdisplay;
+   x = (fixed_mode-hdisplay - width + 1)/2;
+   y = (fixed_mode-vdisplay - height + 1)/2;
+   break;
+
+   case DRM_MODE_SCALE_ASPECT:
+   /* Scale but preserve the aspect ratio */
+   {
+   u32 scaled_width = fixed_mode-hdisplay * 
mode-vdisplay;
+   u32 scaled_height = mode-hdisplay * 
fixed_mode-vdisplay;
+   if (scaled_width  scaled_height) { /* pillar */
+   width = scaled_height / mode-vdisplay;
+   x = (fixed_mode-hdisplay - width + 1) / 2;
+   y = 0;
+   height = fixed_mode-vdisplay;
+   } else if (scaled_width  scaled_height) { /* letter */
+   height = scaled_width / mode-hdisplay;
+   y = (fixed_mode-vdisplay - height + 1) / 2;
+   x = 0;
+   width = fixed_mode-hdisplay;
+   } else {
+   x = y = 0;
+   width = fixed_mode-hdisplay;
+   height = fixed_mode-vdisplay;
+   }
+   }
+   break;
+
+   default:
+   case DRM_MODE_SCALE_FULLSCREEN:
+   x = y = 0;
+   width = fixed_mode-hdisplay;
+   height = fixed_mode-vdisplay;
+   break;
+   }
+
+done:
+   dev_priv-pch_pf_pos =