Re: [Intel-gfx] [PATCH] drm/i915: handle shared framebuffers when flipping

2010-07-26 Thread Jesse Barnes
On Fri, 23 Jul 2010 12:13:07 -0700
Jesse Barnes jbar...@virtuousgeek.org wrote:

 On Fri, 23 Jul 2010 12:03:37 -0700
 Jesse Barnes jbar...@virtuousgeek.org wrote:
 
  If a framebuffer is shared across CRTCs, the x,y position of one of them
  is likely to be something other than the origin (e.g. for extended
  desktop configs).  So calculate the offset at flip time so such
  configurations can work.
  
  Fixes https://bugs.freedesktop.org/show_bug.cgi?id=28518.
  
  Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
 
 This needs a
 
 Cc: sta...@kernel.org
 
 too.  thanks.

And some tested bys:

Tested-by: Thomas M. tmezza...@gmail.com
Tested-by: fangxun xunx.f...@intel.com

-- 
Jesse Barnes, Intel Open Source Technology Center
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[Intel-gfx] [PATCH] drm/i915: handle shared framebuffers when flipping

2010-07-23 Thread Jesse Barnes
If a framebuffer is shared across CRTCs, the x,y position of one of them
is likely to be something other than the origin (e.g. for extended
desktop configs).  So calculate the offset at flip time so such
configurations can work.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=28518.

Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
 drivers/gpu/drm/i915/intel_display.c |   10 +++---
 1 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 8359c50..cf5a91d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4863,7 +4863,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
struct drm_gem_object *obj;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_unpin_work *work;
-   unsigned long flags;
+   unsigned long flags, offset;
int pipesrc_reg = (intel_crtc-pipe == 0) ? PIPEASRC : PIPEBSRC;
int ret, pipesrc;
u32 flip_mask;
@@ -4925,19 +4925,23 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
while (I915_READ(ISR)  flip_mask)
;
 
+   /* Offset into the new buffer for cases of shared fbs between CRTCs */
+   offset = obj_priv-gtt_offset;
+   offset += (crtc-y * fb-pitch) + (crtc-x * (fb-bits_per_pixel) / 8);
+
BEGIN_LP_RING(4);
if (IS_I965G(dev)) {
OUT_RING(MI_DISPLAY_FLIP |
 MI_DISPLAY_FLIP_PLANE(intel_crtc-plane));
OUT_RING(fb-pitch);
-   OUT_RING(obj_priv-gtt_offset | obj_priv-tiling_mode);
+   OUT_RING(offset | obj_priv-tiling_mode);
pipesrc = I915_READ(pipesrc_reg); 
OUT_RING(pipesrc  0x0fff0fff);
} else {
OUT_RING(MI_DISPLAY_FLIP_I915 |
 MI_DISPLAY_FLIP_PLANE(intel_crtc-plane));
OUT_RING(fb-pitch);
-   OUT_RING(obj_priv-gtt_offset);
+   OUT_RING(offset);
OUT_RING(MI_NOOP);
}
ADVANCE_LP_RING();
-- 
1.7.0.4

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