Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-22 Thread Ville Syrjälä
On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote: > On HSW at least (still testing other platforms, but should be harmless > elsewhere), the DSL reg reads back as 0 when read around vblank start > time. This ends up confusing the atomic start/end checking code, since > it causes the

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-15 Thread Jesse Barnes
On 09/10/2015 03:33 PM, Ville Syrjälä wrote: > On Thu, Sep 10, 2015 at 02:57:32PM -0700, Jesse Barnes wrote: >> On 09/10/2015 02:53 PM, Ville Syrjälä wrote: >>> On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote: On HSW at least (still testing other platforms, but should be harmless

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-14 Thread Ville Syrjälä
On Mon, Sep 14, 2015 at 11:10:04AM +0200, Daniel Vetter wrote: > On Fri, Sep 11, 2015 at 01:33:08AM +0300, Ville Syrjälä wrote: > > On Thu, Sep 10, 2015 at 02:57:32PM -0700, Jesse Barnes wrote: > > > On 09/10/2015 02:53 PM, Ville Syrjälä wrote: > > > > On Thu, Sep 10, 2015 at 02:38:53PM -0700,

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-14 Thread Daniel Vetter
On Mon, Sep 14, 2015 at 04:02:44PM +0300, Ville Syrjälä wrote: > On Mon, Sep 14, 2015 at 11:10:04AM +0200, Daniel Vetter wrote: > > On Fri, Sep 11, 2015 at 01:33:08AM +0300, Ville Syrjälä wrote: > > > On Thu, Sep 10, 2015 at 02:57:32PM -0700, Jesse Barnes wrote: > > > > On 09/10/2015 02:53 PM,

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-14 Thread Ville Syrjälä
On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote: > On HSW at least (still testing other platforms, but should be harmless > elsewhere), the DSL reg reads back as 0 when read around vblank start > time. This ends up confusing the atomic start/end checking code, since > it causes the

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-14 Thread Daniel Vetter
On Fri, Sep 11, 2015 at 01:33:08AM +0300, Ville Syrjälä wrote: > On Thu, Sep 10, 2015 at 02:57:32PM -0700, Jesse Barnes wrote: > > On 09/10/2015 02:53 PM, Ville Syrjälä wrote: > > > On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote: > > >> On HSW at least (still testing other platforms,

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-10 Thread Ville Syrjälä
On Thu, Sep 10, 2015 at 02:57:32PM -0700, Jesse Barnes wrote: > On 09/10/2015 02:53 PM, Ville Syrjälä wrote: > > On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote: > >> On HSW at least (still testing other platforms, but should be harmless > >> elsewhere), the DSL reg reads back as 0

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-10 Thread Ville Syrjälä
On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote: > On HSW at least (still testing other platforms, but should be harmless > elsewhere), the DSL reg reads back as 0 when read around vblank start > time. This ends up confusing the atomic start/end checking code, since > it causes the

Re: [Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-10 Thread Jesse Barnes
On 09/10/2015 02:53 PM, Ville Syrjälä wrote: > On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote: >> On HSW at least (still testing other platforms, but should be harmless >> elsewhere), the DSL reg reads back as 0 when read around vblank start >> time. This ends up confusing the

[Intel-gfx] [PATCH] drm/i915: workaround bad DSL readout v2

2015-09-10 Thread Jesse Barnes
On HSW at least (still testing other platforms, but should be harmless elsewhere), the DSL reg reads back as 0 when read around vblank start time. This ends up confusing the atomic start/end checking code, since it causes the update to appear as if it crossed a frame count boundary. Avoid the