Re: [Intel-gfx] [PATCH 04/10] drm/i915/chv: Added CHV specific register read and write

2014-05-16 Thread Mika Kuoppala
deepa...@linux.intel.com writes: From: Deepak S deepa...@linux.intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write function to habdle difference between registers that are sadowed vs those that need forcewake even for writes.

[Intel-gfx] [PATCH 04/10] drm/i915/chv: Added CHV specific register read and write

2014-05-05 Thread deepak . s
From: Deepak S deepa...@linux.intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write function to habdle difference between registers that are sadowed vs those that need forcewake even for writes. v2: Drop write FIFO for CHV and add comman

Re: [Intel-gfx] [PATCH 04/10] drm/i915/chv: Added CHV specific register read and write

2014-05-04 Thread Deepak S
Thanks Ben. Apologies for delayed response. I am incorporating the review comment changes next set of patch review. On Saturday 26 April 2014 03:24 AM, Ben Widawsky wrote: On Mon, Apr 21, 2014 at 01:34:08PM +0530, deepa...@linux.intel.com wrote: From: Deepak S deepa...@linux.intel.com

Re: [Intel-gfx] [PATCH 04/10] drm/i915/chv: Added CHV specific register read and write

2014-04-25 Thread Ben Widawsky
On Mon, Apr 21, 2014 at 01:34:08PM +0530, deepa...@linux.intel.com wrote: From: Deepak S deepa...@linux.intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write function to habdle difference between registers that are sadowed vs those

[Intel-gfx] [PATCH 04/10] drm/i915/chv: Added CHV specific register read and write

2014-04-21 Thread deepak . s
From: Deepak S deepa...@linux.intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write function to habdle difference between registers that are sadowed vs those that need forcewake even for writes. v2: Drop write FIFO for CHV and add comman