Re: [Intel-gfx] [PATCH 1/2] drm/i915/psr: Ensure panel granularity aligns with DSC slice height
On Wed, Nov 02, 2022 at 07:45:43PM +0200, Jouni Högander wrote: > Do not enable psr2 if panel ganularity is not aligned with DSC slice > height when DSC is enabled > > Cc: José Roberto de Souza > Cc: Mika Kahola > > Signed-off-by: Jouni Högander This check against DSC makes sense since we have seen issues otherwise Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/display/intel_psr.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index e11b0592055f..57575b5c6d48 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -779,6 +779,7 @@ static bool psr2_granularity_check(struct intel_dp > *intel_dp, > struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > + const struct drm_dsc_config *vdsc_cfg = _state->dsc.config; > const int crtc_hdisplay = crtc_state->hw.adjusted_mode.crtc_hdisplay; > const int crtc_vdisplay = crtc_state->hw.adjusted_mode.crtc_vdisplay; > u16 y_granularity = 0; > @@ -809,6 +810,10 @@ static bool psr2_granularity_check(struct intel_dp > *intel_dp, > if (y_granularity == 0 || crtc_vdisplay % y_granularity) > return false; > > + if (crtc_state->dsc.compression_enable && > + vdsc_cfg->slice_height % y_granularity) > + return false; > + > crtc_state->su_y_granularity = y_granularity; > return true; > } > -- > 2.34.1 >
Re: [Intel-gfx] [PATCH 1/2] drm/i915/psr: Ensure panel granularity aligns with DSC slice height
On Wed, 2022-11-02 at 19:45 +0200, Jouni Högander wrote: > Do not enable psr2 if panel ganularity is not aligned with DSC slice > height when DSC is enabled > Reviewed-by: José Roberto de Souza > Cc: José Roberto de Souza > Cc: Mika Kahola > > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_psr.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index e11b0592055f..57575b5c6d48 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -779,6 +779,7 @@ static bool psr2_granularity_check(struct intel_dp > *intel_dp, > struct intel_crtc_state *crtc_state) > { > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > + const struct drm_dsc_config *vdsc_cfg = _state->dsc.config; > const int crtc_hdisplay = crtc_state->hw.adjusted_mode.crtc_hdisplay; > const int crtc_vdisplay = crtc_state->hw.adjusted_mode.crtc_vdisplay; > u16 y_granularity = 0; > @@ -809,6 +810,10 @@ static bool psr2_granularity_check(struct intel_dp > *intel_dp, > if (y_granularity == 0 || crtc_vdisplay % y_granularity) > return false; > > + if (crtc_state->dsc.compression_enable && > + vdsc_cfg->slice_height % y_granularity) > + return false; > + > crtc_state->su_y_granularity = y_granularity; > return true; > }
[Intel-gfx] [PATCH 1/2] drm/i915/psr: Ensure panel granularity aligns with DSC slice height
Do not enable psr2 if panel ganularity is not aligned with DSC slice height when DSC is enabled Cc: José Roberto de Souza Cc: Mika Kahola Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e11b0592055f..57575b5c6d48 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -779,6 +779,7 @@ static bool psr2_granularity_check(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + const struct drm_dsc_config *vdsc_cfg = _state->dsc.config; const int crtc_hdisplay = crtc_state->hw.adjusted_mode.crtc_hdisplay; const int crtc_vdisplay = crtc_state->hw.adjusted_mode.crtc_vdisplay; u16 y_granularity = 0; @@ -809,6 +810,10 @@ static bool psr2_granularity_check(struct intel_dp *intel_dp, if (y_granularity == 0 || crtc_vdisplay % y_granularity) return false; + if (crtc_state->dsc.compression_enable && + vdsc_cfg->slice_height % y_granularity) + return false; + crtc_state->su_y_granularity = y_granularity; return true; } -- 2.34.1