Re: [Intel-gfx] [PATCH 1/2] drm/i915: ignore posting read when using vgpu

2017-01-25 Thread Li, Weinan Z 
I am not sure if native driver still need POSTING_READ action. But for guest we 
can remove it directly.
Search the code, there are still upon 270 hints use POSTING_READ. 
For guest OS, one frequent POSTING_READ_FW action is in irq handler, it will 
impact the performance if there is heavy interrupts(like media reference usage.)

Thanks.
Best Regards.
Weinan, LI


> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Wednesday, January 25, 2017 3:13 PM
> To: Li, Weinan Z <weinan.z...@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; intel-gvt-...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: ignore posting read when
> using vgpu
> 
> On Wed, Jan 25, 2017 at 02:04:55PM +0800, Weinan Li wrote:
> > No need to do posting read when vgpu actived.
> 
> No. This is bloat for no gain. Almost all of those posting reads are 
> superfluous
> anyway.
> -Chris
> 
> --
> Chris Wilson, Intel Open Source Technology Centre
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: ignore posting read when using vgpu

2017-01-24 Thread Chris Wilson 
On Wed, Jan 25, 2017 at 02:04:55PM +0800, Weinan Li wrote:
> No need to do posting read when vgpu actived.

No. This is bloat for no gain. Almost all of those posting
reads are superfluous anyway.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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[Intel-gfx] [PATCH 1/2] drm/i915: ignore posting read when using vgpu

2017-01-24 Thread Weinan Li 
No need to do posting read when vgpu actived.

Signed-off-by: Weinan Li 
---
 drivers/gpu/drm/i915/i915_drv.h | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 52d01be..8c9d81b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3830,8 +3830,11 @@ void vlv_set_phy_signal_level(struct intel_encoder 
*encoder,
} while (upper != old_upper && loop++ < 2); \
(u64)upper << 32 | lower; })
 
-#define POSTING_READ(reg)  (void)I915_READ_NOTRACE(reg)
-#define POSTING_READ16(reg)(void)I915_READ16_NOTRACE(reg)
+#define POSTING_READ(reg) ( \
+   intel_vgpu_active(dev_priv) ? (void)0 : (void)I915_READ_NOTRACE(reg))
+
+#define POSTING_READ16(reg) ( \
+   intel_vgpu_active(dev_priv) ? (void)0 : (void)I915_READ16_NOTRACE(reg))
 
 #define __raw_read(x, s) \
 static inline uint##x##_t __raw_i915_read##x(struct drm_i915_private 
*dev_priv, \
@@ -3888,7 +3891,8 @@ void vlv_set_phy_signal_level(struct intel_encoder 
*encoder,
 #define I915_READ_FW(reg__) __raw_i915_read32(dev_priv, (reg__))
 #define I915_WRITE_FW(reg__, val__) __raw_i915_write32(dev_priv, (reg__), 
(val__))
 #define I915_WRITE64_FW(reg__, val__) __raw_i915_write64(dev_priv, (reg__), 
(val__))
-#define POSTING_READ_FW(reg__) (void)I915_READ_FW(reg__)
+#define POSTING_READ_FW(reg__) ( \
+   intel_vgpu_active(dev_priv) ? (void)0 : (void)I915_READ_FW(reg__))
 
 /* "Broadcast RGB" property */
 #define INTEL_BROADCAST_RGB_AUTO 0
-- 
1.9.1

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