Re: [Intel-gfx] [PATCH 1/3] drm-uapi: define interface to kernel for scratch page read

2017-12-04 Thread Rogovin, Kevin
Sighs, I do not know why git send-email made this into two threads, but there 
it is.

Worse, the second patch was from an older version; the one posted lacks the 
write to the
scratch page with noise.

At any rate, the thing is also on github at 
https://github.com/krogueintel/asem/tree/out-of-bounds-write-detect 
which has the initialization of the scratch page with noise.

-Kevin

-Original Message-
From: Rogovin, Kevin 
Sent: Tuesday, December 5, 2017 9:48 AM
To: intel-gfx@lists.freedesktop.org
Cc: Rogovin, Kevin 
Subject: [PATCH 1/3] drm-uapi: define interface to kernel for scratch page read

From: Kevin Rogovin 

---
 include/drm-uapi/i915_drm.h | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index 
890df227ae..3a9c3a2d0c 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -262,6 +262,8 @@ typedef struct _drm_i915_sarea {
 #define DRM_I915_PERF_OPEN 0x36
 #define DRM_I915_PERF_ADD_CONFIG   0x37
 #define DRM_I915_PERF_REMOVE_CONFIG0x38
+#define DRM_I915_READ_SCRATCH_PAGE  0x39
+#define DRM_I915_WRITE_SCRATCH_PAGE 0x40
 
 #define DRM_IOCTL_I915_INITDRM_IOW( DRM_COMMAND_BASE + 
DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH   DRM_IO ( DRM_COMMAND_BASE + 
DRM_I915_FLUSH)
@@ -319,6 +321,8 @@ typedef struct _drm_i915_sarea {
 #define DRM_IOCTL_I915_PERF_OPEN   DRM_IOW(DRM_COMMAND_BASE + 
DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
 #define DRM_IOCTL_I915_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + 
DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config)
 #define DRM_IOCTL_I915_PERF_REMOVE_CONFIG  DRM_IOW(DRM_COMMAND_BASE + 
DRM_I915_PERF_REMOVE_CONFIG, __u64)
+#define DRM_IOCTL_I915_READ_SCRATCH_PAGEDRM_IOWR (DRM_COMMAND_BASE + 
DRM_I915_READ_SCRATCH_PAGE, struct drm_i915_scratch_page)
+#define DRM_IOCTL_I915_WRITE_SCRATCH_PAGE   DRM_IOWR (DRM_COMMAND_BASE + 
DRM_I915_WRITE_SCRATCH_PAGE, struct drm_i915_scratch_page)
 
 /* Allow drivers to submit batchbuffers directly to hardware, relying
  * on the security mechanisms provided by hardware.
@@ -1535,6 +1539,33 @@ struct drm_i915_perf_oa_config {
__u64 flex_regs_ptr;
 };
 
+/**
+ * Structure to read/write scratch page of PPGTT. Read and writing
+ * values are not reliable unless the calling application guarantees
+ * that no batchbuffer that could read or write the scratch is in
+ * flight using the PPGTT between the time the ioctl is issued and
+ * it returns.
+ */
+struct drm_i915_scratch_page {
+   /**
+* size in bytes of the backing store pointed to by buffer_ptr;
+* kernel will return the actual size of the scratch page in
+* this field as well.
+*/
+   __u32 buffer_size;
+
+   /**
+* Pointer data with which to upload to or download from the
+* scratch page; if the buffer size behind buffer_ptr is
+* smaller than the scratch page size, then only the first
+* buffer_size bytes are read or written. If the scratch
+* page size is greater than buffer_size, then the bytes
+* past the scratch page size in buffer behind bufer_ptr
+* are not read or writte.
+*/
+   __u64 buffer_ptr;
+};
+
 #if defined(__cplusplus)
 }
 #endif
--
2.15.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx


[Intel-gfx] [PATCH 1/3] drm-uapi: define interface to kernel for scratch page read

2017-12-04 Thread kevin . rogovin
From: Kevin Rogovin 

---
 include/drm-uapi/i915_drm.h | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 890df227ae..3a9c3a2d0c 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -262,6 +262,8 @@ typedef struct _drm_i915_sarea {
 #define DRM_I915_PERF_OPEN 0x36
 #define DRM_I915_PERF_ADD_CONFIG   0x37
 #define DRM_I915_PERF_REMOVE_CONFIG0x38
+#define DRM_I915_READ_SCRATCH_PAGE  0x39
+#define DRM_I915_WRITE_SCRATCH_PAGE 0x40
 
 #define DRM_IOCTL_I915_INITDRM_IOW( DRM_COMMAND_BASE + 
DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH   DRM_IO ( DRM_COMMAND_BASE + 
DRM_I915_FLUSH)
@@ -319,6 +321,8 @@ typedef struct _drm_i915_sarea {
 #define DRM_IOCTL_I915_PERF_OPEN   DRM_IOW(DRM_COMMAND_BASE + 
DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
 #define DRM_IOCTL_I915_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + 
DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config)
 #define DRM_IOCTL_I915_PERF_REMOVE_CONFIG  DRM_IOW(DRM_COMMAND_BASE + 
DRM_I915_PERF_REMOVE_CONFIG, __u64)
+#define DRM_IOCTL_I915_READ_SCRATCH_PAGEDRM_IOWR (DRM_COMMAND_BASE + 
DRM_I915_READ_SCRATCH_PAGE, struct drm_i915_scratch_page)
+#define DRM_IOCTL_I915_WRITE_SCRATCH_PAGE   DRM_IOWR (DRM_COMMAND_BASE + 
DRM_I915_WRITE_SCRATCH_PAGE, struct drm_i915_scratch_page)
 
 /* Allow drivers to submit batchbuffers directly to hardware, relying
  * on the security mechanisms provided by hardware.
@@ -1535,6 +1539,33 @@ struct drm_i915_perf_oa_config {
__u64 flex_regs_ptr;
 };
 
+/**
+ * Structure to read/write scratch page of PPGTT. Read and writing
+ * values are not reliable unless the calling application guarantees
+ * that no batchbuffer that could read or write the scratch is in
+ * flight using the PPGTT between the time the ioctl is issued and
+ * it returns.
+ */
+struct drm_i915_scratch_page {
+   /**
+* size in bytes of the backing store pointed to by buffer_ptr;
+* kernel will return the actual size of the scratch page in
+* this field as well.
+*/
+   __u32 buffer_size;
+
+   /**
+* Pointer data with which to upload to or download from the
+* scratch page; if the buffer size behind buffer_ptr is
+* smaller than the scratch page size, then only the first
+* buffer_size bytes are read or written. If the scratch
+* page size is greater than buffer_size, then the bytes
+* past the scratch page size in buffer behind bufer_ptr
+* are not read or writte.
+*/
+   __u64 buffer_ptr;
+};
+
 #if defined(__cplusplus)
 }
 #endif
-- 
2.15.0

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx