Re: [Intel-gfx] [PATCH 1/7 resend] drm/i915: Add the support of eDP on DP-D for Ibex/CPT
On 2010.06.14 18:19:46 -0700, Eric Anholt wrote: On Sat, 12 Jun 2010 14:32:21 +0800, Zhenyu Wang zhen...@linux.intel.com wrote: From: Zhao Yakui yakui.z...@intel.com This one adds support for eDP that connected on PCH DP-D port instead of CPU DP-A port, and only DP-D port could be used for eDP. https://bugs.freedesktop.org/show_bug.cgi?id=27220 Instead of changing a ton of EDP checks to be EDP || PCH_EDP, why aren't you just setting the output type to edp when you detect that DPD is EDP? There's obviously difference between eDP from CPU and eDP from PCH, e.g no FDI link setup for CPU eDP, so not fit in same output type. Or do you think a new output type might be better for it? -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: Digital signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/7 resend] drm/i915: Add the support of eDP on DP-D for Ibex/CPT
On Sat, 12 Jun 2010 14:32:21 +0800, Zhenyu Wang zhen...@linux.intel.com wrote: From: Zhao Yakui yakui.z...@intel.com This one adds support for eDP that connected on PCH DP-D port instead of CPU DP-A port, and only DP-D port could be used for eDP. https://bugs.freedesktop.org/show_bug.cgi?id=27220 Signed-off-by: Zhao Yakui yakui.z...@intel.com Tested-by: Jan-Hendrik Zab j...@jhz.name Tested-by: Templar temp...@rshc.de Signed-off-by: Zhenyu Wang zhen...@linux.intel.com --- [snip] static void -intel_dp_compute_m_n(int bytes_per_pixel, +intel_dp_compute_m_n(int bpp, int nlanes, int pixel_clock, int link_clock, struct intel_dp_m_n *m_n) { m_n-tu = 64; - m_n-gmch_m = pixel_clock * bytes_per_pixel; + m_n-gmch_m = (pixel_clock * bpp) 3; m_n-gmch_n = link_clock * nlanes; intel_reduce_ratio(m_n-gmch_m, m_n-gmch_n); m_n-link_m = pixel_clock; This rounds the gmch_m down. Is this correct? And how close to overflow is pixel_clock today? -ickle -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/7 resend] drm/i915: Add the support of eDP on DP-D for Ibex/CPT
On Sat, 2010-06-12 at 16:28 +0800, Chris Wilson wrote: On Sat, 12 Jun 2010 14:32:21 +0800, Zhenyu Wang zhen...@linux.intel.com wrote: From: Zhao Yakui yakui.z...@intel.com This one adds support for eDP that connected on PCH DP-D port instead of CPU DP-A port, and only DP-D port could be used for eDP. https://bugs.freedesktop.org/show_bug.cgi?id=27220 Signed-off-by: Zhao Yakui yakui.z...@intel.com Tested-by: Jan-Hendrik Zab j...@jhz.name Tested-by: Templar temp...@rshc.de Signed-off-by: Zhenyu Wang zhen...@linux.intel.com --- [snip] static void -intel_dp_compute_m_n(int bytes_per_pixel, +intel_dp_compute_m_n(int bpp, int nlanes, int pixel_clock, int link_clock, struct intel_dp_m_n *m_n) { m_n-tu = 64; - m_n-gmch_m = pixel_clock * bytes_per_pixel; + m_n-gmch_m = (pixel_clock * bpp) 3; m_n-gmch_n = link_clock * nlanes; intel_reduce_ratio(m_n-gmch_m, m_n-gmch_n); m_n-link_m = pixel_clock; This rounds the gmch_m down. Is this correct? And how close to overflow is pixel_clock today? The bpp is the abbreviation of bits per pixel and this is not round down. It is only to convert the bits per second to bytes per second, which will be used to calculation the DP M/N . -ickle ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx