Re: [Intel-gfx] [PATCH 1/9] drm/i915: Bump DSL linemask to 20 bits

2022-01-26 Thread Jani Nikula
On Fri, 19 Nov 2021, Ville Syrjälä wrote: > On Mon, Nov 15, 2021 at 02:05:00PM -0500, Rodrigo Vivi wrote: >> On Fri, Nov 12, 2021 at 09:38:05PM +0200, Ville Syrjala wrote: >> > From: Ville Syrjälä >> > >> > Since tgl PIPE_DSL has 20 bits for the scanline. Let's bump our >> > definition to

Re: [Intel-gfx] [PATCH 1/9] drm/i915: Bump DSL linemask to 20 bits

2021-11-19 Thread Ville Syrjälä
On Mon, Nov 15, 2021 at 02:05:00PM -0500, Rodrigo Vivi wrote: > On Fri, Nov 12, 2021 at 09:38:05PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Since tgl PIPE_DSL has 20 bits for the scanline. Let's bump our > > definition to match. And while at it let's also add the define > >

Re: [Intel-gfx] [PATCH 1/9] drm/i915: Bump DSL linemask to 20 bits

2021-11-15 Thread Rodrigo Vivi
On Fri, Nov 12, 2021 at 09:38:05PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Since tgl PIPE_DSL has 20 bits for the scanline. Let's bump our > definition to match. And while at it let's also add the define > for the current field readback. > > We can also get rid of the gen2 vs.

[Intel-gfx] [PATCH 1/9] drm/i915: Bump DSL linemask to 20 bits

2021-11-12 Thread Ville Syrjala
From: Ville Syrjälä Since tgl PIPE_DSL has 20 bits for the scanline. Let's bump our definition to match. And while at it let's also add the define for the current field readback. We can also get rid of the gen2 vs. gen3+ nonsense since none of the extra bits ever did anything and just always