Re: [Intel-gfx] [PATCH 12/13] drm/i915/mtl: Pin assignment for TypeC

2023-04-27 Thread Matt Atwood
On Thu, Apr 20, 2023 at 03:40:49PM +0300, Mika Kahola wrote: > From: Anusha Srivatsa > > Unlike previous platforms that used PORT_TX_DFLEXDPSP > for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1 > from which the max_lanes has to be calculated. > > Bspec: 50235, 65380 > Reviewed-by: Matt

[Intel-gfx] [PATCH 12/13] drm/i915/mtl: Pin assignment for TypeC

2023-04-20 Thread Mika Kahola
From: Anusha Srivatsa Unlike previous platforms that used PORT_TX_DFLEXDPSP for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1 from which the max_lanes has to be calculated. Bspec: 50235, 65380 Signed-off-by: Anusha Srivatsa Signed-off-by: Jose Roberto de Souza Signed-off-by: Mika