Re: [Intel-gfx] [PATCH 18/18] drm/i915: Add FIFO underrun tracepoints

2017-03-01 Thread Maarten Lankhorst
Op 16-02-17 om 19:07 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä 
>
> Add tracepoints for display FIFO underruns. Makes it more convenient to
> correlate the underruns with other display tracepoints.
I'm still not sold on how crtc_state->visible_planes deviates from 
crtc_state->planes_mask and other *_mask's.

Should probably rename it to visible_plane_id_mask to make it clear it's a mask 
not using drm_plane_index.

Otherwise looks good,

so for the whole series:

Reviewed-by: Maarten Lankhorst 
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[Intel-gfx] [PATCH 18/18] drm/i915: Add FIFO underrun tracepoints

2017-02-16 Thread ville . syrjala
From: Ville Syrjälä 

Add tracepoints for display FIFO underruns. Makes it more convenient to
correlate the underruns with other display tracepoints.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/i915_trace.h  | 43 ++
 drivers/gpu/drm/i915/intel_fifo_underrun.c | 11 ++--
 2 files changed, 52 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_trace.h 
b/drivers/gpu/drm/i915/i915_trace.h
index bca46406030d..b0eff4d6d5fa 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -16,6 +16,49 @@
 
 /* watermark/fifo updates */
 
+TRACE_EVENT(i915_cpu_fifo_underrun,
+   TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pipe),
+   TP_ARGS(dev_priv, pipe),
+
+   TP_STRUCT__entry(
+__field(enum pipe, pipe)
+__field(u32, frame)
+__field(u32, scanline)
+),
+
+   TP_fast_assign(
+  __entry->pipe = pipe;
+  __entry->frame = 
dev_priv->drm.driver->get_vblank_counter(_priv->drm, pipe);
+  __entry->scanline = 
intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe));
+  ),
+
+   TP_printk("pipe %c, frame=%u, scanline=%u",
+ pipe_name(__entry->pipe),
+ __entry->frame, __entry->scanline)
+);
+
+TRACE_EVENT(i915_pch_fifo_underrun,
+   TP_PROTO(struct drm_i915_private *dev_priv, enum transcoder 
pch_transcoder),
+   TP_ARGS(dev_priv, pch_transcoder),
+
+   TP_STRUCT__entry(
+__field(enum pipe, pipe)
+__field(u32, frame)
+__field(u32, scanline)
+),
+
+   TP_fast_assign(
+  enum pipe pipe = (enum pipe)pch_transcoder;
+  __entry->pipe = pipe;
+  __entry->frame = 
dev_priv->drm.driver->get_vblank_counter(_priv->drm, pipe);
+  __entry->scanline = 
intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe));
+  ),
+
+   TP_printk("pch transcoder %c, frame=%u, scanline=%u",
+ pipe_name(__entry->pipe),
+ __entry->frame, __entry->scanline)
+);
+
 TRACE_EVENT(intel_memory_cxsr,
TP_PROTO(struct drm_i915_private *dev_priv, bool old, bool new),
TP_ARGS(dev_priv, old, new),
diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c 
b/drivers/gpu/drm/i915/intel_fifo_underrun.c
index e660d8b4bbc3..9c2eebaa5253 100644
--- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
@@ -98,6 +98,7 @@ static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)
I915_WRITE(reg, pipestat | PIPE_FIFO_UNDERRUN_STATUS);
POSTING_READ(reg);
 
+   trace_i915_cpu_fifo_underrun(dev_priv, crtc->pipe);
DRM_ERROR("pipe %c underrun\n", pipe_name(crtc->pipe));
 }
 
@@ -147,6 +148,7 @@ static void ivybridge_check_fifo_underruns(struct 
intel_crtc *crtc)
I915_WRITE(GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));
POSTING_READ(GEN7_ERR_INT);
 
+   trace_i915_cpu_fifo_underrun(dev_priv, pipe);
DRM_ERROR("fifo underrun on pipe %c\n", pipe_name(pipe));
 }
 
@@ -212,6 +214,7 @@ static void cpt_check_pch_fifo_underruns(struct intel_crtc 
*crtc)
I915_WRITE(SERR_INT, SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder));
POSTING_READ(SERR_INT);
 
+   trace_i915_pch_fifo_underrun(dev_priv, pch_transcoder);
DRM_ERROR("pch fifo underrun on pch transcoder %s\n",
  transcoder_name(pch_transcoder));
 }
@@ -368,9 +371,11 @@ void intel_cpu_fifo_underrun_irq_handler(struct 
drm_i915_private *dev_priv,
crtc->cpu_fifo_underrun_disabled)
return;
 
-   if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))
+   if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) {
+   trace_i915_cpu_fifo_underrun(dev_priv, pipe);
DRM_ERROR("CPU pipe %c FIFO underrun\n",
  pipe_name(pipe));
+   }
 
intel_fbc_handle_fifo_underrun_irq(dev_priv);
 }
@@ -388,9 +393,11 @@ void intel_pch_fifo_underrun_irq_handler(struct 
drm_i915_private *dev_priv,
 enum transcoder pch_transcoder)
 {
if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder,
- false))
+ false)) {
+   trace_i915_pch_fifo_underrun(dev_priv, pch_transcoder);
DRM_ERROR("PCH transcoder %s FIFO underrun\n",