[Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-26 Thread Lionel Landwerlin 
Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.

v2: Read GAMMA_MODE register value at init (Matt Roper's comment)

v3: Read GAMMA_MODE register in intel_modeset_readout_hw_state along
with other registers (Matt Roper's comment).

v4: Mask GAMMA_MODE register with interesting bits when reading

Signed-off-by: Lionel Landwerlin 
Reviewed-by: Matt Roper 
---
 drivers/gpu/drm/i915/intel_color.c   | 7 +--
 drivers/gpu/drm/i915/intel_display.c | 3 +++
 drivers/gpu/drm/i915/intel_drv.h | 3 +++
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index 35b7f62..16657eb 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -121,6 +121,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   struct intel_crtc_state *intel_crtc_state =
+   to_intel_crtc_state(crtc->state);
bool reenable_ips = false;
 
/*
@@ -128,11 +130,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
 */
if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
-   ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
-GAMMA_MODE_MODE_SPLIT)) {
+   (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
hsw_disable_ips(intel_crtc);
reenable_ips = true;
}
+
+   intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
 
i9xx_load_luts(crtc);
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 66d6820..a5f57cd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9870,6 +9870,9 @@ static bool haswell_get_pipe_config(struct intel_crtc 
*crtc,
 
intel_get_pipe_timings(crtc, pipe_config);
 
+   pipe_config->gamma_mode =
+   I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
+
if (INTEL_INFO(dev)->gen >= 9) {
skl_init_scalers(dev, crtc, pipe_config);
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index dc29816..d2855c7 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -518,6 +518,9 @@ struct intel_crtc_state {
struct skl_pipe_wm skl;
} optimal;
} wm;
+
+   /* Gamma mode programmed on the pipe */
+   uint32_t gamma_mode;
 };
 
 struct vlv_wm_state {
-- 
2.7.0

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Re: [Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-25 Thread Matt Roper 
On Thu, Feb 25, 2016 at 10:58:46AM +, Lionel Landwerlin wrote:
> Implement Daniel Stone's recommendation to not read registers to infer
> the hardware's state.
> 
> v2: Read GAMMA_MODE register value at init (Matt Roper's comment)
> 
> v3: Read GAMMA_MODE register in intel_modeset_readout_hw_state along
> with other registers (Matt Roper's comment).
> 
> Signed-off-by: Lionel Landwerlin 
> ---
>  drivers/gpu/drm/i915/intel_color.c   | 12 
>  drivers/gpu/drm/i915/intel_display.c |  2 ++
>  drivers/gpu/drm/i915/intel_drv.h |  3 +++
>  3 files changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_color.c 
> b/drivers/gpu/drm/i915/intel_color.c
> index 5e0b997..16657eb 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -121,6 +121,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
>   struct drm_device *dev = crtc->dev;
>   struct drm_i915_private *dev_priv = dev->dev_private;
>   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + struct intel_crtc_state *intel_crtc_state =
> + to_intel_crtc_state(crtc->state);
>   bool reenable_ips = false;
>  
>   /*
> @@ -128,11 +130,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
>* GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
>*/
>   if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
> - ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
> -  GAMMA_MODE_MODE_SPLIT)) {
> + (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
>   hsw_disable_ips(intel_crtc);
>   reenable_ips = true;
>   }
> +
> + intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
>   I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
>  
>   i9xx_load_luts(crtc);
> @@ -183,8 +186,9 @@ void intel_color_init(struct drm_crtc *crtc)
>   }
>  
>   if (IS_HASWELL(dev) ||
> - (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev)))
> + (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev))) {
>   dev_priv->display.load_luts = haswell_load_luts;
> - else
> + } else {
>   dev_priv->display.load_luts = i9xx_load_luts;
> + }
>  }
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index acbb1d9..19f8284 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9891,6 +9891,8 @@ static bool haswell_get_pipe_config(struct intel_crtc 
> *crtc,
>  
>   intel_get_pipe_timings(crtc, pipe_config);
>  
> + pipe_config->gamma_mode = I915_READ(GAMMA_MODE(crtc->pipe));

I think you want to mask this with GAMMA_MODE_MODE_MASK since there may
be stuff in the higher bits.

With that change made, you can consider this patch

Reviewed-by: Matt Roper 


> +
>   if (INTEL_INFO(dev)->gen >= 9) {
>   skl_init_scalers(dev, crtc, pipe_config);
>   }
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 7532f61..8c48131 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -517,6 +517,9 @@ struct intel_crtc_state {
>   struct skl_pipe_wm skl;
>   } optimal;
>   } wm;
> +
> + /* Gamma mode programmed on the pipe */
> + uint32_t gamma_mode;
>  };
>  
>  struct vlv_wm_state {
> -- 
> 2.7.0
> 
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[Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-25 Thread Lionel Landwerlin 
Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.

v2: Read GAMMA_MODE register value at init (Matt Roper's comment)

v3: Read GAMMA_MODE register in intel_modeset_readout_hw_state along
with other registers (Matt Roper's comment).

Signed-off-by: Lionel Landwerlin 
---
 drivers/gpu/drm/i915/intel_color.c   | 12 
 drivers/gpu/drm/i915/intel_display.c |  2 ++
 drivers/gpu/drm/i915/intel_drv.h |  3 +++
 3 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index 5e0b997..16657eb 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -121,6 +121,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   struct intel_crtc_state *intel_crtc_state =
+   to_intel_crtc_state(crtc->state);
bool reenable_ips = false;
 
/*
@@ -128,11 +130,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
 */
if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
-   ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
-GAMMA_MODE_MODE_SPLIT)) {
+   (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
hsw_disable_ips(intel_crtc);
reenable_ips = true;
}
+
+   intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
 
i9xx_load_luts(crtc);
@@ -183,8 +186,9 @@ void intel_color_init(struct drm_crtc *crtc)
}
 
if (IS_HASWELL(dev) ||
-   (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev)))
+   (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev))) {
dev_priv->display.load_luts = haswell_load_luts;
-   else
+   } else {
dev_priv->display.load_luts = i9xx_load_luts;
+   }
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index cd47f5b..154ac87 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9873,6 +9873,8 @@ static bool haswell_get_pipe_config(struct intel_crtc 
*crtc,
 
intel_get_pipe_timings(crtc, pipe_config);
 
+   pipe_config->gamma_mode = I915_READ(GAMMA_MODE(crtc->pipe));
+
if (INTEL_INFO(dev)->gen >= 9) {
skl_init_scalers(dev, crtc, pipe_config);
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 7532f61..8c48131 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -517,6 +517,9 @@ struct intel_crtc_state {
struct skl_pipe_wm skl;
} optimal;
} wm;
+
+   /* Gamma mode programmed on the pipe */
+   uint32_t gamma_mode;
 };
 
 struct vlv_wm_state {
-- 
2.7.0

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[Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-25 Thread Lionel Landwerlin 
Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.

v2: Read GAMMA_MODE register value at init (Matt Roper's comment)

v3: Read GAMMA_MODE register in intel_modeset_readout_hw_state along
with other registers (Matt Roper's comment).

Signed-off-by: Lionel Landwerlin 
---
 drivers/gpu/drm/i915/intel_color.c   | 12 
 drivers/gpu/drm/i915/intel_display.c |  2 ++
 drivers/gpu/drm/i915/intel_drv.h |  3 +++
 3 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index 5e0b997..16657eb 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -121,6 +121,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   struct intel_crtc_state *intel_crtc_state =
+   to_intel_crtc_state(crtc->state);
bool reenable_ips = false;
 
/*
@@ -128,11 +130,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
 */
if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
-   ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
-GAMMA_MODE_MODE_SPLIT)) {
+   (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
hsw_disable_ips(intel_crtc);
reenable_ips = true;
}
+
+   intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
 
i9xx_load_luts(crtc);
@@ -183,8 +186,9 @@ void intel_color_init(struct drm_crtc *crtc)
}
 
if (IS_HASWELL(dev) ||
-   (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev)))
+   (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev))) {
dev_priv->display.load_luts = haswell_load_luts;
-   else
+   } else {
dev_priv->display.load_luts = i9xx_load_luts;
+   }
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index acbb1d9..19f8284 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9891,6 +9891,8 @@ static bool haswell_get_pipe_config(struct intel_crtc 
*crtc,
 
intel_get_pipe_timings(crtc, pipe_config);
 
+   pipe_config->gamma_mode = I915_READ(GAMMA_MODE(crtc->pipe));
+
if (INTEL_INFO(dev)->gen >= 9) {
skl_init_scalers(dev, crtc, pipe_config);
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 7532f61..8c48131 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -517,6 +517,9 @@ struct intel_crtc_state {
struct skl_pipe_wm skl;
} optimal;
} wm;
+
+   /* Gamma mode programmed on the pipe */
+   uint32_t gamma_mode;
 };
 
 struct vlv_wm_state {
-- 
2.7.0

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Re: [Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-23 Thread Matt Roper 
On Tue, Feb 23, 2016 at 10:36:36AM +, Lionel Landwerlin wrote:
> On 23/02/16 00:38, Matt Roper wrote:
> >On Mon, Feb 22, 2016 at 02:18:08PM +, Lionel Landwerlin wrote:
> >>Implement Daniel Stone's recommendation to not read registers to infer
> >>the hardware's state.
> >>
> >>Signed-off-by: Lionel Landwerlin 
> >Do we need to ensure that software and hardware state are synchronized
> >at startup?  A boot firmware might have set it to something different
> >before our driver starts up; if we use 'fastboot' then we might not do
> >any modesets and might wind up with 0 (8BIT) in our state variable, but
> >something else actually programmed into the hardware.
> >
> >
> >Matt
> 
> Thanks Matt,
> 
> It makes sense know, I couldn't understand why this would ever be at
> something different that 8bit mode...
> I guess the value should be read from the intel_color_init()
> function upon startup.

We have a hardware state readout where we reconstruct the hardware state
for various things like plane state and such; you could add color
management readout to that.  Alternatively, we could just force
known-good values into the hardware at startup as we do (or will very
soon) for stuff we don't trust the BIOS to get right like watermarks.


Matt

> 
> -
> Lionel

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[Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-23 Thread Lionel Landwerlin 
Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.

v2: Read GAMMA_MODE register value at init

Signed-off-by: Lionel Landwerlin 
---
 drivers/gpu/drm/i915/intel_color.c | 17 +
 drivers/gpu/drm/i915/intel_drv.h   |  3 +++
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index 5e0b997..f6bf9f1 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -121,6 +121,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   struct intel_crtc_state *intel_crtc_state =
+   to_intel_crtc_state(crtc->state);
bool reenable_ips = false;
 
/*
@@ -128,11 +130,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
 */
if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
-   ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
-GAMMA_MODE_MODE_SPLIT)) {
+   (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
hsw_disable_ips(intel_crtc);
reenable_ips = true;
}
+
+   intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
 
i9xx_load_luts(crtc);
@@ -173,6 +176,8 @@ void intel_color_init(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   struct intel_crtc_state *intel_crtc_state =
+   to_intel_crtc_state(crtc->state);
int i;
 
drm_mode_crtc_set_gamma_size(crtc, 256);
@@ -183,8 +188,12 @@ void intel_color_init(struct drm_crtc *crtc)
}
 
if (IS_HASWELL(dev) ||
-   (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev)))
+   (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev))) {
dev_priv->display.load_luts = haswell_load_luts;
-   else
+
+   intel_crtc_state->gamma_mode =
+   I915_READ(GAMMA_MODE(intel_crtc->pipe));
+   } else {
dev_priv->display.load_luts = i9xx_load_luts;
+   }
 }
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 40fc486..9742d5b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -517,6 +517,9 @@ struct intel_crtc_state {
struct skl_pipe_wm skl;
} optimal;
} wm;
+
+   /* Gamma mode programmed on the pipe */
+   uint32_t gamma_mode;
 };
 
 struct vlv_wm_state {
-- 
2.7.0

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Re: [Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-23 Thread Lionel Landwerlin 

On 23/02/16 00:38, Matt Roper wrote:

On Mon, Feb 22, 2016 at 02:18:08PM +, Lionel Landwerlin wrote:

Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.

Signed-off-by: Lionel Landwerlin 

Do we need to ensure that software and hardware state are synchronized
at startup?  A boot firmware might have set it to something different
before our driver starts up; if we use 'fastboot' then we might not do
any modesets and might wind up with 0 (8BIT) in our state variable, but
something else actually programmed into the hardware.


Matt


Thanks Matt,

It makes sense know, I couldn't understand why this would ever be at 
something different that 8bit mode...
I guess the value should be read from the intel_color_init() function 
upon startup.


-
Lionel
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Re: [Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-22 Thread Matt Roper 
On Mon, Feb 22, 2016 at 02:18:08PM +, Lionel Landwerlin wrote:
> Implement Daniel Stone's recommendation to not read registers to infer
> the hardware's state.
> 
> Signed-off-by: Lionel Landwerlin 

Do we need to ensure that software and hardware state are synchronized
at startup?  A boot firmware might have set it to something different
before our driver starts up; if we use 'fastboot' then we might not do
any modesets and might wind up with 0 (8BIT) in our state variable, but
something else actually programmed into the hardware.


Matt

> ---
>  drivers/gpu/drm/i915/intel_color.c | 7 +--
>  drivers/gpu/drm/i915/intel_drv.h   | 3 +++
>  2 files changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_color.c 
> b/drivers/gpu/drm/i915/intel_color.c
> index cce0155..ba27ce2 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -126,6 +126,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
>   struct drm_device *dev = crtc->dev;
>   struct drm_i915_private *dev_priv = dev->dev_private;
>   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + struct intel_crtc_state *intel_crtc_state =
> + to_intel_crtc_state(crtc->state);
>   bool reenable_ips = false;
>  
>   /*
> @@ -133,11 +135,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
>* GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
>*/
>   if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
> - ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
> -  GAMMA_MODE_MODE_SPLIT)) {
> + (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
>   hsw_disable_ips(intel_crtc);
>   reenable_ips = true;
>   }
> +
> + intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
>   I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
>  
>   i9xx_load_luts(crtc);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 40fc486..9742d5b 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -517,6 +517,9 @@ struct intel_crtc_state {
>   struct skl_pipe_wm skl;
>   } optimal;
>   } wm;
> +
> + /* Gamma mode programmed on the pipe */
> + uint32_t gamma_mode;
>  };
>  
>  struct vlv_wm_state {
> -- 
> 2.7.0
> 
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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[Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-22 Thread Lionel Landwerlin 
Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.

Signed-off-by: Lionel Landwerlin 
---
 drivers/gpu/drm/i915/intel_color.c | 7 +--
 drivers/gpu/drm/i915/intel_drv.h   | 3 +++
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index cce0155..ba27ce2 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -126,6 +126,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   struct intel_crtc_state *intel_crtc_state =
+   to_intel_crtc_state(crtc->state);
bool reenable_ips = false;
 
/*
@@ -133,11 +135,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
 */
if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
-   ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
-GAMMA_MODE_MODE_SPLIT)) {
+   (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
hsw_disable_ips(intel_crtc);
reenable_ips = true;
}
+
+   intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
 
i9xx_load_luts(crtc);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 40fc486..9742d5b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -517,6 +517,9 @@ struct intel_crtc_state {
struct skl_pipe_wm skl;
} optimal;
} wm;
+
+   /* Gamma mode programmed on the pipe */
+   uint32_t gamma_mode;
 };
 
 struct vlv_wm_state {
-- 
2.7.0

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[Intel-gfx] [PATCH 2/5] drm/i915: Do not read GAMMA_MODE register

2016-02-19 Thread Lionel Landwerlin 
Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.

Signed-off-by: Lionel Landwerlin 
---
 drivers/gpu/drm/i915/intel_color.c | 7 +--
 drivers/gpu/drm/i915/intel_drv.h   | 3 +++
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index cce0155..ba27ce2 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -126,6 +126,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   struct intel_crtc_state *intel_crtc_state =
+   to_intel_crtc_state(crtc->state);
bool reenable_ips = false;
 
/*
@@ -133,11 +135,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
 */
if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
-   ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
-GAMMA_MODE_MODE_SPLIT)) {
+   (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
hsw_disable_ips(intel_crtc);
reenable_ips = true;
}
+
+   intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
 
i9xx_load_luts(crtc);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 40fc486..9742d5b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -517,6 +517,9 @@ struct intel_crtc_state {
struct skl_pipe_wm skl;
} optimal;
} wm;
+
+   /* Gamma mode programmed on the pipe */
+   uint32_t gamma_mode;
 };
 
 struct vlv_wm_state {
-- 
2.7.0

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