> -Original Message-
> From: Hogander, Jouni
> Sent: Wednesday, November 1, 2023 11:29 AM
> To: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> Cc: ville.syrj...@linux.intel.com
> Subject: Re: [PATCH v2] drm/i915/display: Support PSR entry VSC packet to be
> transmitted one frame
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, November 1, 2023 11:38 AM
> To: Hogander, Jouni
> Cc: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH v2] drm/i915/display: Support PSR entry VSC packet to be
> transmitted one frame earlier
>
> On Wed,
On Wed, Nov 01, 2023 at 09:28:51AM +, Hogander, Jouni wrote:
> On Wed, 2023-11-01 at 10:57 +0200, Mika Kahola wrote:
> > Display driver shall read DPCD 00071h[3:1] during configuration
> > to get PSR setup time. This register provides the setup time
> > requirement on the VSC SDP entry packet.
On Wed, 2023-11-01 at 10:57 +0200, Mika Kahola wrote:
> Display driver shall read DPCD 00071h[3:1] during configuration
> to get PSR setup time. This register provides the setup time
> requirement on the VSC SDP entry packet. If setup time cannot be
> met with the current timings
> (e.g., PSR
Display driver shall read DPCD 00071h[3:1] during configuration
to get PSR setup time. This register provides the setup time
requirement on the VSC SDP entry packet. If setup time cannot be
met with the current timings
(e.g., PSR setup time + other blanking requirements > blanking time),
driver
