subject:"\[Intel\-gfx\] \[PATCH v2 01\/13\] drm\/i915\/mtl\: C20 PLL programming"

Re: [Intel-gfx] [PATCH v2 01/13] drm/i915/mtl: C20 PLL programming

2023-04-28 Thread Radhakrishna Sripada

On Fri, Apr 28, 2023 at 12:54:21PM +0300, Mika Kahola wrote: > C20 phy PLL programming sequence for DP, DP2.0, HDMI2.x non-FRL and > HDMI2.x FRL. This enables C20 MPLLA and MPLLB programming sequence. add > 4 lane support for c20. > > v2: Add 6.48Gbps and 6.75Gbps modes for eDP (RK) > Fix

[Intel-gfx] [PATCH v2 01/13] drm/i915/mtl: C20 PLL programming

2023-04-28 Thread Mika Kahola

C20 phy PLL programming sequence for DP, DP2.0, HDMI2.x non-FRL and HDMI2.x FRL. This enables C20 MPLLA and MPLLB programming sequence. add 4 lane support for c20. v2: Add 6.48Gbps and 6.75Gbps modes for eDP (RK) Fix lane check (RK) Fix multiline commenting (Arun) use usleep_range()