Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Add PSR2 selective fetch registers

2020-06-29 Thread Souza, Jose
On Fri, 2020-06-26 at 15:11 +0100, Mun, Gwan-gyeong wrote: > On Thu, 2020-06-25 at 18:01 -0700, José Roberto de Souza wrote: > > This registers will be used to implement PSR2 manual > > tracking/selective > > fetch. > > > > v2: > > - Fixed typo in _PLANE_SEL_FETCH_BASE > > - Renamed

Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Add PSR2 selective fetch registers

2020-06-26 Thread Mun, Gwan-gyeong
On Thu, 2020-06-25 at 18:01 -0700, José Roberto de Souza wrote: > This registers will be used to implement PSR2 manual > tracking/selective > fetch. > > v2: > - Fixed typo in _PLANE_SEL_FETCH_BASE > - Renamed PSR2_MAN_TRK_CTL bits to better match spec names > - Renamed _PLANE_SEL_FETCH_* to

[Intel-gfx] [PATCH v2 3/5] drm/i915: Add PSR2 selective fetch registers

2020-06-25 Thread José Roberto de Souza
This registers will be used to implement PSR2 manual tracking/selective fetch. v2: - Fixed typo in _PLANE_SEL_FETCH_BASE - Renamed PSR2_MAN_TRK_CTL bits to better match spec names - Renamed _PLANE_SEL_FETCH_* to better match spec names BSpec: 55229 BSpec: 50424 BSpec: 50420 Cc: Gwan-gyeong Mun