Re: [Intel-gfx] [PATCH v3 1/2] drm/i915/guc: Limit number of scratch registers used for H2G

2018-10-18 Thread Daniele Ceraolo Spurio
On 18/10/18 11:30, Michal Wajdeczko wrote: We wrongly assumed that GuC is only using last scratch register for G2H messages, but in fact it is also using register [14] to report sleep state status. Remove that register from our H2G send registers pool. v2: No message from host to GuC uses

[Intel-gfx] [PATCH v3 1/2] drm/i915/guc: Limit number of scratch registers used for H2G

2018-10-18 Thread Michal Wajdeczko
We wrongly assumed that GuC is only using last scratch register for G2H messages, but in fact it is also using register [14] to report sleep state status. Remove that register from our H2G send registers pool. v2: No message from host to GuC uses more than 8 registers and the GuC FW itself uses