Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-26 Thread Manasi Navare
On Thu, Sep 26, 2019 at 03:28:44PM +0300, Ville Syrjälä wrote: > On Wed, Sep 25, 2019 at 11:37:58AM -0700, Manasi Navare wrote: > > On Wed, Sep 25, 2019 at 01:08:23PM +0300, Ville Syrjälä wrote: > > > On Tue, Sep 24, 2019 at 10:59:57AM -0700, Manasi Navare wrote: > > > > On Tue, Sep 24, 2019 at

Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-26 Thread Ville Syrjälä
On Wed, Sep 25, 2019 at 11:37:58AM -0700, Manasi Navare wrote: > On Wed, Sep 25, 2019 at 01:08:23PM +0300, Ville Syrjälä wrote: > > On Tue, Sep 24, 2019 at 10:59:57AM -0700, Manasi Navare wrote: > > > On Tue, Sep 24, 2019 at 05:38:00PM +0200, Maarten Lankhorst wrote: > > > > Op 22-09-2019 om 19:08

Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-25 Thread Manasi Navare
On Wed, Sep 25, 2019 at 01:08:23PM +0300, Ville Syrjälä wrote: > On Tue, Sep 24, 2019 at 10:59:57AM -0700, Manasi Navare wrote: > > On Tue, Sep 24, 2019 at 05:38:00PM +0200, Maarten Lankhorst wrote: > > > Op 22-09-2019 om 19:08 schreef Manasi Navare: > > > > After the state is committed, we

Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-25 Thread Ville Syrjälä
On Tue, Sep 24, 2019 at 10:59:57AM -0700, Manasi Navare wrote: > On Tue, Sep 24, 2019 at 05:38:00PM +0200, Maarten Lankhorst wrote: > > Op 22-09-2019 om 19:08 schreef Manasi Navare: > > > After the state is committed, we readout the HW registers and compare > > > the HW state with the SW state

Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-24 Thread Manasi Navare
On Tue, Sep 24, 2019 at 05:38:00PM +0200, Maarten Lankhorst wrote: > Op 22-09-2019 om 19:08 schreef Manasi Navare: > > After the state is committed, we readout the HW registers and compare > > the HW state with the SW state that we just committed. > > For Transcdoer port sync, we add

Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-24 Thread Maarten Lankhorst
Op 22-09-2019 om 19:08 schreef Manasi Navare: > After the state is committed, we readout the HW registers and compare > the HW state with the SW state that we just committed. > For Transcdoer port sync, we add master_transcoder and the > salves bitmask to the crtc_state, hence we need to read

Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-22 Thread Manasi Navare
Hi Ville, This gave me clean CI results with adding the power well get/put like you suggested, could you please review this patch? Regards Manasi On Sun, Sep 22, 2019 at 10:08:04AM -0700, Manasi Navare wrote: > After the state is committed, we readout the HW registers and compare > the HW

[Intel-gfx] [PATCH v3 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-09-22 Thread Manasi Navare
After the state is committed, we readout the HW registers and compare the HW state with the SW state that we just committed. For Transcdoer port sync, we add master_transcoder and the salves bitmask to the crtc_state, hence we need to read those during the HW state readout to avoid pipe state