On Friday 28 March 2014 06:36 PM, Chris Wilson wrote:
On Fri, Mar 28, 2014 at 02:53:48PM +0200, Ville Syrjälä wrote:
On Thu, Mar 27, 2014 at 12:05:01PM +0530, deepa...@linux.intel.com wrote:
@@ -1403,6 +1411,13 @@ typedef struct drm_i915_private {
/* gen6+ rps state */
struct
On Thu, Mar 27, 2014 at 12:05:01PM +0530, deepa...@linux.intel.com wrote:
From: Deepak S deepa...@linux.intel.com
With RC6 enabled, BYT has an HW issue in determining the right
Gfx busyness.
WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide
on increasing/decreasing the
On Fri, Mar 28, 2014 at 02:53:48PM +0200, Ville Syrjälä wrote:
On Thu, Mar 27, 2014 at 12:05:01PM +0530, deepa...@linux.intel.com wrote:
@@ -1403,6 +1411,13 @@ typedef struct drm_i915_private {
/* gen6+ rps state */
struct intel_gen6_power_mgmt rps;
+ /* rps wa up ei
From: Deepak S deepa...@linux.intel.com
With RC6 enabled, BYT has an HW issue in determining the right
Gfx busyness.
WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide
on increasing/decreasing the freq. This logic will monitor C0
counters of render/media power-wells over EI period
