subject:"\[Intel\-gfx\] \[PATCH v5 2\/8\] drm\/i915\/bxt\: IPC WA for Broxton"

Re: [Intel-gfx] [PATCH v5 2/8] drm/i915/bxt: IPC WA for Broxton

2016-11-21 Thread Paulo Zanoni

Em Sex, 2016-11-18 às 20:39 +0530, Mahesh Kumar escreveu: > If IPC is enabled in BXT, display underruns are observed. > WA: The Line Time programmed in the WM_LINETIME register should be > half of the actual calculated Line Time. > > Programmed Line Time = 1/2*Calculated Line Time > >

[Intel-gfx] [PATCH v5 2/8] drm/i915/bxt: IPC WA for Broxton

2016-11-18 Thread Mahesh Kumar

If IPC is enabled in BXT, display underruns are observed. WA: The Line Time programmed in the WM_LINETIME register should be half of the actual calculated Line Time. Programmed Line Time = 1/2*Calculated Line Time Signed-off-by: Mahesh Kumar ---