Re: [Intel-gfx] [PATCH v5 22/22] drm/i915/mtl: Pin assignment for TypeC

2023-04-11 Thread Luca Coelho
On Thu, 2023-03-16 at 13:13 +0200, Mika Kahola wrote: > From: Anusha Srivatsa > > Unlike previous platforms that used PORT_TX_DFLEXDPSP > for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1 > from which the max_lanes has to be calculated. > > Bspec: 50235, 65380 > > Cc: Mika Kahola > Cc:

[Intel-gfx] [PATCH v5 22/22] drm/i915/mtl: Pin assignment for TypeC

2023-03-16 Thread Mika Kahola
From: Anusha Srivatsa Unlike previous platforms that used PORT_TX_DFLEXDPSP for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1 from which the max_lanes has to be calculated. Bspec: 50235, 65380 Cc: Mika Kahola Cc: Imre Deak Cc: Matt Roper Signed-off-by: Anusha Srivatsa Signed-off-by: