Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-10-03 Thread Manasi Navare
On Thu, Sep 29, 2016 at 04:17:06PM -0700, Manasi Navare wrote: > On Thu, Sep 29, 2016 at 09:05:01AM -0700, Manasi Navare wrote: > > On Thu, Sep 29, 2016 at 06:48:43PM +0300, Jani Nikula wrote: > > > On Thu, 29 Sep 2016, Ville Syrjälä wrote: > > > > On Thu, Sep 29,

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-29 Thread Manasi Navare
On Thu, Sep 29, 2016 at 09:05:01AM -0700, Manasi Navare wrote: > On Thu, Sep 29, 2016 at 06:48:43PM +0300, Jani Nikula wrote: > > On Thu, 29 Sep 2016, Ville Syrjälä wrote: > > > On Thu, Sep 29, 2016 at 12:44:19PM +0100, Chris Wilson wrote: > > >> On Thu, Sep 29,

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-29 Thread Manasi Navare
On Thu, Sep 29, 2016 at 06:48:43PM +0300, Jani Nikula wrote: > On Thu, 29 Sep 2016, Ville Syrjälä wrote: > > On Thu, Sep 29, 2016 at 12:44:19PM +0100, Chris Wilson wrote: > >> On Thu, Sep 29, 2016 at 02:26:16PM +0300, Jani Nikula wrote: > >> > On Thu, 29 Sep 2016,

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-29 Thread Jani Nikula
On Thu, 29 Sep 2016, Ville Syrjälä wrote: > On Thu, Sep 29, 2016 at 12:44:19PM +0100, Chris Wilson wrote: >> On Thu, Sep 29, 2016 at 02:26:16PM +0300, Jani Nikula wrote: >> > On Thu, 29 Sep 2016, Manasi Navare wrote: >> > > On Tue, Sep

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-29 Thread Ville Syrjälä
On Thu, Sep 29, 2016 at 12:44:19PM +0100, Chris Wilson wrote: > On Thu, Sep 29, 2016 at 02:26:16PM +0300, Jani Nikula wrote: > > On Thu, 29 Sep 2016, Manasi Navare wrote: > > > On Tue, Sep 27, 2016 at 08:07:01PM +0300, Jani Nikula wrote: > > >> On Tue, 27 Sep 2016,

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-29 Thread Chris Wilson
On Thu, Sep 29, 2016 at 02:26:16PM +0300, Jani Nikula wrote: > On Thu, 29 Sep 2016, Manasi Navare wrote: > > On Tue, Sep 27, 2016 at 08:07:01PM +0300, Jani Nikula wrote: > >> On Tue, 27 Sep 2016, Manasi Navare wrote: > >> > On Mon, Sep 26,

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-29 Thread Jani Nikula
On Thu, 29 Sep 2016, Manasi Navare wrote: > On Tue, Sep 27, 2016 at 08:07:01PM +0300, Jani Nikula wrote: >> On Tue, 27 Sep 2016, Manasi Navare wrote: >> > On Mon, Sep 26, 2016 at 04:39:34PM +0300, Jani Nikula wrote: >> >> On Fri, 16 Sep 2016,

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-29 Thread Manasi Navare
On Tue, Sep 27, 2016 at 08:07:01PM +0300, Jani Nikula wrote: > On Tue, 27 Sep 2016, Manasi Navare wrote: > > On Mon, Sep 26, 2016 at 04:39:34PM +0300, Jani Nikula wrote: > >> On Fri, 16 Sep 2016, Manasi Navare wrote: > >> > According to the

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-27 Thread Jani Nikula
On Tue, 27 Sep 2016, Manasi Navare wrote: > On Mon, Sep 26, 2016 at 04:39:34PM +0300, Jani Nikula wrote: >> On Fri, 16 Sep 2016, Manasi Navare wrote: >> > According to the DisplayPort Spec, in case of Clock Recovery failure >> > the link

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-27 Thread Manasi Navare
On Mon, Sep 26, 2016 at 04:39:34PM +0300, Jani Nikula wrote: > On Fri, 16 Sep 2016, Manasi Navare wrote: > > According to the DisplayPort Spec, in case of Clock Recovery failure > > the link training sequence should fall back to the lower link rate > > followed by lower

Re: [Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-26 Thread Jani Nikula
On Fri, 16 Sep 2016, Manasi Navare wrote: > According to the DisplayPort Spec, in case of Clock Recovery failure > the link training sequence should fall back to the lower link rate > followed by lower lane count until CR succeeds. > On CR success, the sequence proceeds

[Intel-gfx] [PATCH v7 1/6] drm/i915: Fallback to lower link rate and lane count during link training

2016-09-16 Thread Manasi Navare
According to the DisplayPort Spec, in case of Clock Recovery failure the link training sequence should fall back to the lower link rate followed by lower lane count until CR succeeds. On CR success, the sequence proceeds with Channel EQ. In case of Channel EQ failures, it should fallback to lower