Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Cavitt, Jonathan
As far as I can tell, most if not all of the below comments have now been addressed in version 8. Please check to verify this is correct. -Jonathan Cavitt -Original Message- From: Tvrtko Ursulin Sent: Friday, October 6, 2023 6:05 AM To: Cavitt, Jonathan ;

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread John Harrison
On 10/6/2023 09:18, John Harrison wrote: On 10/6/2023 03:20, Nirmoy Das wrote: On 10/6/2023 12:11 PM, Tvrtko Ursulin wrote: Hi, Andi asked me to summarize what I think is unaddressed review feedback so far in order to consolidate and enable hopefully things to move forward. So I will try

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread John Harrison
On 10/6/2023 03:20, Nirmoy Das wrote: On 10/6/2023 12:11 PM, Tvrtko Ursulin wrote: Hi, Andi asked me to summarize what I think is unaddressed review feedback so far in order to consolidate and enable hopefully things to move forward. So I will try to re-iterate the comments and questions

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Tvrtko Ursulin
On 06/10/2023 11:11, Tvrtko Ursulin wrote: Hi, Andi asked me to summarize what I think is unaddressed review feedback so far in order to consolidate and enable hopefully things to move forward. So I will try to re-iterate the comments and questions below. But also note that there is a

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Andi Shyti
Hi, > > + /* Preallocate a shared id for use under memory pressure. */ > > + err = xa_alloc_cyclic_irq(>tlb_lookup, >serial_slot, wait, > > + xa_limit_32b, >next_seqno, GFP_KERNEL); > > + if (err == -ENOMEM) { > > + kfree(wait); > > + return

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Nirmoy Das
On 10/6/2023 12:11 PM, Tvrtko Ursulin wrote: Hi, Andi asked me to summarize what I think is unaddressed review feedback so far in order to consolidate and enable hopefully things to move forward. So I will try to re-iterate the comments and questions below. But also note that there is a

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-06 Thread Tvrtko Ursulin
Hi, Andi asked me to summarize what I think is unaddressed review feedback so far in order to consolidate and enable hopefully things to move forward. So I will try to re-iterate the comments and questions below. But also note that there is a bunch of new valid comments from John against

Re: [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-05 Thread John Harrison
On 10/5/2023 12:35, Jonathan Cavitt wrote: From: Prathap Kumar Valsan The GuC firmware had defined the interface for Translation Look-Aside Buffer (TLB) invalidation. We should use this interface when invalidating the engine and GuC TLBs. Add additional functionality to

[Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-05 Thread Jonathan Cavitt
From: Prathap Kumar Valsan The GuC firmware had defined the interface for Translation Look-Aside Buffer (TLB) invalidation. We should use this interface when invalidating the engine and GuC TLBs. Add additional functionality to intel_gt_invalidate_tlb, invalidating the GuC TLBs and falling back