[Intel-gfx] [maintainer-tools PATCH] doc: tell sphinx we don't have any static files

2017-08-16 Thread Jani Nikula
We don't have any static files to copy over, so comment out the config option about it. Silences warning: WARNING: html_static_path entry '/home/jani/src/maintainer-tools/_static' does not exist Cc: Daniel Vetter Signed-off-by: Jani Nikula --- conf.py | 2 +- 1 file changed, 1 insertion(+), 1

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Fix LSPCON support.

2017-08-16 Thread Jani Nikula
On Tue, 15 Aug 2017, Rodrigo Vivi wrote: > When LSPCON support was extended to CNL > one part was missed on lspcon_init. > > So, instead of adding check per platform on lspcon_init > let's use HAS_LSPCON that is already there for that > purpose. I think HAS_LSPCON will require tweaking going forw

[Intel-gfx] [patch net-next 3/3] net/sched: Change act_api and act_xxx modules to use IDR

2017-08-16 Thread Chris Mi
Typically, each TC filter has its own action. All the actions of the same type are saved in its hash table. But the hash buckets are too small that it degrades to a list. And the performance is greatly affected. For example, it takes about 0m11.914s to insert 64K rules. If we convert the hash table

[Intel-gfx] [patch net-next 0/3] net/sched: Improve getting objects by indexes

2017-08-16 Thread Chris Mi
Using current TC code, it is very slow to insert a lot of rules. In order to improve the rules update rate in TC, we introduced the following two changes: 1) changed cls_flower to use IDR to manage the filters. 2) changed all act_xxx modules to use IDR instead of a small

[Intel-gfx] [patch net-next 2/3] net/sched: Change cls_flower to use IDR

2017-08-16 Thread Chris Mi
Currently, all filters with the same priority are linked in a doubly linked list. Every filter should have a unique handle. To make the handle unique, we need to iterate the list every time to see if the handle exists or not when inserting a new filter. It is time-consuming. For example, it takes a

[Intel-gfx] [PATCH 1/7] drm/i915: Don't use MI_STORE_DWORD_IMM on Sandybridge/vcs

2017-08-16 Thread Chris Wilson
MI_STORE_DWORD_IMM just doesn't work on the video decode engine under Sandybridge, so refrain from using it. Then switch the selftests over to using the now common test prior to using MI_STORE_DWORD_IMM. Fixes: 7dd4f6729f92 ("drm/i915: Async GPU relocation processing") Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 3/7] drm/i915: Convert execbuf to use struct-of-array packing for critical fields

2017-08-16 Thread Chris Wilson
When userspace is doing most of the work, avoiding relocs (using NO_RELOC) and opting out of implicit synchronisation (using ASYNC), we still spend a lot of time processing the arrays in execbuf, even though we now should have nothing to do most of the time. One issue that becomes readily apparent

[Intel-gfx] [PATCH 7/7] drm/i915: Mark the GT as busy before idling the previous request

2017-08-16 Thread Chris Wilson
In a synchronous setup, we may retire the last request before we complete allocating the next request. As the last request is retired, we queue a timer to mark the device as idle, and promptly have to execute ad cancel that timer once we complete allocating the request and need to keep the device a

[Intel-gfx] [PATCH 2/7] drm/i915: Check context status before looking up our obj/vma

2017-08-16 Thread Chris Wilson
Since we keep the context around across the slow lookup where we may drop the struct_mutex, we should double check that the context is still valid upon reacquisition. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen Cc: Mika Kuoppala --- drivers/gpu/drm/i915/i915_gem_execbuf

Re: [Intel-gfx] [PATCH i-g-t] tests/gem_exec_params: Update the invalid-flag subtest for FENCE_ARRAY

2017-08-16 Thread Daniel Vetter
On Tue, Aug 15, 2017 at 03:37:23PM -0700, Jason Ekstrand wrote: > Tests for the new flag were added in 3685dabb0ab25eb1. > > Cc: Daniel Vetter > Cc: Chris Wilson Reviewed-by: Daniel Vetter > --- > tests/gem_exec_params.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --g

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: Don't use MI_STORE_DWORD_IMM on Sandybridge/vcs

2017-08-16 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915: Don't use MI_STORE_DWORD_IMM on Sandybridge/vcs URL : https://patchwork.freedesktop.org/series/28859/ State : success == Summary == Series 28859v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/288

Re: [Intel-gfx] [PATCH i-g-t] intel-ci: Add fast-feedback-simulation.testlist

2017-08-16 Thread Petri Latvala
On Tue, Jun 27, 2017 at 02:04:51PM -0700, Kelvin Gardiner wrote: > Added an initial list of fast feedback tests for simulation > environments. Merged, thanks. -- Petri Latvala ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.fr

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Fix LSPCON support.

2017-08-16 Thread Sharma, Shashank
There is probably one more place where we want this change, but I will try to cover that in my 4:2:0 for lspcon patch set. Meanwhile, please feel free to use: Reviewed-by: Shashank Sharma Regards Shashank On 8/16/2017 8:34 AM, Rodrigo Vivi wrote: When LSPCON support was extended to CNL one

[Intel-gfx] [maintainer-tools PATCH] dim: stop using Cc: drm-intel-fixes in dim fixes and cherry-pick-fixes

2017-08-16 Thread Jani Nikula
Nowadays our process relies on the Fixes: line, and Cc: drm-intel-fixes is redundant. Stop adding and using it. Signed-off-by: Jani Nikula --- dim | 17 + 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/dim b/dim index 85866488e0e0..0f70c76f103b 100755 --- a/dim +++

[Intel-gfx] [PATCH] dim: add error reporting for rerere cache pulling

2017-08-16 Thread Daniel Vetter
This silently failed for me, and I had no idea what's happening. v2: Use git pull -q (Jani). Signed-off-by: Daniel Vetter --- dim | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/dim b/dim index 85866488e0e0..124f9b374d4c 100755 --- a/dim +++ b/dim @@ -503

Re: [Intel-gfx] [PATCH] dim: add error reporting for rerere cache pulling

2017-08-16 Thread Jani Nikula
On Wed, 16 Aug 2017, Daniel Vetter wrote: > This silently failed for me, and I had no idea what's happening. > > v2: Use git pull -q (Jani). I presume with git pull -q stderr will contain clues for how to fix stuff, but there's no harm in printing more. ...but why not echoerr? With that, ack.

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Move dev_priv->mm.[un]bound_list to its own lock

2017-08-16 Thread Joonas Lahtinen
On Sat, 2017-08-12 at 12:51 +0100, Chris Wilson wrote: > Remove the struct_mutex requirement around dev_priv->mm.bound_list and > dev_priv->mm.unbound_list by giving it its own spinlock. This reduces > one more requirement for struct_mutex and in the process gives us > slightly more accurate unboun

[Intel-gfx] ✓ Fi.CI.BAT: success for lib/dummyload: Pad with a few nops so that we do not completely hog the system

2017-08-16 Thread Patchwork
== Series Details == Series: lib/dummyload: Pad with a few nops so that we do not completely hog the system URL : https://patchwork.freedesktop.org/series/28871/ State : success == Summary == IGT patchset tested on top of latest successful build c8811338e8a7723b5e99a303361ed97c092fc270 intel-

Re: [Intel-gfx] [PATCH igt] lib/dummyload: Pad with a few nops so that we do not completely hog the system

2017-08-16 Thread Jani Nikula
On Wed, 16 Aug 2017, Chris Wilson wrote: > + * trouble. See https:// Oops? BR, Jani. -- Jani Nikula, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/in

Re: [Intel-gfx] [PATCH i-g-t] intel-ci: Add fast-feedback-simulation.testlist

2017-08-16 Thread Daniel Vetter
On Wed, Aug 16, 2017 at 11:33 AM, Petri Latvala wrote: > On Tue, Jun 27, 2017 at 02:04:51PM -0700, Kelvin Gardiner wrote: >> Added an initial list of fast feedback tests for simulation >> environments. > > Merged, thanks. Yes I'm a bit late, just noticed this fly by: How does this interact wit ig

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Don't give up waiting on INVALID_MODE

2017-08-16 Thread Imre Deak
On Fri, Aug 11, 2017 at 06:58:27PM +0530, Shashank Sharma wrote: > Our current logic to read LSPCON's current mode, stops retries and > breaks wait-loop, if it gets LSPCON_MODE_INVALID as return from the > core function. This doesn't allow us to try reading the mode again. > > This patch removes t

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Don't give up waiting on INVALID_MODE

2017-08-16 Thread Imre Deak
On Tue, Aug 15, 2017 at 12:21:14AM +, Pandiyan, Dhinakaran wrote: > On Fri, 2017-08-11 at 18:58 +0530, Shashank Sharma wrote: > > Our current logic to read LSPCON's current mode, stops retries and > > breaks wait-loop, if it gets LSPCON_MODE_INVALID as return from the > > core function. This do

Re: [Intel-gfx] [PATCH igt] lib/dummyload: Pad with a few nops so that we do not completely hog the system

2017-08-16 Thread Chris Wilson
Quoting Jani Nikula (2017-08-16 15:08:47) > On Wed, 16 Aug 2017, Chris Wilson wrote: > > + * trouble. See https:// > > Oops? It was a fill in the blank. I don't think we have a bug report for this yet. -Chris ___ Intel-gfx mailing list Intel-gfx@l

[Intel-gfx] [PATCH i-g-t] tools/intel_vbt_decode: Fix decoding of child device structure

2017-08-16 Thread ville . syrjala
From: Ville Syrjälä Fix decoding of the start of the child device structure. I had accidentally duplicated the "device class/type" member and forgot to include the add-in offset later. Fortunately both were two byte fields so they effectively cancelled each other out and thus the remainder of the

[Intel-gfx] [PATCH v2] drm/i915: Set our shrinker->batch to 4096 (~16MiB)

2017-08-16 Thread Chris Wilson
Prefer to defer activating our GEM shrinker until we have a few megabytes to free; or we have accumulated sufficient mempressure by deferring the reclaim to force a shrink. The intent is that because our objects may typically be large, we are too effective at shrinking and are not rewarded for free

Re: [Intel-gfx] [PATCH] drm/i915/vbt: ignore extraneous child devices for a port

2017-08-16 Thread Ville Syrjälä
On Fri, Aug 11, 2017 at 02:39:07PM +0300, Jani Nikula wrote: > Ever since we've parsed VBT child devices, starting from 6acab15a7b0d > ("drm/i915: use the HDMI DDI buffer translations from VBT"), we've > ignored the child device information if more than one child device > references the same port.

[Intel-gfx] [PATCH v2] drm/i915: Beef up the IPS vs. CRC workaround

2017-08-16 Thread ville . syrjala
From: Ville Syrjälä Oneshot disabling of IPS when CRC capturing is started is insufficient. IPS may get re-enabled by any plane update, and hence tests that keep CRC capturing on across plane updates will start to see inconsistent results as soon as IPS kicks back in. Add a new knob into the crtc

Re: [Intel-gfx] [PATCH] drm/i915/vbt: ignore extraneous child devices for a port

2017-08-16 Thread Jani Nikula
On Wed, 16 Aug 2017, Ville Syrjälä wrote: > On Fri, Aug 11, 2017 at 02:39:07PM +0300, Jani Nikula wrote: >> Ever since we've parsed VBT child devices, starting from 6acab15a7b0d >> ("drm/i915: use the HDMI DDI buffer translations from VBT"), we've >> ignored the child device information if more th

[Intel-gfx] [PATCH] drm/i915/gen9+: Set same power state before hibernation image save/restore

2017-08-16 Thread Imre Deak
Atm, on GEN9 big core platforms before saving the hibernation image we uninitialize the display, disabling power wells manually, while before restoring the image we keep things powered (letting HW/DMC power down things as needed). The state mismatch will trigger the following error: DC state misma

Re: [Intel-gfx] [PATCH i-g-t] tools/intel_vbt_decode: Fix decoding of child device structure

2017-08-16 Thread Jani Nikula
On Wed, 16 Aug 2017, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Fix decoding of the start of the child device structure. I had > accidentally duplicated the "device class/type" member and forgot to > include the add-in offset later. Fortunately both were two byte fields > so th

Re: [Intel-gfx] [PATCH] drm/i915/gen10: implement gen 10 watermarks calculations

2017-08-16 Thread Rodrigo Vivi
this patch and patch 6 merged to dinq. thanks for patch and for the reviews. On Tue, Aug 15, 2017 at 11:30 PM, Mahesh Kumar wrote: > patch looks good to me, > > Reviewed-by: Mahesh Kumar > > > On Saturday 12 August 2017 05:08 AM, Rodrigo Vivi wrote: > > comment. Code matches recent spec. > v3: R

[Intel-gfx] [PULL] drm-intel-fixes

2017-08-16 Thread Jani Nikula
Hi Dave, drm/i915 fixes for -rc6. Chris' "drm/i915: Perform an invalidate prior to executing golden renderstate" and Daniel's "drm/i915: Avoid the gpu reset vs. modeset deadlock" seem like the most important ones. While we're already running CI tests on drm-intel-fixes and drm-intel-next-fixes, w

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Refactor testing obj->mm.pages (rev4)

2017-08-16 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Refactor testing obj->mm.pages (rev4) URL : https://patchwork.freedesktop.org/series/28709/ State : success == Summary == Series 28709v4 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/28709/revisio

Re: [Intel-gfx] [PATCH igt] lib/dummyload: Pad with a few nops so that we do not completely hog the system

2017-08-16 Thread Chris Wilson
Quoting Mika Kuoppala (2017-08-16 15:45:54) > Chris Wilson writes: > > > Part of the attraction of using a recursive batch is that it is > > hard on the system (executing the "function" call is apparently > > quite expensive). However, the GPU may hog the entire system for > > a few minutes, prev

Re: [Intel-gfx] [PATCH igt 1/3] igt/gem_exec_schedule: Exercise reordering with many priority levels

2017-08-16 Thread Michał Winiarski
On Thu, Aug 03, 2017 at 01:30:27PM +0100, Chris Wilson wrote: > Apply a little more stress to the scheduler. Already replied to this one in <20170731152734.ttskb3jz2bmxq...@mwiniars-main.ger.corp.intel.com> (essentially r-b - after couple of small tweaks) -Michał

Re: [Intel-gfx] [PATCH 1/2] drm: add retries for lspcon status check

2017-08-16 Thread Sharma, Shashank
Thanks for the review, Imre. My comments, inline. Regards Shashank On 8/16/2017 7:35 PM, Imre Deak wrote: On Fri, Aug 11, 2017 at 06:58:26PM +0530, Shashank Sharma wrote: It's an observation during some CI tests that few LSPCON chips respond slow while system is under load, and need some delay

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Don't give up waiting on INVALID_MODE

2017-08-16 Thread Sharma, Shashank
Regards Shashank On 8/15/2017 5:51 AM, Pandiyan, Dhinakaran wrote: On Fri, 2017-08-11 at 18:58 +0530, Shashank Sharma wrote: Our current logic to read LSPCON's current mode, stops retries and breaks wait-loop, if it gets LSPCON_MODE_INVALID as return from the core function. This doesn't allow

Re: [Intel-gfx] [PATCH 1/2] drm: add retries for lspcon status check

2017-08-16 Thread Imre Deak
On Wed, Aug 16, 2017 at 09:18:58PM +0530, Sharma, Shashank wrote: > Thanks for the review, Imre. > > My comments, inline. > > Regards > Shashank > On 8/16/2017 7:35 PM, Imre Deak wrote: > > On Fri, Aug 11, 2017 at 06:58:26PM +0530, Shashank Sharma wrote: > > > It's an observation during some CI t

Re: [Intel-gfx] [PATCH 1/2] drm: add retries for lspcon status check

2017-08-16 Thread Sharma, Shashank
Regards Shashank On 8/16/2017 9:42 PM, Imre Deak wrote: On Wed, Aug 16, 2017 at 09:18:58PM +0530, Sharma, Shashank wrote: Thanks for the review, Imre. My comments, inline. Regards Shashank On 8/16/2017 7:35 PM, Imre Deak wrote: On Fri, Aug 11, 2017 at 06:58:26PM +0530, Shashank Sharma wrot

Re: [Intel-gfx] [PATCH v5] drm/i915/psr: Account for sink CRC raciness on some panels

2017-08-16 Thread Jim Bride
On Tue, Aug 15, 2017 at 04:41:52PM -0700, Rodrigo Vivi wrote: > On Tue, Aug 15, 2017 at 9:58 AM, Jim Bride wrote: > > On Wed, Aug 09, 2017 at 01:40:00PM -0700, Jim Bride wrote: > >> According to the eDP spec, when the count field in TEST_SINK_MISC > >> increments then the six bytes of sink CRC inf

[Intel-gfx] [maintainer-tools PATCH 1/2] dim: Accept .mbox and .patch files as apply-branch optional argument.

2017-08-16 Thread Rodrigo Vivi
Instead of forcing users to cat .patch or .mbox let's accept them as optional argument for dim apply-branches. Cc: Daniel Vetter Cc: Jani Nikula Signed-off-by: Rodrigo Vivi --- dim | 10 +- dim.rst | 2 +- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/dim b/dim i

[Intel-gfx] [maintainer-tools PATCH 2/2] dim: Accept patchwork URLs as apply-branch optional argument.

2017-08-16 Thread Rodrigo Vivi
Instead of having to manually download mbox from patchwork let's make dim to do it directly. Cc: Daniel Vetter Cc: Jani Nikula Signed-off-by: Rodrigo Vivi --- dim | 18 ++ 1 file changed, 18 insertions(+) diff --git a/dim b/dim index e98d23b24ec0..73b48da7f436 100755 --- a/dim

Re: [Intel-gfx] [maintainer-tools PATCH 2/2] dim: Accept patchwork URLs as apply-branch optional argument.

2017-08-16 Thread Rodrigo Vivi
On Wed, Aug 16, 2017 at 11:13 AM, Rodrigo Vivi wrote: > Instead of having to manually download mbox from patchwork > let's make dim to do it directly. > > Cc: Daniel Vetter > Cc: Jani Nikula > Signed-off-by: Rodrigo Vivi > --- > dim | 18 ++ > 1 file changed, 18 insertions(+) >

[Intel-gfx] [RFC PATCH 4/4] drm/i915: Enable voltage swing before enabling DDI_BUF_CTL.

2017-08-16 Thread Rodrigo Vivi
Sequences for DisplayPort asks us to " Configure voltage swing and related IO settings. Refer to DDI Buffer section." before "Configure and enable DDI_BUF_CTL" On BXT and CNL this means to execute the ddi vswing sequences. At this point these sequences calls are getting duplicated for DP because

[Intel-gfx] [PATCH 3/4] drm/i915: Align vswing sequences with old ddi buffer registers.

2017-08-16 Thread Rodrigo Vivi
Vswing sequences on BXT and CNL are equivalent to the ddi buffer registers setting on other platforms. For some reason it got aligned with skl_ddi_set_iboost what is semantically incorrect. This forced us to keep skipping ddi buffer translation tables on the platforms that has the vswing sequences

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Introduce intel_ddi_dp_level.

2017-08-16 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Introduce intel_ddi_dp_level. URL : https://patchwork.freedesktop.org/series/28883/ State : success == Summary == Series 28883v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/28883/revisions/1/mbox

Re: [Intel-gfx] [PATCH] drm/i915/edp: Increase T12 panel delay to 900 ms to fix DP AUX CH timeouts

2017-08-16 Thread Rodrigo Vivi
It seems this quirk is randomly masking the real issue. On Wed, Aug 16, 2017 at 12:35 PM, Manasi Navare wrote: > Hi Daniel/Clint, > > Could you review this one, we need this patch to get pushed > to drm-tip so that we can see if SKL 6700hq is stable with this patch. > Thanks a lot in advanvce! >

Re: [Intel-gfx] [PATCH i-g-t] tools/intel_vbt_decode: Fix decoding of child device structure

2017-08-16 Thread Clint Taylor
This patch fixes the alignment. I spotted another issue with teh structure and will fix it once this one is merged. Reviewed-by: Clint Taylor Tested-by: Clint Taylor On 08/16/2017 07:20 AM, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä Fix decoding of the start of the child dev

Re: [Intel-gfx] [PATCH v5] drm/i915/edp: Be less aggressive about changing link config on eDP

2017-08-16 Thread Manasi Navare
On Wed, Aug 09, 2017 at 02:21:07PM -0700, Jim Bride wrote: > This set of changes has some history to them. There were several attempts > to add what was called "fast link training" to i915, which actually wasn't > fast link training as per the DP spec. These changes were: > > commit 5fa836a9d859

Re: [Intel-gfx] [PATCH] drm/i915/edp: Increase T12 panel delay to 900 ms to fix DP AUX CH timeouts

2017-08-16 Thread Clint Taylor
On 08/16/2017 02:19 PM, Rodrigo Vivi wrote: It seems this quirk is randomly masking the real issue. It could be masking the real issue. The most likely cause of this issue is a slow power fall off to the panel when the PPS requests power-off. We would need physical access to the platform itse

Re: [Intel-gfx] [PATCH] drm/i915/edp: Increase T12 panel delay to 900 ms to fix DP AUX CH timeouts

2017-08-16 Thread Manasi Navare
On Wed, Aug 16, 2017 at 03:54:35PM -0700, Clint Taylor wrote: > > > On 08/16/2017 02:19 PM, Rodrigo Vivi wrote: > >It seems this quirk is randomly masking the real issue. > It could be masking the real issue. The most likely cause of this issue is a > slow power fall off to the panel when the PPS

[Intel-gfx] [PATCH] drm/i915: Split pin mapping into per platform functions

2017-08-16 Thread Anusha Srivatsa
Cleanup the code. Map the pins in accordance to individual platforms rather than according to ports. Create separate functions for platforms. v2: - Add missing condition for CoffeeLake. Make platform specific functions static. Add function i915_ddc_pin_mapping(). v3: - Rename functions to x_p

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Enable Audio Pin Buffer.

2017-08-16 Thread Pandiyan, Dhinakaran
On Thu, 2017-07-06 at 14:03 -0700, Rodrigo Vivi wrote: > Starting on CNL, we need to enable Audio Pin Buffer. > > By the spec it seems that this is part of audio programming, I am not very clear where the pin buffer enabling/disabling step falls in the audio programming sequence. From what I unde

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Split pin mapping into per platform functions (rev3)

2017-08-16 Thread Patchwork
== Series Details == Series: drm/i915: Split pin mapping into per platform functions (rev3) URL : https://patchwork.freedesktop.org/series/27965/ State : success == Summary == Series 27965v3 drm/i915: Split pin mapping into per platform functions https://patchwork.freedesktop.org/api/1.0/serie

Re: [Intel-gfx] [PATCH i-g-t] intel-ci: Add fast-feedback-simulation.testlist

2017-08-16 Thread Kelvin Gardiner
On 16/08/17 07:04, Daniel Vetter wrote: On Wed, Aug 16, 2017 at 11:33 AM, Petri Latvala wrote: On Tue, Jun 27, 2017 at 02:04:51PM -0700, Kelvin Gardiner wrote: Added an initial list of fast feedback tests for simulation environments. Merged, thanks. Yes I'm a bit late, just noticed this

[Intel-gfx] [RFC] drm/i915/firmware: Load GuC and HuC firmware using async work.

2017-08-16 Thread Joseph Garvey
The DMC firmware is currently being loaded using async work. We can do the same for the GuC and HuC firmware. Also wait for the work to finish before the firmware transfer. Cc: Sagar Kamble Cc: Rodrigo Vivi CC: Oscar Mateo Cc: Anusha Srivatsa Cc: Daniel Vetter Signed-off-by: Joseph Garvey --

[Intel-gfx] [PATCH 1/2] drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.

2017-08-16 Thread Rodrigo Vivi
This is heavily based on a initial patch provided by Ville plus all changes provided later by Ander. As Geminilake, Cannonlake also supports 2 pixels per clock. Different from Geminilake we are not implementing the 99% Wa. But we can revisit that decision later if we find out any limitation on la

[Intel-gfx] [PATCH 2/2] drm/i915: Introduce HAS_2PPC.

2017-08-16 Thread Rodrigo Vivi
Let's make it easier to add platforms that supports 2 pixel per clock. With spread checks per platform it was easy to miss one or another spot leading to loose some time on debug. Hopefully this check would save some cases in the future. No functional change. Cc: Paulo Zanoni Cc: Dhinakaran Pa

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/firmware: Load GuC and HuC firmware using async work.

2017-08-16 Thread Patchwork
== Series Details == Series: drm/i915/firmware: Load GuC and HuC firmware using async work. URL : https://patchwork.freedesktop.org/series/28889/ State : failure == Summary == Series 28889v1 drm/i915/firmware: Load GuC and HuC firmware using async work. https://patchwork.freedesktop.org/api/1.

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.

2017-08-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/cnl: Allow 2 pixel per clock on Cannonlake. URL : https://patchwork.freedesktop.org/series/28890/ State : success == Summary == Series 28890v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/28890/re

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Enable Audio Pin Buffer.

2017-08-16 Thread Sanyog Kale
On Wed, Aug 16, 2017 at 06:46:26PM -0500, Pandiyan, Dhinakaran wrote: > On Thu, 2017-07-06 at 14:03 -0700, Rodrigo Vivi wrote: > > Starting on CNL, we need to enable Audio Pin Buffer. > > > > By the spec it seems that this is part of audio programming, > > I am not very clear where the pin buffer

Re: [Intel-gfx] [PATCH 4/8] drm/i915/guc: Disable critical logging in GuC by default from GuC v9

2017-08-16 Thread Srivatsa, Anusha
>-Original Message- >From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of >Kamble, Sagar A >Sent: Monday, August 14, 2017 3:45 AM >To: Chris Wilson ; intel-gfx@lists.freedesktop.org >Subject: Re: [Intel-gfx] [PATCH 4/8] drm/i915/guc: Disable critical logging in >

[Intel-gfx] [PATCH] drm/i915: Fix integer overflow tests

2017-08-16 Thread Dan Carpenter
There are some potential integer overflows here on 64 bit systems. The condition "if (nfences > SIZE_MAX / sizeof(*fences))" can only be true on 32 bit systems, it's a no-op on 64 bit, so let's ignore the check for now and look a couple lines after: if (!access_ok(VERIFY_READ, user, nfenc

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix integer overflow tests

2017-08-16 Thread Patchwork
== Series Details == Series: drm/i915: Fix integer overflow tests URL : https://patchwork.freedesktop.org/series/28898/ State : success == Summary == Series 28898v1 drm/i915: Fix integer overflow tests https://patchwork.freedesktop.org/api/1.0/series/28898/revisions/1/mbox/ Test gem_ringfill:

[Intel-gfx] [PATCH] drm/i915: Do not do link training fallback or prune modes for eDP

2017-08-16 Thread Manasi Navare
In case of eDP because the panel has a fixed mode we cannot link train fallback and prune modes since this results in no modes available for eDP connector. Also since its a panel, link training should not fail dynamically based on cable conditions like in case of DP. Cc: Jani Nikula Cc: Jim Brid