[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: Eliminate devid sprinkle URL : https://patchwork.freedesktop.org/series/38749/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2cce38de5993 drm/i915: Eliminate devid sprinkle -:171: WARNING: line over 80 characters #171: FILE:

[Intel-gfx] [PATCH igt] lib/dummyload: Avoid assertions in lowlevel spin constructor

2018-02-22 Thread Chris Wilson
__igt_spin_batch_new() may be used inside a background helper which is competing against the GPU being reset. As such, we cannot even assert that the spin->handle is busy immediately after submission as it may have already been reset by another client writing to i915_wedged. Signed-off-by: Chris

[Intel-gfx] [RFC v2] drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Introduce subplatform mask to eliminate throughout the code devid checking sprinkle, mostly courtesy of IS_*_UL[TX] macros. Subplatform mask initialization is moved either to static tables (Ironlake M) or runtime device info init (Pineview,

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later

2018-02-22 Thread Chris Wilson
Quoting Mika Kuoppala (2018-02-22 08:51:40) > Chris Wilson writes: > > > Print out the current request/context before doing the GEM_BUG_ON, so > > that we can inspect the values in the ftrace. > > > > Signed-off-by: Chris Wilson > > Cc: Mika

[Intel-gfx] [RFC] drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Introduce subplatform mask to eliminate throughout the code devid checking sprinkle, mostly courtesy of IS_*_UL[TX] macros. Subplatform mask initialization is moved either to static tables (Ironlake M) or runtime device info init (Pineview,

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it

2018-02-22 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it URL : https://patchwork.freedesktop.org/series/38744/ State : success == Summary == Series 38744v1 series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux

Re: [Intel-gfx] [RFC] drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-22 08:09:07) > From: Tvrtko Ursulin > > Introduce subplatform mask to eliminate throughout the code devid checking > sprinkle, mostly courtesy of IS_*_UL[TX] macros. > > Subplatform mask initialization is moved either to static tables

Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Support engine busy stats

2018-02-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-22 08:26:58) > > On 22/02/2018 07:51, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-02-22 06:07:32) > >> From: Tvrtko Ursulin > >> > >> Place context in/out hooks into the GuC backend, when contexts are > >> assigned to ports, and

[Intel-gfx] ✓ Fi.CI.BAT: success for Iterate over physical engines

2018-02-22 Thread Patchwork
== Series Details == Series: Iterate over physical engines URL : https://patchwork.freedesktop.org/series/38746/ State : success == Summary == IGT patchset tested on top of latest successful build af65798b6674e28816bd13c096963c2d7fcdd856 lib/igt_perf: Find active perf CPU with latest DRM-Tip

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later

2018-02-22 Thread Mika Kuoppala
Chris Wilson writes: > Print out the current request/context before doing the GEM_BUG_ON, so > that we can inspect the values in the ftrace. > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala Reviewed-by: Mika

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Chris Wilson
Quoting Patchwork (2018-02-22 08:30:36) > == Series Details == > > Series: drm/i915: Eliminate devid sprinkle > URL : https://patchwork.freedesktop.org/series/38749/ > State : warning > > == Summary == > > Series 38749v1 drm/i915: Eliminate devid sprinkle >

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Add a GEM_TRACE to show when the context is completed

2018-02-22 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2018-02-21 15:21:04) >> Chris Wilson writes: >> >> > Include a GEM_TRACE to show when the context is complete and we advance >> > the ELSP port. >> > >> > Signed-off-by: Chris Wilson

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/guc: Support engine busy stats (rev2)

2018-02-22 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/guc: Support engine busy stats (rev2) URL : https://patchwork.freedesktop.org/series/38717/ State : failure == Summary == Test drv_missed_irq: pass -> SKIP (shard-apl) Test drv_selftest:

Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Support engine busy stats

2018-02-22 Thread Tvrtko Ursulin
On 22/02/2018 07:51, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-02-22 06:07:32) From: Tvrtko Ursulin Place context in/out hooks into the GuC backend, when contexts are assigned to ports, and removed from them, in order to be able to provide engine busy stats

[Intel-gfx] [PATCH igt] igt/gem_ctx_isolation: Fix checking for context support

2018-02-22 Thread Chris Wilson
Missed the new method for igt_require(gem_has_contexts()) in the rebase. Signed-off-by: Chris Wilson --- tests/gem_ctx_isolation.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/gem_ctx_isolation.c b/tests/gem_ctx_isolation.c index

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: Eliminate devid sprinkle URL : https://patchwork.freedesktop.org/series/38749/ State : warning == Summary == Series 38749v1 drm/i915: Eliminate devid sprinkle https://patchwork.freedesktop.org/api/1.0/series/38749/revisions/1/mbox/ Test gem_mmap_gtt:

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Tvrtko Ursulin
On 22/02/2018 08:35, Chris Wilson wrote: Quoting Patchwork (2018-02-22 08:30:36) == Series Details == Series: drm/i915: Eliminate devid sprinkle URL : https://patchwork.freedesktop.org/series/38749/ State : warning == Summary == Series 38749v1 drm/i915: Eliminate devid sprinkle

[Intel-gfx] [PATCH 1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list

2018-02-22 Thread Chris Wilson
The goal here is to try and reduce the latency of signaling additional requests following the wakeup from interrupt by reducing the list of to-be-signaled requests from an rbtree to a sorted linked list. The original choice of using an rbtree was to facilitate random insertions of request into the

[Intel-gfx] [PATCH 2/2] drm/i915/breadcrumbs: Assert all missed breadcrumbs were signaled

2018-02-22 Thread Chris Wilson
When parking the engines and their breadcrumbs, if we have waiters left then they missed their wakeup. Verify that each waiter's seqno did complete. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_breadcrumbs.c |

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it

2018-02-22 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Add enum aux_ch and clean up the aux init to use it URL : https://patchwork.freedesktop.org/series/38744/ State : warning == Summary == Test kms_pipe_crc_basic: Subgroup read-crc-pipe-c-frame-sequence:

[Intel-gfx] [PATCH igt] Iterate over physical engines

2018-02-22 Thread Chris Wilson
We current have a single for_each_engine() iterator which we use to generate both a set of uABI engines and a set of physical engines. Determining what uABI ring-id corresponds to an actual HW engine is tricky, so pull that out to a library function and introduce for_each_physical_engine() for

[Intel-gfx] [PATCH igt] igt/perf_pmu: Fix 64b printf-isms

2018-02-22 Thread Chris Wilson
My bad, perf_pmu.c: In function ‘accuracy’: perf_pmu.c:1533:4: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘uint64_t’ [-Wformat] perf_pmu.c:1533:4: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 6 has type

[Intel-gfx] [PATCH] drm/i915: Move page sizes out of the 8-bit sandwich

2018-02-22 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Slightly smaller code and a bit more logical layout. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev2)

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: Eliminate devid sprinkle (rev2) URL : https://patchwork.freedesktop.org/series/38749/ State : warning == Summary == Series 38749v2 drm/i915: Eliminate devid sprinkle https://patchwork.freedesktop.org/api/1.0/series/38749/revisions/2/mbox/ Test

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Extend partial vma coverage to check parallel creation

2018-02-22 Thread Chris Wilson
Quoting Chris Wilson (2018-01-16 10:11:43) > One important use of partial vma is to provide mappable access to the > object while it is being used elsewhere (pinned entirely into the > unmappable portion of the Global GTT, i.e. for use as a display scanout). > > Signed-off-by: Chris Wilson

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Eliminate devid sprinkle (rev3)

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: Eliminate devid sprinkle (rev3) URL : https://patchwork.freedesktop.org/series/38749/ State : warning == Summary == Series 38749v3 drm/i915: Eliminate devid sprinkle https://patchwork.freedesktop.org/api/1.0/series/38749/revisions/3/mbox/ Test

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Prepare for more rings (rev2)

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915/icl: Prepare for more rings (rev2) URL : https://patchwork.freedesktop.org/series/38150/ State : success == Summary == Series 38150v2 drm/i915/icl: Prepare for more rings https://patchwork.freedesktop.org/api/1.0/series/38150/revisions/2/mbox/ Test

Re: [Intel-gfx] [CI] drm/i915/icl: Prepare for more rings

2018-02-22 Thread Chris Wilson
Quoting Mika Kuoppala (2018-02-22 10:28:39) > diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h > index e920dab7f1b8..1b61b7f8c2ec 100644 > --- a/drivers/gpu/drm/i915/i915_gem.h > +++ b/drivers/gpu/drm/i915/i915_gem.h > @@ -54,6 +54,6 @@ > #define GEM_TRACE(...) do {

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reduce context HW ID lifetime

2018-02-22 Thread Chris Wilson
Quoting Lionel Landwerlin (2018-02-21 01:12:46) > On 09/02/18 20:47, Chris Wilson wrote: > > Quoting Daniele Ceraolo Spurio (2018-02-09 18:56:36) > >> > >> On 09/02/18 02:22, Chris Wilson wrote: > >>> Future gen reduce the number of bits we will have available to > >>> differentiate between

[Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Introduce subplatform mask to eliminate throughout the code devid checking sprinkle, mostly courtesy of IS_*_UL[TX] macros. Subplatform mask initialization is moved either to static tables (Ironlake M) or runtime device info init (Pineview,

Re: [Intel-gfx] [PATCH igt v3] Iterate over physical engines

2018-02-22 Thread Tvrtko Ursulin
On 22/02/2018 07:52, Chris Wilson wrote: We current have a single for_each_engine() iterator which we use to generate both a set of uABI engines and a set of physical engines. Determining what uABI ring-id corresponds to an actual HW engine is tricky, so pull that out to a library function and

Re: [Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-22 10:15:04) > +void intel_device_info_subplatform_init(struct intel_device_info *info) > +{ > + struct drm_i915_private *i915 = > + container_of(info, struct drm_i915_private, info); > + u16 devid = INTEL_DEVID(i915); > + > + if

Re: [Intel-gfx] [PATCH 2/4] drm/i915/icl: Show interrupt registers in debugfs

2018-02-22 Thread Mika Kuoppala
Daniele Ceraolo Spurio writes: > On 20/02/18 07:37, Mika Kuoppala wrote: >> From: Tvrtko Ursulin >> >> Show GEN11 specific interrupt registers in debugfs >> >> v2: Update for POR changes. (Daniele Ceraolo Spurio) >> v3: get runtime pm

[Intel-gfx] [CI] drm/i915/icl: Prepare for more rings

2018-02-22 Thread Mika Kuoppala
From: Tvrtko Ursulin Gen11 will add more VCS and VECS rings so prepare the infrastructure to support that. Bspec: 7021 v2: Rebase. v3: Rebase. v4: Rebase. v5: Rebase. v6: - Update for POR changes. (Daniele Ceraolo Spurio) - Add provisional guc engine ids - to be

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list

2018-02-22 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list URL : https://patchwork.freedesktop.org/series/38755/ State : success == Summary == Series 38755v1 series starting with [1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to

Re: [Intel-gfx] [PATCH 2/2] drm/i915/cnl: New power domain for AUX IO.

2018-02-22 Thread Imre Deak
On Wed, Feb 21, 2018 at 11:28:56PM -0800, Dhinakaran Pandiyan wrote: > PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain > for AUX-A enables DC_OFF well too. This is not required, so add a new > AUX_IO_A domain for AUX-A to allow DC states to remain enabled. Other AUX >

Re: [Intel-gfx] [RFC v3] drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-22 10:15:04) > +#define INTEL_SUBPLATFORM_IRONLAKE_M (0) > + > +#define INTEL_SUBPLATFORM_PINEVIEW_G (0) > +#define INTEL_SUBPLATFORM_PINEVIEW_M (1) Looking at these, we can reduce these to IS_MOBILE. Clearer before or after this conversion? Pretty orthogonal I

Re: [Intel-gfx] [RFC] drm/i915: Eliminate devid sprinkle

2018-02-22 Thread Tvrtko Ursulin
On 22/02/2018 08:24, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-02-22 08:09:07) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 71fdfb0451ef..7b6211061fba 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++

Re: [Intel-gfx] [PATCH igt] igt/perf_pmu: Fix 64b printf-isms

2018-02-22 Thread Tvrtko Ursulin
On 22/02/2018 10:33, Chris Wilson wrote: My bad, perf_pmu.c: In function ‘accuracy’: perf_pmu.c:1533:4: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘uint64_t’ [-Wformat] perf_pmu.c:1533:4: warning: format ‘%lu’ expects argument of type ‘long

Re: [Intel-gfx] [PATCH] drm/i915: Move page sizes out of the 8-bit sandwich

2018-02-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-02-22 11:16:58) > From: Tvrtko Ursulin > > Slightly smaller code and a bit more logical layout. > > Signed-off-by: Tvrtko Ursulin > --- > drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- > 1 file changed, 2

Re: [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane

2018-02-22 Thread Juha-Pekka Heikkila
On 22.02.2018 04:39, Srinivas, Vidya wrote: -Original Message- From: Juha-Pekka Heikkila [mailto:juhapekka.heikk...@gmail.com] Sent: Wednesday, February 21, 2018 7:52 PM To: Srinivas, Vidya ; intel- g...@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list

2018-02-22 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/breadcrumbs: Reduce signaler rbtree to a sorted list URL : https://patchwork.freedesktop.org/series/38755/ State : success == Summary == Test pm_rps: Subgroup reset: incomplete -> PASS (shard-apl)

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Move page sizes out of the 8-bit sandwich

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: Move page sizes out of the 8-bit sandwich URL : https://patchwork.freedesktop.org/series/38764/ State : success == Summary == Series 38764v1 drm/i915: Move page sizes out of the 8-bit sandwich

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reduce context HW ID lifetime

2018-02-22 Thread Lionel Landwerlin
On 22/02/18 09:17, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-02-21 01:12:46) On 09/02/18 20:47, Chris Wilson wrote: Quoting Daniele Ceraolo Spurio (2018-02-09 18:56:36) On 09/02/18 02:22, Chris Wilson wrote: Future gen reduce the number of bits we will have available to

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Move page sizes out of the 8-bit sandwich

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: Move page sizes out of the 8-bit sandwich URL : https://patchwork.freedesktop.org/series/38764/ State : failure == Summary == Series 38764v1 drm/i915: Move page sizes out of the 8-bit sandwich

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add enum aux_ch and clean up the aux init to use it

2018-02-22 Thread Ville Syrjälä
On Thu, Feb 22, 2018 at 07:25:22AM +, Pandiyan, Dhinakaran wrote: > > > > On Tue, 2018-02-20 at 11:31 -0800, Rodrigo Vivi wrote: > > On Tue, Feb 20, 2018 at 07:05:22PM +0200, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Since we no longer have

Re: [Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()

2018-02-22 Thread Daniel Thompson
On Thu, Feb 22, 2018 at 02:01:16PM +0200, Claudiu Beznea wrote: > Add PWM mode to pwm_config() function. The drivers which uses pwm_config() > were adapted to this change. > > Signed-off-by: Claudiu Beznea > --- > arch/arm/mach-s3c24xx/mach-rx1950.c | 11

[Intel-gfx] ✗ Fi.CI.IGT: failure for Iterate over physical engines

2018-02-22 Thread Patchwork
== Series Details == Series: Iterate over physical engines URL : https://patchwork.freedesktop.org/series/38746/ State : failure == Summary == Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: dmesg-warn -> PASS (shard-snb) fdo#105185 Test

[Intel-gfx] ✓ Fi.CI.BAT: success for lib/dummyload: Avoid assertions in lowlevel spin constructor

2018-02-22 Thread Patchwork
== Series Details == Series: lib/dummyload: Avoid assertions in lowlevel spin constructor URL : https://patchwork.freedesktop.org/series/38753/ State : success == Summary == IGT patchset tested on top of latest successful build f09f5c6a197424cef70d6864416ac1f4fd23 igt/perf_pmu: Fix 64b

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Nuke aux regs from intel_dp

2018-02-22 Thread Ville Syrjälä
On Thu, Feb 22, 2018 at 07:16:07AM +, Pandiyan, Dhinakaran wrote: > > On Tue, 2018-02-20 at 21:00 +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Just store function pointers that give us the correct register offsets > > instead of storing the

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: expose RCS topology to userspace

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: expose RCS topology to userspace URL : https://patchwork.freedesktop.org/series/38801/ State : success == Summary == Series 38801v1 drm/i915: expose RCS topology to userspace https://patchwork.freedesktop.org/api/1.0/series/38801/revisions/1/mbox/ Test

Re: [Intel-gfx] [PATCH v3 06/10] pwm: add PWM modes

2018-02-22 Thread Andy Shevchenko
On Thu, Feb 22, 2018 at 2:01 PM, Claudiu Beznea wrote: > Add PWM normal and complementary modes. > +- PWM_DTMODE_COMPLEMENTARY: PWM complementary working mode (for PWM > +channels two outputs); if not specified, the default for PWM channel will > +be used What DT

Re: [Intel-gfx] [PATCH v3 3/6] drm/i915: Clean up fbc vs. plane checks

2018-02-22 Thread Ville Syrjälä
On Thu, Feb 22, 2018 at 04:07:53PM +0200, Ville Syrjälä wrote: > On Wed, Feb 21, 2018 at 09:59:27PM +, Chris Wilson wrote: > > Quoting Ville Syrjala (2018-02-21 17:31:01) > > > From: Ville Syrjälä > > > > > > Let's record the information whether a plane can do

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Move page sizes out of the 8-bit sandwich

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: Move page sizes out of the 8-bit sandwich URL : https://patchwork.freedesktop.org/series/38764/ State : failure == Summary == Test kms_vblank: Subgroup pipe-a-ts-continuation-suspend: pass -> INCOMPLETE (shard-hsw)

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Use correct error code for GuC initialization failure

2018-02-22 Thread Michal Wajdeczko
On Wed, 21 Feb 2018 09:27:51 +0100, Chris Wilson wrote: Quoting Michal Wajdeczko (2018-02-20 22:57:10) Since commit 6ca9a2beb54a ("drm/i915: Unwind i915_gem_init() failure") we believed that we correctly handle all errors encountered during GuC initialization,

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add enum aux_ch and clean up the aux init to use it

2018-02-22 Thread Ville Syrjälä
On Tue, Feb 20, 2018 at 11:31:09AM -0800, Rodrigo Vivi wrote: > On Tue, Feb 20, 2018 at 07:05:22PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Since we no longer have a 1:1 correspondence between ports and AUX > > channels, let's give AUX channels

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Update missing parts after the rename to i915_request

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: Update missing parts after the rename to i915_request URL : https://patchwork.freedesktop.org/series/38794/ State : success == Summary == Series 38794v1 drm/i915: Update missing parts after the rename to i915_request

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: expose RCS topology to userspace

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915: expose RCS topology to userspace URL : https://patchwork.freedesktop.org/series/38801/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: store all subslice masks Okay! Commit: drm/i915/debugfs: reuse max slice/subslices already

Re: [Intel-gfx] [PATCH 26/43] drm/i915: Define Intel HDCP2.2 registers

2018-02-22 Thread Sean Paul
On Wed, Feb 14, 2018 at 07:43:41PM +0530, Ramalingam C wrote: > Intel HDCP2.2 registers are defined with addr offsets and bit details. > > Macros are defined for referencing the register offsets based on the > port index. > > Signed-off-by: Ramalingam C > --- >

Re: [Intel-gfx] [v4] drm/i915: Fix Limited Range Color Handling

2018-02-22 Thread Ville Syrjälä
On Tue, Jan 30, 2018 at 09:21:29PM +0530, Uma Shankar wrote: > From: Johnson Lin > > Some panels support limited range output (16-235) compared > to full range RGB values (0-255). Also userspace can control > the RGB range using "Broadcast RGB" property. Currently the >

Re: [Intel-gfx] [PATCH] drm/i915: Update missing parts after the rename to i915_request

2018-02-22 Thread Chris Wilson
Quoting Michel Thierry (2018-02-22 17:24:05) > Mostly doc/print messages that were not updated after commit e61e0f51ba79 > ("drm/i915: Rename drm_i915_gem_request to i915_request"). > > Signed-off-by: Michel Thierry > Cc: Chris Wilson > --- >

Re: [Intel-gfx] [PATCH 24/43] drm/i915: wait for cp_irq

2018-02-22 Thread Sean Paul
On Wed, Feb 14, 2018 at 07:43:39PM +0530, Ramalingam C wrote: > DP HDCP asserts the CP_IRQ to indicate the msg availability and > auth state change at the panel. > > Implements a completion structure to communicate the cp_irq > assertion and provides a function to wait for cp_irq with a timeout.

[Intel-gfx] ✗ Fi.CI.IGT: failure for lib/dummyload: Avoid assertions in lowlevel spin constructor

2018-02-22 Thread Patchwork
== Series Details == Series: lib/dummyload: Avoid assertions in lowlevel spin constructor URL : https://patchwork.freedesktop.org/series/38753/ State : failure == Summary == Test kms_flip: Subgroup modeset-vs-vblank-race-interruptible: fail -> PASS

[Intel-gfx] [PATCH] drm/i915: Update missing parts after the rename to i915_request

2018-02-22 Thread Michel Thierry
Mostly doc/print messages that were not updated after commit e61e0f51ba79 ("drm/i915: Rename drm_i915_gem_request to i915_request"). Signed-off-by: Michel Thierry Cc: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_context.h | 2 +-

[Intel-gfx] [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider()

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä While it seems totally unlikely that any system would mix a cpu/north aux channel with a pch/south port (or vice versa) we should still consult intel_dp->aux_ch rather than encoder->port when figuring out which clock is actually used by the aux

[Intel-gfx] [PATCH 6/8] drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä Rename intel_dp_aux_ch() to intel_dp_aux_xfer() to better convey what it actually does. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_dp.c | 18 +- 1 file changed, 9 insertions(+),

[Intel-gfx] [PATCH 8/8] drm/i915: Deduplicate the code to fill the aux message header

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä We have two instances of the code to fill out the header for the aux message. Pull it into a small helper. Cc: Sean Paul Cc: Ramalingam C Signed-off-by: Ville Syrjälä

[Intel-gfx] [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init()

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä Collect all the aux ch vfunc assignments into intel_dp_aux_init() instead of having it spread around. Reviewed-by: Chris Wilson Reviewed-by: Rodrigo Vivi Signed-off-by: Ville Syrjälä

[Intel-gfx] [PATCH 3/8] drm/i915: Nuke aux regs from intel_dp

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä Just store function pointers that give us the correct register offsets instead of storing the register offsets themselves. Slightly less efficient perhaps but saves a few bytes and better matches how we do things elsewhere. v2: Keep a local

[Intel-gfx] [PATCH 1/8] drm/i915: Use the correct power domain for aux ch

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä Select the aux power domain based on the aux ch rather than based on the port. Now we can rid ourselves of the port E FIXME as well. v2: Split from the enum aux_ch patch (Rodrigo) Reviewed-by: Rodrigo Vivi #v1

[Intel-gfx] [PATCH 2/8] drm/i915: Add enum aux_ch and clean up the aux init to use it

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä Since we no longer have a 1:1 correspondence between ports and AUX channels, let's give AUX channels their own enum. Makes it easier to tell the apples from the oranges, and we get rid of the port E AUX power domain FIXME since we now derive the

[Intel-gfx] [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä Let's try to keep the details on the AKSV stuff concentrated in one place. So move the control bit and +5 data size handling there. Cc: Sean Paul Cc: Ramalingam C Signed-off-by: Ville Syrjälä

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/8] drm/i915: Use the correct power domain for aux ch

2018-02-22 Thread Patchwork
== Series Details == Series: series starting with [1/8] drm/i915: Use the correct power domain for aux ch URL : https://patchwork.freedesktop.org/series/38802/ State : failure == Summary == Series 38802v1 series starting with [1/8] drm/i915: Use the correct power domain for aux ch

[Intel-gfx] [PATCH v14 1/6] drm/i915: store all subslice masks

2018-02-22 Thread Lionel Landwerlin
Up to now, subslice mask was assumed to be uniform across slices. But starting with Cannonlake, slices can be asymmetric (for example slice0 has different number of subslices as slice1+). This change stores all subslices masks for all slices rather than having a single mask that applies to all

[Intel-gfx] [PATCH v14 2/6] drm/i915/debugfs: reuse max slice/subslices already stored in sseu

2018-02-22 Thread Lionel Landwerlin
Now that we have that information in topology fields, let's just reuse it. v2: Style tweaks (Tvrtko) Signed-off-by: Lionel Landwerlin Reviewed-by: Tvrtko Ursulin Acked-by: Chris Wilson ---

[Intel-gfx] [PATCH v14 6/6] drm/i915: expose rcs topology through query uAPI

2018-02-22 Thread Lionel Landwerlin
With the introduction of asymmetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the Gen's GPU topology that doesn't aggregate numbers. This is essential for monitoring parts

[Intel-gfx] [PATCH v14 5/6] drm/i915: add query uAPI

2018-02-22 Thread Lionel Landwerlin
There are a number of information that are readable from hardware registers and that we would like to make accessible to userspace. One particular example is the topology of the execution units (how are execution units grouped in subslices and slices and also which ones have been fused off for die

[Intel-gfx] [PATCH v14 4/6] drm/i915: add rcs topology to error state

2018-02-22 Thread Lionel Landwerlin
This might be useful information for developers looking at an error state. v2: Place topology towards the end of the error state (Chris) v3: Reuse common printing code (Michal) v4: Make this a one-liner (Chris) Signed-off-by: Lionel Landwerlin Reviewed-by:

[Intel-gfx] [PATCH v14 0/6] drm/i915: expose RCS topology to userspace

2018-02-22 Thread Lionel Landwerlin
Hi all, This iteration has 2 main changes : - Joonas wanted to have stride fields into the drm_i915_query_topology_info, so the layout has changed a bit. Tvrtko also suggested alignment stuff. - In commit b8ec759e6f1c6da0418238df066a0f1ef8fd2075 I added slice/subslice mask reporting

[Intel-gfx] [PATCH v14 3/6] drm/i915/debugfs: add rcs topology entry

2018-02-22 Thread Lionel Landwerlin
While the end goal is to make this information available to userspace through a new ioctl, there is no reason we can't display it in a human readable fashion through debugfs. slice0: 3 subslice(s) (0x7): subslice0: 8 EUs (0xff) subslice1: 8 EUs (0xff) subslice2: 8 EUs

Re: [Intel-gfx] [PATCH 2/2] drm/i915/cnl: New power domain for AUX IO.

2018-02-22 Thread Imre Deak
On Thu, Feb 22, 2018 at 12:28:11PM +0200, Imre Deak wrote: > On Wed, Feb 21, 2018 at 11:28:56PM -0800, Dhinakaran Pandiyan wrote: > > PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain > > for AUX-A enables DC_OFF well too. This is not required, so add a new > > AUX_IO_A

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/preemption: Allow preemption between submission ports (rev2)

2018-02-22 Thread Patchwork
== Series Details == Series: drm/i915/preemption: Allow preemption between submission ports (rev2) URL : https://patchwork.freedesktop.org/series/38774/ State : success == Summary == Test gem_eio: Subgroup in-flight-contexts: incomplete -> PASS (shard-apl)

Re: [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset

2018-02-22 Thread Michel Thierry
On 22/02/18 10:45, Michal Wajdeczko wrote: Right after GPU reset there will be a small window of time during which some of GuC/HuC fields will still show state before reset. Let's start to fix that by sanitizing firmware status as we will use it shortly. Suggested-by: Daniele Ceraolo Spurio

Re: [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset

2018-02-22 Thread Michal Wajdeczko
On Thu, 22 Feb 2018 21:52:39 +0100, Michel Thierry wrote: On 22/02/18 10:45, Michal Wajdeczko wrote: Right after GPU reset there will be a small window of time during which some of GuC/HuC fields will still show state before reset. Let's start to fix that by

[Intel-gfx] [PATCH v2 8/8] drm/i915: Deduplicate the code to fill the aux message header

2018-02-22 Thread Ville Syrjala
From: Ville Syrjälä We have two instances of the code to fill out the header for the aux message. Pull it into a small helper. v2: Rebase due to txbuf[] changes Cc: Sean Paul Cc: Ramalingam C Signed-off-by: Ville

[Intel-gfx] [PATCH] drm/i915: Disable SAGV on pre plane update.

2018-02-22 Thread Rodrigo Vivi
According to Spec "Requirement before plane enabling or configuration change: Disable SAGV if any enabled plane will not be able to enable watermarks for memory latency >= SAGV block time, or any transcoder is interlaced. Else, enable SAGV." Currently we are only enabling and disabling SAGV on

Re: [Intel-gfx] [PATCH] drm/i915/uc: Start preparing GuC/HuC for reset

2018-02-22 Thread Daniele Ceraolo Spurio
On 22/02/18 10:45, Michal Wajdeczko wrote: Right after GPU reset there will be a small window of time during which some of GuC/HuC fields will still show state before reset. Let's start to fix that by sanitizing firmware status as we will use it shortly. Suggested-by: Daniele Ceraolo Spurio

[Intel-gfx] [PATCH v3 07/10] pwm: atmel: add pwm capabilities

2018-02-22 Thread Claudiu Beznea
Add pwm capabilities for Atmel/Microchip PWM controllers. Signed-off-by: Claudiu Beznea --- drivers/pwm/pwm-atmel.c | 80 - 1 file changed, 52 insertions(+), 28 deletions(-) diff --git a/drivers/pwm/pwm-atmel.c

[Intel-gfx] [PATCH v3 09/10] pwm: add documentation for pwm push-pull mode

2018-02-22 Thread Claudiu Beznea
Add documentation for PWM push-pull mode. Signed-off-by: Claudiu Beznea Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pwm/pwm.txt | 2 ++ Documentation/pwm.txt | 16

[Intel-gfx] [PATCH v3 03/10] pwm: cros-ec: populate PWM mode in of_xlate function

2018-02-22 Thread Claudiu Beznea
Populate PWM mode in of_xlate function to avoid pwm_apply_state() failure. Signed-off-by: Claudiu Beznea --- drivers/pwm/pwm-cros-ec.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/pwm/pwm-cros-ec.c b/drivers/pwm/pwm-cros-ec.c index

[Intel-gfx] [PATCH v3 05/10] pwm: add PWM mode to pwm_config()

2018-02-22 Thread Claudiu Beznea
Add PWM mode to pwm_config() function. The drivers which uses pwm_config() were adapted to this change. Signed-off-by: Claudiu Beznea --- arch/arm/mach-s3c24xx/mach-rx1950.c | 11 +-- drivers/bus/ts-nbus.c| 2 +- drivers/clk/clk-pwm.c

[Intel-gfx] [PATCH v3 02/10] pwm: clps711x: populate PWM mode in of_xlate function

2018-02-22 Thread Claudiu Beznea
Populate PWM mode in of_xlate function to avoid pwm_apply_state() failure. Signed-off-by: Claudiu Beznea --- drivers/pwm/pwm-clps711x.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-clps711x.c

[Intel-gfx] [PATCH v3 04/10] pwm: pxa: populate PWM mode in of_xlate function

2018-02-22 Thread Claudiu Beznea
Populate PWM mode in of_xlate function to avoid pwm_apply_state() failure. Signed-off-by: Claudiu Beznea --- drivers/pwm/pwm-pxa.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/pwm/pwm-pxa.c b/drivers/pwm/pwm-pxa.c index 4143a46684d2..7a035716e054

[Intel-gfx] [PATCH v3] drm/i915/psr: New power domain for AUX IO.

2018-02-22 Thread Dhinakaran Pandiyan
PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain for AUX-A enables DC_OFF well too. This is not required, so add a new AUX_IO_A domain for AUX-A to allow DC states to remain enabled. Other AUX channels re-use the existing AUX domains as they do need power well 2. v3:

[Intel-gfx] [RFC v3 11/12] drm/client: Add bootsplash client

2018-02-22 Thread Noralf Trønnes
Just a hack to test the client API. Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/client/Kconfig | 5 + drivers/gpu/drm/client/Makefile | 1 + drivers/gpu/drm/client/drm_bootsplash.c | 205 3 files changed, 211

[Intel-gfx] [RFC v3 00/12] drm: Add generic fbdev emulation

2018-02-22 Thread Noralf Trønnes
This patchset explores the possibility of having generic fbdev emulation in DRM for drivers that supports dumb buffers which they can export. The change this time is that I have tried to do an in-kernel client API. The intention was to have callbacks on the drm_file, but I gave up on that mainly

[Intel-gfx] [RFC v3 03/12] drm: Make ioctls available for in-kernel clients part 1

2018-02-22 Thread Noralf Trønnes
This is part 1 of making ioctls useable for in-kernel clients. Make an ioctl wrapper function that calls a function that can be used by in-kernel clients. It adjusts the following functions to handle kernel buffers: - drm_mode_getresources() - drm_mode_setcrtc() - drm_mode_getconnector() -

[Intel-gfx] [RFC v3 04/12] drm: Make ioctls available for in-kernel clients part 2

2018-02-22 Thread Noralf Trønnes
This is part 2 of making ioctls useable for in-kernel clients. Make an ioctl wrapper function that calls a function that can be used by in-kernel clients. It adjusts the signature of the following functions: - drm_mode_getcrtc() - drm_mode_create_dumb_ioctl() - drm_mode_destroy_dumb_ioctl() -

[Intel-gfx] [PATCH v3 08/10] pwm: add push-pull mode support

2018-02-22 Thread Claudiu Beznea
Add push-pull mode support. In push-pull mode the channels' outputs have same polarities and the edges are complementary delayed for one period. Signed-off-by: Claudiu Beznea --- include/linux/pwm.h | 9 - 1 file changed, 8 insertions(+), 1 deletion(-)

[Intel-gfx] [RFC v3 02/12] drm/file: Don't set master on in-kernel clients

2018-02-22 Thread Noralf Trønnes
It only makes sense for userspace clients. Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/drm_file.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/drm_file.c b/drivers/gpu/drm/drm_file.c index

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