Re: [Intel-gfx] [PATCH v1] drm/i915: Add Exec param to control data port coherency.

Hi Tomasz, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on v4.16-rc7 next-20180329] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context

Hi Chris, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.16-rc7 next-20180329] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context

Hi Chris, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.16-rc7 next-20180329] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context

Hi Chris, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on v4.16-rc7 next-20180329] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset

== Series Details == Series: series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset URL : https://patchwork.freedesktop.org/series/40983/ State : success == Summary == Series 40983v1 series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences

Quoting Francisco Jerez (2018-03-29 18:20:23) > Chris Wilson writes: > > > We would like to start doing some bookkeeping at the beginning, between > > contexts and at the end of execlists submission. We already mark the > > beginning and end using EXECLISTS_ACTIVE_USER,

[Intel-gfx] [PATCH v2] drm/i915/execlists: Track begin/end of execlists submission sequences

We would like to start doing some bookkeeping at the beginning, between contexts and at the end of execlists submission. We already mark the beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication when the HW is idle. This give us a pair of sequence points we can then expand on for

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset

== Series Details == Series: series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset URL : https://patchwork.freedesktop.org/series/40983/ State : failure == Summary == Possible new issues: Test kms_cursor_crc: Subgroup cursor-64x64-suspend:

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)

== Series Details == Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) URL : https://patchwork.freedesktop.org/series/40870/ State : failure == Summary == Series 40870v2 drm/i915/execlists: Track begin/end of execlists submission sequences

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Use full serialisation around engine->irq_posted

Quoting Chris Wilson (2018-03-31 00:08:47) > Quoting Chris Wilson (2018-03-22 07:35:32) > > Using engine->irq_posted for execlists, we are not always serialised by > > the tasklet as we supposed. On the reset paths, the tasklet is disabled > > and ignored. Instead, we manipulate the

Re: [Intel-gfx] [PATCH 7/7] drm/i915: Engine queues query

Quoting Lionel Landwerlin (2018-03-31 02:04:26) > On 19/03/18 18:16, Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > > > As well as exposing active requests on engines via PMU, we can also export > > the current raw values (as tracked by i915 command submission) via a

[Intel-gfx] [PATCH] drm/i915: Store preemption capability in engine->flags

Let's avoid having to delve down the pointer chain to see if the i915 device has support for preemption and store that on the engine, which made the decision in the first place! Signed-off-by: Chris Wilson Cc: Tomasz Lis Cc: Daniele Ceraolo Spurio

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Store preemption capability in engine->flags

== Series Details == Series: drm/i915: Store preemption capability in engine->flags URL : https://patchwork.freedesktop.org/series/40982/ State : success == Summary == Possible new issues: Test kms_cursor_crc: Subgroup cursor-64x64-suspend: dmesg-warn -> PASS

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset

== Series Details == Series: series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset URL : https://patchwork.freedesktop.org/series/40983/ State : warning == Summary == $ dim checkpatch origin/drm-tip 39dc3c1c4ddd drm/i915: Only call finish_reset after a

Re: [Intel-gfx] [PATCH 7/8] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI

Hi Manasi, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180329] [cannot apply to v4.16-rc7] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Store preemption capability in engine->flags

== Series Details == Series: drm/i915: Store preemption capability in engine->flags URL : https://patchwork.freedesktop.org/series/40982/ State : success == Summary == Series 40982v1 drm/i915: Store preemption capability in engine->flags

[Intel-gfx] [PATCH 1/2] drm/i915: Only call finish_reset after a prepare_reset

If we skip the intel_prepare_reset(), we should also skip the intel_display_reset(). If we we use a flag set by intel_prepare_reset() then we do not have to second guess based on external user controlled state whether or not the prepare was called before deciding to finish it after the reset.

[Intel-gfx] [PATCH 2/2] drm/i915: Always assume the GPU reset occurs

Don't trust the user controlled i915.reset, but assume the reset occured and always clear the state beforehand and do a full recovery afterwards. Testcase: igt/gem_eio Signed-off-by: Chris Wilson Cc: Ville Syrjälä ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)

== Series Details == Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) URL : https://patchwork.freedesktop.org/series/40870/ State : success == Summary == Series 40870v2 drm/i915/execlists: Track begin/end of execlists submission sequences

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)

== Series Details == Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) URL : https://patchwork.freedesktop.org/series/40870/ State : failure == Summary == Possible new issues: Test kms_cursor_crc: Subgroup cursor-64x64-suspend: