CDCLK has to be at least twice the BLCK regardless of audio. Audio
driver has to probe using this hook and increase the clock even in
absence of any display.
Signed-off-by: Ville Syrjälä
Signed-off-by: Abhay Kumar
---
On Sun, Apr 29, 2018 at 12:48:32PM +0100, Chris Wilson wrote:
> To silence sparse while maintaining compatibility with the assembly, use
> _UL which conditionally only appends the UL suffix for C code.
http://lkml.kernel.org/r/nycvar.yfh.7.76.1804121437350.28...@cbobk.fhfr.pm
--
Kirill A.
From: Tarun
The PIPEDSL freezes on PSR entry and if PSR hasn't fully exited, then
the pipe_update_start call schedules itself out to check back later.
On ChromeOS-4.4 kernel, which is fairly up-to-date w.r.t drm/i915 but
lags w.r.t core kernel code, hot plugging an
Am 27.04.2018 um 08:17 schrieb Daniel Vetter:
When this was introduced in
commit a519435a96597d8cd96123246fea4ae5a6c90b02
Author: Christian König
Date: Tue Oct 20 16:34:16 2015 +0200
dma-buf/fence: add fence_wait_any_timeout function v2
there was a
NAK, there is a subtitle but major difference:
- if (rdev->needs_reset) {
- t = -EDEADLK;
- break;
- }
Without that the whole radeon GPU reset code breaks.
Regards,
Christian.
Am 27.04.2018 um 08:17 schrieb Daniel
Patches #1-#5 in this series are Reviewed-by: Christian König
Regards,
Christian.
Am 27.04.2018 um 08:17 schrieb Daniel Vetter:
Hi all,
Somewhat motivated by me looking at the v3d patch I went and dug around
in the dma-fence code a bit. Result was a bit of doc
To silence sparse while maintaining compatibility with the assembly, use
_UL which conditionally only appends the UL suffix for C code.
Fixes: a7412546d8cb ("x86/mm: Adjust vmalloc base and size at boot-time")
Signed-off-by: Chris Wilson
Cc: Kirill A. Shutemov
Am 27.04.2018 um 08:17 schrieb Daniel Vetter:
dma_fence_default_wait is the default now.
Signed-off-by: Daniel Vetter
Cc: Alex Deucher
Cc: "Christian König"
Cc: Monk Liu
Cc: pding