== Series Details ==
Series: series starting with [1/2] drm/i915: Force a LUT update in
intel_initial_commit()
URL : https://patchwork.freedesktop.org/series/52754/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5172_full -> Patchwork_10861_full =
== Summary - WARNING ==
On Mon, 2018-11-19 at 17:05 -0800, Rodrigo Vivi wrote:
> On Mon, Nov 19, 2018 at 03:01:01PM -0800, José Roberto de Souza
> wrote:
> > When there is no output no one will hold a runtime_pm reference
> > causing a warning when trying to read emom_status in debugfs.
> >
> > [22.756480] [
Hello,
On Tue, Nov 20, 2018 at 10:21:14PM +, Ho, Kenny wrote:
> By this reply, are you suggesting that vendor specific resources
> will never be acceptable to be managed under cgroup? Let say a user
I wouldn't say never but whatever which gets included as a cgroup
controller should have
== Series Details ==
Series: Respin of remaining DSC + FEC patches
URL : https://patchwork.freedesktop.org/series/52781/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
72d53683f5ab drm/dsc: Modify DRM helper to return complete DSC color depth
capabilities
a82354d4ddcd drm/dsc:
Kenny Ho writes:
> Account for the number of command submitted to amdgpu by type on a per
> cgroup basis, for the purpose of profiling/monitoring applications.
For profiling other drivers, I've used perf tracepoints, which let you
get useful timelines of multiple events in the driver. Have you
On Tue, Nov 20, 2018 at 02:40:49PM +0100, Maarten Lankhorst wrote:
> Now that we've solved the backlight issue, I think it's time to enable
> this again by default. We've enabled it in the past, but backlight
> issues prevented us from enabling it by default.
>
> Our hardware readout is pretty
== Series Details ==
Series: series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating
the gtt list
URL : https://patchwork.freedesktop.org/series/52786/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10870 =
== Summary - SUCCESS ==
No
On Tue, Nov 20, 2018 at 03:54:49PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> If we force a plane update to fix up our half populated plane state
> we'll also force on the pipe gamma for the plane (since we always
> enable pipe gamma currently). If the BIOS hasn't programmed a
== Series Details ==
Series: Respin of remaining DSC + FEC patches
URL : https://patchwork.freedesktop.org/series/52781/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10869 =
== Summary - SUCCESS ==
No regressions found.
External URL:
Hello,
On Tue, Nov 20, 2018 at 01:58:11PM -0500, Kenny Ho wrote:
> Since many parts of the DRM subsystem has vendor-specific
> implementations, we introduce mechanisms for vendor to register their
> specific resources and control files to the DRM cgroup subsystem. A
> vendor will register itself
On Wed, Nov 14, 2018 at 11:07:24PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make a cleaner split between the skl+ and icl+ ways of computing
> watermarks. This way skl_build_pipe_wm() doesn't have to know any
> of the gritty details of icl+ master/slave planes.
>
> We can also
On Wed, Nov 14, 2018 at 11:07:25PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Simplify the calling convention of the skl+ watermark functions
> by not passing around dev_priv needlessly. The callees have
> what they need to dig it out anyway.
>
> Signed-off-by: Ville Syrjälä
On Fri, Nov 09, 2018 at 12:20:13PM -0800, José Roberto de Souza wrote:
> While PSR is active hardware will do aux transactions by it self to
> wakeup sink to receive a new frame when necessary. If that
> transaction is not acked by sink, hardware will trigger this
> interruption.
>
> So let's
On Fri, Nov 09, 2018 at 12:20:14PM -0800, José Roberto de Souza wrote:
> If a PSR error happened and the driver is reloaded, the EDP_PSR_IIR
> will still keep the error set even after the reset done in the
> irq_preinstall and irq_uninstall hooks.
> And enabling in this situation cause the screen
On Fri, Nov 09, 2018 at 12:20:15PM -0800, José Roberto de Souza wrote:
> We should not access hardware while computing config also we don't
> support stereo 3D so this tests was never true.
yeap... it was there becase at some point we were planing to enabled that S3D
and if that happen we would
== Series Details ==
Series: series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it
URL : https://patchwork.freedesktop.org/series/52790/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7a61c38bd7ad drm/i915: Add HAS_DISPLAY() and use it
3259afbd74f1 drm/i915: Do not
== Series Details ==
Series: series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it
URL : https://patchwork.freedesktop.org/series/52790/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Add HAS_DISPLAY() and use it
On Tue, 2018-11-20 at 14:47 -0800, Rodrigo Vivi wrote:
> On Fri, Nov 09, 2018 at 12:20:13PM -0800, José Roberto de Souza
> wrote:
> > While PSR is active hardware will do aux transactions by it self to
> > wakeup sink to receive a new frame when necessary. If that
> > transaction is not acked by
If no PCH was detected in intel_detect_pch() don't touch the
handshake registers.
Cc: Lucas De Marchi
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
This helps separate what capabilities are display capabilities.
Cc: Jani Nikula
Cc: Lucas De Marchi
Suggested-by: Jani Nikula
Suggested-by: Lucas De Marchi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.h | 22 ++---
drivers/gpu/drm/i915/i915_pci.c
Right now it is decided if GEN has display by checking the num_pipes,
so lets make it explicit and use a macro.
Cc: Lucas De Marchi
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.c | 10 +-
drivers/gpu/drm/i915/i915_drv.h | 2
On Fri, Nov 09, 2018 at 12:20:11PM -0800, José Roberto de Souza wrote:
> When a PSR error happens sink sets the PSR errors register and also
> set the link to a error status.
> So in the short pulse handling it was returning earlier and doing a
> full detection and attempting to retrain but it
On Tue, Nov 20, 2018 at 11:39:26AM +0100, Maarten Lankhorst wrote:
> On lynxpoint the bios sometimes sets up the backlight using the CPU
> display, but the driver expects using the PWM PCH override register.
>
> Read the value from the CPU register, then convert it to the other
> units by
== Series Details ==
Series: Respin of remaining DSC + FEC patches
URL : https://patchwork.freedesktop.org/series/52781/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/dsc: Modify DRM helper to return complete DSC color depth
capabilities
Okay!
On Tue, Nov 20, 2018 at 03:54:50PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> If we need to force a full plane update before userspace/fbdev
> have given us a proper plane state we should try to maintain the
> current plane state as much as possible (apart from the parts
> of the
Always show the FEC capability as it is initialised to 0 before error.
Fixing,
drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn:
inconsistent indenting
Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
Signed-off-by: Chris Wilson
Cc: Jani Nikula
Cc:
Found by smatch:
drivers/gpu/drm/i915/gvt/gtt.c:2452 intel_vgpu_destroy_ggtt_mm() error:
dereferencing freed memory 'pos'
Signed-off-by: Chris Wilson
Cc: Zhenyu Wang
---
drivers/gpu/drm/i915/gvt/gtt.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
On Fri, Nov 09, 2018 at 12:20:12PM -0800, José Roberto de Souza wrote:
> When we detect a error and disable PSR, it is kept disable until the
> next modeset but as the sink already show signs that it do not
> properly work with PSR lets disabled it for good to avoid any
> additional flickering.
>
== Series Details ==
Series: drm/i915: fix spelling mistake "reserverd" -> "reserved"
URL : https://patchwork.freedesktop.org/series/52800/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5175 -> Patchwork_10873 =
== Summary - SUCCESS ==
No regressions found.
External
== Series Details ==
Series: Add Colorspace connector property interface (rev3)
URL : https://patchwork.freedesktop.org/series/47132/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10862_full =
== Summary - WARNING ==
Minor unknown changes coming
On Wed, Nov 14, 2018 at 11:07:26PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> On SKL+ the plane WM/BUF_CFG registers are a proper part of each
> plane's register set. That means accessing them will cancel any
> pending plane update, and we would need a PLANE_SURF register write
> to
While trying to add a chamelium test for short HPD IRQs, I ran into
issues where a hotplug storm would be triggered, but the point at which
it would be reported by the kernel would be after igt actually finished
checking i915_hpd_storm_ctl's status. So, fix this by simply
synchronizing our IRQ
== Series Details ==
Series: series starting with [1/2] drm/i915: Enable fastset for non-boot
modesets.
URL : https://patchwork.freedesktop.org/series/52758/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10863_full =
== Summary - FAILURE ==
Fix a spelling mistake in a comment.
Signed-off-by: Alexandre Belloni
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index f9ce35da4123..742f8ff101e4 100644
Since many parts of the DRM subsystem has vendor-specific
implementations, we introduce mechanisms for vendor to register their
specific resources and control files to the DRM cgroup subsystem. A
vendor will register itself with the DRM cgroup subsystem first before
registering individual DRM
Change-Id: I6830d3990f63f0c13abeba29b1d330cf28882831
Signed-off-by: Kenny Ho
---
include/linux/cgroup_drm.h| 32
include/linux/cgroup_subsys.h | 4 +++
init/Kconfig | 5
kernel/cgroup/Makefile| 1 +
kernel/cgroup/drm.c | 46
Account for the number of command submitted to amdgpu by type on a per
cgroup basis, for the purpose of profiling/monitoring applications.
x prefix in the control file name x.cmd_submitted.amd.stat signify
experimental.
Change-Id: Ibc22e5bda600f54fe820fe0af5400ca348691550
Signed-off-by: Kenny Ho
Change-Id: Ib66c44ac1b1c367659e362a2fc05b6fbb3805876
Signed-off-by: Kenny Ho
---
drivers/gpu/drm/amd/amdgpu/Makefile | 3 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7
drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c | 37 +
Account for the total size of buffer object requested to amdgpu by
buffer type on a per cgroup basis.
x prefix in the control file name x.bo_requested.amd.stat signify
experimental.
Change-Id: Ifb680c4bcf3652879a7a659510e25680c2465cf6
Signed-off-by: Kenny Ho
---
The purpose of this patch series is to start a discussion for a generic cgroup
controller for the drm subsystem. The design proposed here is a very early one.
We are hoping to engage the community as we develop the idea.
Backgrounds
==
Control Groups/cgroup provide a mechanism for
Hi Tejun,
Thanks for the reply. A few clarifying questions:
On Tue, Nov 20, 2018 at 3:21 PM Tejun Heo wrote:
> So, I'm still pretty negative about adding drm controller at this
> point. There isn't enough of common resource model defined yet and
> until that gets sorted out I think it's in
== Series Details ==
Series: series starting with [1/4] drm/edid: Add CTA-861-G modes with VIC < 128
URL : https://patchwork.freedesktop.org/series/52770/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10865_full =
== Summary - WARNING ==
Minor
== Series Details ==
Series: drm/atomic: Fix the early return in drm_atomic_set_mode_for_crtc()
URL : https://patchwork.freedesktop.org/series/52777/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10867_full =
== Summary - WARNING ==
Minor unknown
== Series Details ==
Series: series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it
URL : https://patchwork.freedesktop.org/series/52790/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5175 -> Patchwork_10871 =
== Summary - SUCCESS ==
No regressions found.
== Series Details ==
Series: drm/i915/selftests: Log test and subtest names for easier debugging
URL : https://patchwork.freedesktop.org/series/52774/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10866_full =
== Summary - WARNING ==
Minor unknown
== Series Details ==
Series: drm/i915: Synchronize hpd work in i915_hpd_storm_ctl_show()
URL : https://patchwork.freedesktop.org/series/52796/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5175 -> Patchwork_10872 =
== Summary - SUCCESS ==
No regressions found.
Sorry I missed it. Thanks for the correction!
Regards,
Henry
> -Original Message-
> From: Zhenyu Wang [mailto:zhen...@linux.intel.com]
> Sent: Wednesday, November 21, 2018 10:29 AM
> To: Chris Wilson
> Cc: intel-gfx@lists.freedesktop.org; Zhenyu Wang
> ; Yuan, Hang
> Subject: Re:
== Series Details ==
Series: DRM cgroup controller
URL : https://patchwork.freedesktop.org/series/52799/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_device.o
In file
On 2018.11.20 20:24:38 +, Chris Wilson wrote:
> Found by smatch:
>
> drivers/gpu/drm/i915/gvt/gtt.c:2452 intel_vgpu_destroy_ggtt_mm() error:
> dereferencing freed memory 'pos'
>
> Signed-off-by: Chris Wilson
> Cc: Zhenyu Wang
> ---
> drivers/gpu/drm/i915/gvt/gtt.c | 7 ---
> 1 file
== Series Details ==
Series: Respin of remaining DSC + FEC patches
URL : https://patchwork.freedesktop.org/series/52781/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10869_full =
== Summary - WARNING ==
Minor unknown changes coming with
On Tue, 20 Nov 2018, "Lee, Shawn C" wrote:
> Driver obtain power well at intel_csr_ucode_init().
> And release it after load DMC firmware successful.
Correct.
> An issue happened when DMC was not found or failed
> to load. Power well would not be released and just
> output some error messages.
== Series Details ==
Series: series starting with [1/2] drm/i915/gvt: Avoid use-after-free iterating
the gtt list
URL : https://patchwork.freedesktop.org/series/52786/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10870_full =
== Summary - SUCCESS
== Series Details ==
Series: drm/i915: Program SKL+ watermarks/ddb more carefully (rev8)
URL : https://patchwork.freedesktop.org/series/51878/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5174_full -> Patchwork_10868_full =
== Summary - FAILURE ==
Serious unknown
Driver obtain power well at intel_csr_ucode_init().
And release it after load DMC firmware successful.
An issue happened when DMC was not found or failed
to load. Power well would not be released and just
output some error messages. Driver have to release
power well properly to keep put/get
== Series Details ==
Series: drm/i915: Program SKL+ watermarks/ddb more carefully (rev8)
URL : https://patchwork.freedesktop.org/series/51878/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10868 =
== Summary - SUCCESS ==
No regressions found.
Kenny Ho writes:
> Account for the total size of buffer object requested to amdgpu by
> buffer type on a per cgroup basis.
>
> x prefix in the control file name x.bo_requested.amd.stat signify
> experimental.
Why is a counting of the size of buffer objects ever allocated useful,
as opposed to
Quoting Tvrtko Ursulin (2018-11-15 18:37:07)
> From: Lionel Landwerlin
>
> Verify that the per-context dynamic SSEU uAPI works as expected.
> +static bool
> +kernel_has_per_context_sseu_support(int fd)
> +{
> + struct drm_i915_gem_context_param_sseu sseu = { };
> + struct
== Series Details ==
Series: drm/i915/backlight: Fix backlight takeover on LPT
URL : https://patchwork.freedesktop.org/series/52746/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9b0ac137925f drm/i915/backlight: Fix backlight takeover on LPT
-:43: CHECK:BRACES: braces {}
== Series Details ==
Series: drm/i915/backlight: Fix backlight takeover on LPT
URL : https://patchwork.freedesktop.org/series/52746/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/backlight: Fix backlight takeover on LPT
== Series Details ==
Series: series starting with [01/13] locking/lockdep: restore cross-release
checks (rev3)
URL : https://patchwork.freedesktop.org/series/52167/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: locking/lockdep: restore cross-release
+ Haihaho who's been involved with gem_media_fill test, if you could
provide review, too.
Quoting Tvrtko Ursulin (2018-11-13 16:36:28)
> From: Tony Ye
>
> Simple test which exercises the VME fixed function block.
>
> v2: (Tvrtko Ursulin)
> * Small cleanups like copyright date, tabs, remove
From: Ville Syrjälä
If we need to force a full plane update before userspace/fbdev
have given us a proper plane state we should try to maintain the
current plane state as much as possible (apart from the parts
of the state we're trying to fix up with the plane update).
To that end add basic
== Series Details ==
Series: series starting with [01/13] locking/lockdep: restore cross-release
checks (rev3)
URL : https://patchwork.freedesktop.org/series/52167/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a3b9f37357c8 locking/lockdep: restore cross-release checks
-:9:
Hi,
On 20-11-18 12:28, Ville Syrjälä wrote:
On Mon, Nov 19, 2018 at 11:47:00PM +0100, Hans de Goede wrote:
Hi Ville,
While debugging the briefly purple screen on DSI panels issue for
which I just send a revert, I also noticed something odd with
your commit 9b27390139db ("drm/i915: Use the
From: Ville Syrjälä
If we force a plane update to fix up our half populated plane state
we'll also force on the pipe gamma for the plane (since we always
enable pipe gamma currently). If the BIOS hasn't programmed a sensible
LUT into the hardware this will cause the image to become corrupted.
As the worker may exit by itself, we need to hold a task reference to it
in the parent.
References: https://bugs.freedesktop.org/show_bug.cgi?id=108735
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
== Series Details ==
Series: series starting with [01/13] locking/lockdep: restore cross-release
checks (rev3)
URL : https://patchwork.freedesktop.org/series/52167/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5171 -> Patchwork_10859 =
== Summary - FAILURE ==
Serious
== Series Details ==
Series: drm/i915/selftests: Hold task reference to reset worker
URL : https://patchwork.freedesktop.org/series/52750/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5171 -> Patchwork_10860 =
== Summary - SUCCESS ==
No regressions found.
External
On 19/11/2018 22:20, Lucas De Marchi wrote:
On Thu, Nov 08, 2018 at 11:23:46AM +, Tvrtko Ursulin wrote:
[snip]
So are you against changing the == to use the macros, changing the >=, >, <, <=,
or all of them?
Definitely not all of them. Just plain if ladders I think are definitely
more
== Series Details ==
Series: series starting with [1/3] drm/i915: Make pipe/transcoder offsets not
depend on enum values
URL : https://patchwork.freedesktop.org/series/52742/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5169_full -> Patchwork_10857_full =
== Summary -
On Mon, 2018-11-12 at 16:01 +0100, Maarten Lankhorst wrote:
> We already have __drm_atomic_helper_connector_reset() and
> __drm_atomic_helper_plane_reset(), extend this to crtc as well.
>
> Most drivers already have a gpu reset hook, correct it.
> Nouveau already implemented its own
On Thu, Nov 08, 2018 at 09:41:47AM +, Chris Wilson wrote:
> Quoting Daniel Vetter (2018-11-08 09:31:11)
> > Only way to convince our CI to enable stuff that's new and defaulting
> > to off. Obviously not for merging.
>
> See DRM_I915_DEBUG where we define what extras we need for CI.
Yeah I
On Fri, 16 Nov 2018, Jani Nikula wrote:
> Reduce bloat in one of the bigger header files. Fix some indentation
> while at it. No functional changes.
>
> v2: Add include guards (Joonas)
>
> Reviewed-by: Joonas Lahtinen
> Signed-off-by: Jani Nikula
Pushed the series, thanks for the review.
BR,
Depending on the transcoder enum values to translate from transcoder
to EDP PSR flags can easily break if we add a new transcoder. So remove
the dependency by using an explicit mapping.
While at it also add a WARN for unexpected trancoders.
v2:
- Simplify things by defining flag shift values
Add a comment to the pipe and transcoder enum definitions about our
assumption in the code about enum values for pipes and transcoders
with a 1:1 transcoder -> pipe mapping.
v2:
- Clarify more what are the assumptions about the enum values. (Ville)
v3: (Lucas)
- s/->/ -> / so it looks less like
Depending on the transcoder enum values to translate from transcoder
to pipe/transcoder register addresses can easily break if we add a new
transcoder. So remove the dependency by using named initializers.
Suggested-by: Ville Syrjälä
Cc: Ville Syrjälä
Signed-off-by: Imre Deak
Reviewed-by:
Quoting Chris Wilson (2018-11-19 17:41:53)
> Under moderate amounts of GPU stress, we can observe on Bearlake and
> Pineview (later gen3 models) that we execute the following batch buffer
> before the write into the batch is coherent. Adding extra (tested with
> upto 32x) MI_FLUSH to either the
== Series Details ==
Series: series starting with [1/3] drm/i915: Make pipe/transcoder offsets not
depend on enum values
URL : https://patchwork.freedesktop.org/series/52742/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c9eb72bdc9a6 drm/i915: Make pipe/transcoder offsets not
On lynxpoint the bios sometimes sets up the backlight using the CPU
display, but the driver expects using the PWM PCH override register.
Read the value from the CPU register, then convert it to the other
units by converting from the old duty cycle, to freq, to the new units.
This value is then
Only way to convince our CI to enable stuff that's new and defaulting
to off. Obviously not for merging.
v2: Also enable fullstack backtraces.
Signed-off-by: Daniel Vetter
---
lib/Kconfig.debug | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/Kconfig.debug
On Mon, Nov 19, 2018 at 11:47:00PM +0100, Hans de Goede wrote:
> Hi Ville,
>
> While debugging the briefly purple screen on DSI panels issue for
> which I just send a revert, I also noticed something odd with
> your commit 9b27390139db ("drm/i915: Use the correct crtc when
> sanitizing plane
Quoting Joonas Lahtinen (2018-11-20 09:48:36)
> Quoting Chris Wilson (2018-11-19 17:41:53)
> > Under moderate amounts of GPU stress, we can observe on Bearlake and
> > Pineview (later gen3 models) that we execute the following batch buffer
> > before the write into the batch is coherent. Adding
== Series Details ==
Series: series starting with [1/3] drm/i915: Make pipe/transcoder offsets not
depend on enum values
URL : https://patchwork.freedesktop.org/series/52742/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5169 -> Patchwork_10857 =
== Summary - SUCCESS ==
On Fri, 16 Nov 2018, Chris Wilson wrote:
> Quoting Jani Nikula (2018-11-15 12:01:24)
>> No need to use a compound statement enclosed in parenthesis where a C99
>> compound literal will do. No functional changes.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/i915_fixed.h | 6
== Series Details ==
Series: drm/i915/backlight: Fix backlight takeover on LPT
URL : https://patchwork.freedesktop.org/series/52746/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5169 -> Patchwork_10858 =
== Summary - SUCCESS ==
No regressions found.
External URL:
This patch adds a HDMI colorspace property, enabling
userspace to switch to various supported colorspaces.
This will help enable BT2020 along with other colorspaces.
v2: Addressed Maarten and Ville's review comments. Enhanced
the colorspace enum to incorporate both HDMI and DP supported
Now that we've solved the backlight issue, I think it's time to enable
this again by default. We've enabled it in the past, but backlight
issues prevented us from enabling it by default.
Our hardware readout is pretty complete, and with all of the connector
state moved to atomic I'm hoping we
Now that our state comparison functions are pretty complete, we should
enable fastset by default when a modeset can be avoided. Even if we're
not completely certain about the inherited state, we can be certain
after the first modeset that our sw state matches the hw state.
Signed-off-by: Maarten
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Tuesday, November 20, 2018 7:41 PM
>To: Shankar, Uma ; dri-de...@lists.freedesktop.org;
>intel-gfx@lists.freedesktop.org
>Cc: Syrjala, Ville ; jo...@kwiboo.se;
>hansv...@cisco.com; Shankar, Uma ; Lankhorst,
Den 10.11.2018 15.56, skrev Noralf Trønnes:
This patchset adds a GEM object function table and makes use of it in
the CMA helper.
This was originally part of a shmem helper series[1] that didn't make
it. Daniel and Christian showed interest in the vtable part so I have
hooked it up to some
== Series Details ==
Series: series starting with [1/2] drm/i915: Force a LUT update in
intel_initial_commit()
URL : https://patchwork.freedesktop.org/series/52754/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5172 -> Patchwork_10861 =
== Summary - SUCCESS ==
No
On Tue, Nov 20, 2018 at 07:52:09PM +0530, Uma Shankar wrote:
> This patch adds a HDMI colorspace property, enabling
> userspace to switch to various supported colorspaces.
> This will help enable BT2020 along with other colorspaces.
>
> v2: Addressed Maarten and Ville's review comments. Enhanced
This patch attaches the colorspace connector property to the
hdmi connector. Based on colorspace change, modeset will be
triggered to switch to new colorspace.
Based on colorspace property value create an infoframe
with appropriate colorspace. This can be used to send an
infoframe packet with
This patch adds a DP colorspace property, enabling
userspace to switch to various supported colorspaces.
This will help enable BT2020 along with other colorspaces.
v2: Addressed Maarten and Ville's review comments. Enhanced
the colorspace enum to incorporate both HDMI and DP supported
Quoting Chris Wilson (2018-11-20 14:06:01)
> As the worker may exit by itself, we need to hold a task reference to it
> in the parent.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=108735
> Signed-off-by: Chris Wilson
Checks out. I assume you hit this during debug of the above
Quoting Uma Shankar (2018-11-20 14:22:10)
> @@ -1457,6 +1480,18 @@ int drm_mode_create_colorspace_property(struct
> drm_connector *connector)
> return -ENOMEM;
>
> dev->mode_config.hdmi_colorspace_property = prop;
> + } else if
Quoting Joonas Lahtinen (2018-11-20 14:17:33)
> Quoting Chris Wilson (2018-11-20 14:06:01)
> > As the worker may exit by itself, we need to hold a task reference to it
> > in the parent.
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=108735
> > Signed-off-by: Chris Wilson
>
>
On Fri, Nov 09, 2018 at 11:39:15AM +0200, Stanislav Lisovskiy wrote:
> v5: This is YUV444 packed format same as AYUV, but without alpha,
> as supported by i915.
>
> v6: Removed unneeded initializer for new XYUV format.
>
> v7: Added is_yuv field initialization according to latest
>
== Series Details ==
Series: drm/i915/backlight: Fix backlight takeover on LPT
URL : https://patchwork.freedesktop.org/series/52746/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5169_full -> Patchwork_10858_full =
== Summary - WARNING ==
Minor unknown changes coming
== Series Details ==
Series: Add Colorspace connector property interface (rev3)
URL : https://patchwork.freedesktop.org/series/47132/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a84155117012 drm: Add HDMI colorspace property
-:105: CHECK:PARENTHESIS_ALIGNMENT: Alignment
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