Re: [Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread kbuild test robot
Hi Lionel, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on next-20190521] [cannot apply to v5.2-rc1] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

Re: [Intel-gfx] [PATCH 1/1] drm/i915: remove unused IO_TLB_SEGPAGES which should be defined by swiotlb

2019-05-21 Thread Chris Wilson
Quoting Dongli Zhang (2019-05-21 05:40:39) > This patch removes IO_TLB_SEGPAGES which is no longer used since > commit 5584f1b1d73e ("drm/i915: fix i915 running as dom0 under Xen"). > > As the define of both IO_TLB_SEGSIZE and IO_TLB_SHIFT are from swiotlb, > IO_TLB_SEGPAGES should be defined on

[Intel-gfx] [PULL] gvt-fixes

2019-05-21 Thread Zhenyu Wang
Hi, Here's gvt-fixes for 5.2-rc. It contains vgpu reset fix with proper timeline handling, fixes for guest TRTT setting which should be handled in context state instead of pushing directly to hardware and one error return fix. Thanks. -- The following changes since commit

Re: [Intel-gfx] [PATCH v7 09/11] drm: uevent for connector status change

2019-05-21 Thread Pekka Paalanen
On Mon, 20 May 2019 18:11:07 +0200 Daniel Vetter wrote: > On Fri, May 17, 2019 at 01:08:24PM +0300, Pekka Paalanen wrote: > > On Thu, 16 May 2019 14:24:55 +0200 > > Daniel Vetter wrote: > > > > > On Thu, May 16, 2019 at 11:22:11AM +0300, Pekka Paalanen wrote: > > > > On Wed, 15 May 2019

Re: [Intel-gfx] [PATCH] Revert "ICL HACK: Disable ACPI idle driver"

2019-05-21 Thread Saarinen, Jani
HI, > -Original Message- > From: Vivi, Rodrigo > Sent: tiistai 21. toukokuuta 2019 3.12 > To: Saarinen, Jani > Cc: Swarup, Aditya ; Gupta, Anshuman > ; Vetter, Daniel ; intel- > g...@lists.freedesktop.org; Syrjala, Ville ; Peres, > Martin > ; Wilson, Chris P > Subject: Re: [Intel-gfx]

Re: [Intel-gfx] [PATCH v8 2/6] drm: Rename struct edp_vsc_psr to struct dp_sdp

2019-05-21 Thread Jani Nikula
On Mon, 20 May 2019, Gwan-gyeong Mun wrote: > VSC SDP Payload for PSR is one of data block type of SDP (Secondaray Data > Packet). In order to generalize SDP packet structure name, it renames > struct edp_vsc_psr to struct dp_sdp. And each SDP data blocks have > different usages, each SDP type

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 12/27] gem_wsim: Engine map support

2019-05-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-05-20 15:47:24) > @@ -999,30 +1092,53 @@ prepare_workload(unsigned int id, struct workload > *wrk, unsigned int flags) > /* > * Identify if contexts target specific engine instances and if they > * want to be balanced. > +* > +

Re: [Intel-gfx] [RFC 4/7] drm/i915: move and rename i915_runtime_pm

2019-05-21 Thread Jani Nikula
On Fri, 17 May 2019, Chris Wilson wrote: > Quoting Daniele Ceraolo Spurio (2019-05-17 16:27:26) >> >> >> On 5/16/19 3:42 PM, Chris Wilson wrote: >> > Quoting Chris Wilson (2019-05-16 23:10:10) >> >> Quoting Chris Wilson (2019-05-16 23:07:43) >> >>> Quoting Daniele Ceraolo Spurio (2019-05-16

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Tetsuo Handa
On 2019/05/21 19:06, Daniel Vetter wrote: > In some special cases we must not block, but there's not a > spinlock, preempt-off, irqs-off or similar critical section already > that arms the might_sleep() debug checks. Add a non_block_start/end() > pair to annotate these. > > This will be used in

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 02/27] trace.pl: Ignore signaling on non i915 fences

2019-05-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-05-20 15:47:14) > From: Tvrtko Ursulin > > gem_wsim uses the sw_fence timeline and confuses the script. > > v2: > * Check the correct timeline as well. (Chris) > > Signed-off-by: Tvrtko Ursulin > --- > scripts/trace.pl | 3 +++ > 1 file changed, 3 insertions(+)

Re: [Intel-gfx] [PATCH] Revert "ICL HACK: Disable ACPI idle driver"

2019-05-21 Thread Jani Nikula
On Tue, 21 May 2019, "Saarinen, Jani" wrote: > HI, > >> -Original Message- >> From: Vivi, Rodrigo >> Sent: tiistai 21. toukokuuta 2019 3.12 >> To: Saarinen, Jani >> Cc: Swarup, Aditya ; Gupta, Anshuman >> ; Vetter, Daniel ; intel- >> g...@lists.freedesktop.org; Syrjala, Ville ; Peres,

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 12/27] gem_wsim: Engine map support

2019-05-21 Thread Tvrtko Ursulin
On 21/05/2019 09:14, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-05-20 15:47:24) @@ -999,30 +1092,53 @@ prepare_workload(unsigned int id, struct workload *wrk, unsigned int flags) /* * Identify if contexts target specific engine instances and if they * want

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Michal Hocko
On Tue 21-05-19 19:44:01, Tetsuo Handa wrote: > On 2019/05/21 19:06, Daniel Vetter wrote: > > In some special cases we must not block, but there's not a > > spinlock, preempt-off, irqs-off or similar critical section already > > that arms the might_sleep() debug checks. Add a non_block_start/end()

Re: [Intel-gfx] [PATCH 19/33] fbdev: unify unlink_framebufer paths

2019-05-21 Thread Maarten Lankhorst
^Typo in subject. Op 20-05-2019 om 10:22 schreef Daniel Vetter: > For some reasons the pm_vt_switch_unregister call was missing from the > direct unregister_framebuffer path. Fix this. > > v2: fbinfo->dev is used to decided whether unlink_framebuffer has been > called already. I botched that in

Re: [Intel-gfx] [PATCH v7 09/11] drm: uevent for connector status change

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 8:55 AM Pekka Paalanen wrote: > > On Mon, 20 May 2019 18:11:07 +0200 > Daniel Vetter wrote: > > > On Fri, May 17, 2019 at 01:08:24PM +0300, Pekka Paalanen wrote: > > > On Thu, 16 May 2019 14:24:55 +0200 > > > Daniel Vetter wrote: > > > > > > > On Thu, May 16, 2019 at

Re: [Intel-gfx] [RFC 1/7] drm/i915: prefer i915_runtime_pm in intel_runtime function

2019-05-21 Thread Jani Nikula
On Thu, 16 May 2019, Daniele Ceraolo Spurio wrote: > As a first step towards updating the code to work on the runtime_pm > structure instead of i915, rework all the internals to use and pass > around that. > > Signed-off-by: Daniele Ceraolo Spurio > --- > drivers/gpu/drm/i915/i915_drv.h

Re: [Intel-gfx] [PATCH v7 09/11] drm: uevent for connector status change

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 12:01:29PM +0300, Pekka Paalanen wrote: > Hi Daniel, > > what says the assumption of the only monitor being driven by CRTC 0 > was a bad one? :-p > > It's probably not obvious that userspace needs to explicitly try to > avoid invalid configuration combinations by

Re: [Intel-gfx] [PATCH v8 2/6] drm: Rename struct edp_vsc_psr to struct dp_sdp

2019-05-21 Thread Laurent Pinchart
Hello Jani, On Tue, May 21, 2019 at 09:44:04AM +0300, Jani Nikula wrote: > On Mon, 20 May 2019, Gwan-gyeong Mun wrote: > > VSC SDP Payload for PSR is one of data block type of SDP (Secondaray Data > > Packet). In order to generalize SDP packet structure name, it renames > > struct edp_vsc_psr to

Re: [Intel-gfx] [PATCH v5 4/8] drm/i915: vgpu context submission pv optimization

2019-05-21 Thread Zhang, Xiaolin
On 04/29/2019 06:03 PM, Chris Wilson wrote: > Quoting Xiaolin Zhang (2019-04-29 04:10:54) >> +static void pv_submit(struct intel_engine_cs *engine) >> +{ >> + struct intel_engine_execlists * const execlists = >execlists; >> + struct execlist_port *port = execlists->port; >> +

Re: [Intel-gfx] [PATCH v7 09/11] drm: uevent for connector status change

2019-05-21 Thread Pekka Paalanen
On Tue, 21 May 2019 09:52:50 +0200 Daniel Vetter wrote: > On Tue, May 21, 2019 at 8:55 AM Pekka Paalanen wrote: > > > > On Mon, 20 May 2019 18:11:07 +0200 > > Daniel Vetter wrote: > > > > > On Fri, May 17, 2019 at 01:08:24PM +0300, Pekka Paalanen wrote: > > > > On Thu, 16 May 2019 14:24:55

[Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Daniel Vetter
In some special cases we must not block, but there's not a spinlock, preempt-off, irqs-off or similar critical section already that arms the might_sleep() debug checks. Add a non_block_start/end() pair to annotate these. This will be used in the oom paths of mmu-notifiers, where blocking is not

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Michal Hocko
On Tue 21-05-19 12:06:11, Daniel Vetter wrote: > In some special cases we must not block, but there's not a > spinlock, preempt-off, irqs-off or similar critical section already > that arms the might_sleep() debug checks. Add a non_block_start/end() > pair to annotate these. > > This will be used

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 12:46:38PM +0200, Michal Hocko wrote: > On Tue 21-05-19 12:06:11, Daniel Vetter wrote: > > In some special cases we must not block, but there's not a > > spinlock, preempt-off, irqs-off or similar critical section already > > that arms the might_sleep() debug checks. Add a

[Intel-gfx] ✓ Fi.CI.BAT: success for linux-next: manual merge of the drm-misc tree with Linus' tree (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: linux-next: manual merge of the drm-misc tree with Linus' tree (rev2) URL : https://patchwork.freedesktop.org/series/60886/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13056

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for kernel.h: Add non_block_start/end()

2019-05-21 Thread Patchwork
== Series Details == Series: kernel.h: Add non_block_start/end() URL : https://patchwork.freedesktop.org/series/60896/ State : warning == Summary == $ dim checkpatch origin/drm-tip 945d83c6e58d kernel.h: Add non_block_start/end() -:77: WARNING:SINGLE_STATEMENT_DO_WHILE_MACRO: Single statement

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 02/27] trace.pl: Ignore signaling on non i915 fences

2019-05-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-05-21 14:22:18) > > On 21/05/2019 08:57, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-05-20 15:47:14) > >> From: Tvrtko Ursulin > >> > >> gem_wsim uses the sw_fence timeline and confuses the script. > >> > >> v2: > >> * Check the correct timeline as well.

[Intel-gfx] [PATCH 4/5] drm/i915: add a new perf configuration execbuf parameter

2019-05-21 Thread Lionel Landwerlin
We want the ability to dispatch a set of command buffer to the hardware, each with a different OA configuration. To achieve this, we reuse a couple of fields from the execbuf2 struct (I CAN HAZ execbuf3?) to notify what OA configuration should be used for a batch buffer. This requires the process

[Intel-gfx] [PATCH 1/5] drm/i915/perf: introduce a versioning of the i915-perf uapi

2019-05-21 Thread Lionel Landwerlin
Reporting this version will help application figure out what level of the support the running kernel provides. Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_drv.c | 3 +++ include/uapi/drm/i915_drm.h | 20 2 files changed, 23 insertions(+) diff --git

[Intel-gfx] [PATCH 5/5] drm/i915: add support for perf configuration queries

2019-05-21 Thread Lionel Landwerlin
Listing configurations at the moment is supported only through sysfs. This might cause issues for applications wanting to list configurations from a container where sysfs isn't available. This change adds a way to query the number of configurations and their content through the i915 query uAPI.

[Intel-gfx] [PATCH 0/5] drm/i915: Vulkan performance query support

2019-05-21 Thread Lionel Landwerlin
Hi all, This small (but maybe not to everybody's taste) series enables us to support performance queries on Vulkan. We've gone through the process to define this as a Vulkan INTEL extension (it should appear on [1] soonish). We'll publish the Mesa side shortly. Cheers, [1] :

[Intel-gfx] [PATCH 3/5] drm/i915/perf: allow for CS OA configs to be created lazily

2019-05-21 Thread Lionel Landwerlin
Here we introduce a mechanism by which the execbuf part of the i915 driver will be able to request that a batch buffer containing the programming for a particular OA config be created. We'll execute these OA configuration buffers right before executing a set of userspace commands so that a

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2) URL : https://patchwork.freedesktop.org/series/60880/ State : success == Summary == CI Bug Log - changes from CI_DRM_6113 ->

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 08:24:53PM +0900, Tetsuo Handa wrote: > On 2019/05/21 20:11, Michal Hocko wrote: > > On Tue 21-05-19 20:04:34, Tetsuo Handa wrote: > >> On 2019/05/21 19:51, Michal Hocko wrote: > >>> On Tue 21-05-19 19:44:01, Tetsuo Handa wrote: > On 2019/05/21 19:06, Daniel Vetter

[Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Daniel Vetter
In some special cases we must not block, but there's not a spinlock, preempt-off, irqs-off or similar critical section already that arms the might_sleep() debug checks. Add a non_block_start/end() pair to annotate these. This will be used in the oom paths of mmu-notifiers, where blocking is not

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Christopher Lameter
On Tue, 21 May 2019, Daniel Vetter wrote: > In some special cases we must not block, but there's not a > spinlock, preempt-off, irqs-off or similar critical section already > that arms the might_sleep() debug checks. Add a non_block_start/end() > pair to annotate these. Just putting preempt

Re: [Intel-gfx] [PATCH 10/33] fbcon: call fbcon_fb_(un)registered directly

2019-05-21 Thread Daniel Vetter
On Mon, May 20, 2019 at 10:37:53AM +0200, Thomas Zimmermann wrote: > Hi > > Am 20.05.19 um 10:33 schrieb Thomas Zimmermann: > > Hi > > > > Am 20.05.19 um 10:21 schrieb Daniel Vetter: > > ... > >> diff --git a/drivers/video/fbdev/core/fbmem.c > >> b/drivers/video/fbdev/core/fbmem.c > >> index

Re: [Intel-gfx] [PATCH 1/4] mm: Check if mmu notifier callbacks are allowed to fail

2019-05-21 Thread Jerome Glisse
On Mon, May 20, 2019 at 11:39:42PM +0200, Daniel Vetter wrote: > Just a bit of paranoia, since if we start pushing this deep into > callchains it's hard to spot all places where an mmu notifier > implementation might fail when it's not allowed to. > > Inspired by some confusion we had discussing

[Intel-gfx] [PATCH] fbcon: Remove fbcon_has_exited

2019-05-21 Thread Daniel Vetter
This is unused code since commit 6104c37094e729f3d4ce65797002112735d49cd1 Author: Daniel Vetter Date: Tue Aug 1 17:32:07 2017 +0200 fbcon: Make fbcon a built-time depency for fbdev when fbcon was made a compile-time static dependency of fbdev. We can't exit fbcon anymore without exiting

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2) URL : https://patchwork.freedesktop.org/series/60880/ State : warning == Summary == $ dim checkpatch origin/drm-tip ee90db0cb06a

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Michal Hocko
On Tue 21-05-19 14:43:38, Cristopher Lameter wrote: > On Tue, 21 May 2019, Daniel Vetter wrote: > > > In some special cases we must not block, but there's not a > > spinlock, preempt-off, irqs-off or similar critical section already > > that arms the might_sleep() debug checks. Add a

Re: [Intel-gfx] [PATCH 3/4] mm, notifier: Catch sleeping/blocking for !blockable

2019-05-21 Thread Jerome Glisse
On Mon, May 20, 2019 at 11:39:44PM +0200, Daniel Vetter wrote: > We need to make sure implementations don't cheat and don't have a > possible schedule/blocking point deeply burried where review can't > catch it. > > I'm not sure whether this is the best way to make sure all the > might_sleep()

[Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread Lionel Landwerlin
We would like to make use of perf in Vulkan. The Vulkan API is much lower level than OpenGL, with applications directly exposed to the concept of command buffers (pretty much equivalent to our batch buffers). In Vulkan, queries are always limited in scope to a command buffer. In OpenGL, the lack

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for linux-next: manual merge of the drm-misc tree with Linus' tree (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: linux-next: manual merge of the drm-misc tree with Linus' tree (rev2) URL : https://patchwork.freedesktop.org/series/60886/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9ade394d0944 linux-next: manual merge of the drm-misc tree with Linus' tree

Re: [Intel-gfx] [PATCH 4/4] mm, notifier: Add a lockdep map for invalidate_range_start

2019-05-21 Thread Jerome Glisse
On Mon, May 20, 2019 at 11:39:45PM +0200, Daniel Vetter wrote: > This is a similar idea to the fs_reclaim fake lockdep lock. It's > fairly easy to provoke a specific notifier to be run on a specific > range: Just prep it, and then munmap() it. > > A bit harder, but still doable, is to provoke the

Re: [Intel-gfx] [PATCH 32/33] fbcon: Document what I learned about fbcon locking

2019-05-21 Thread Maarten Lankhorst
Op 20-05-2019 om 10:22 schreef Daniel Vetter: > It's not pretty. > > Signed-off-by: Daniel Vetter > Cc: Daniel Vetter > Cc: Bartlomiej Zolnierkiewicz > Cc: Hans de Goede > Cc: Yisheng Xie > --- > drivers/video/fbdev/core/fbcon.c | 19 +++ > 1 file changed, 19 insertions(+) >

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Tetsuo Handa
On 2019/05/21 20:11, Michal Hocko wrote: > On Tue 21-05-19 20:04:34, Tetsuo Handa wrote: >> On 2019/05/21 19:51, Michal Hocko wrote: >>> On Tue 21-05-19 19:44:01, Tetsuo Handa wrote: On 2019/05/21 19:06, Daniel Vetter wrote: > In some special cases we must not block, but there's not a

Re: [Intel-gfx] [PATCH v8 2/6] drm: Rename struct edp_vsc_psr to struct dp_sdp

2019-05-21 Thread Mun, Gwan-gyeong
On Tue, 2019-05-21 at 13:14 +0300, Laurent Pinchart wrote: > Hello Jani, > > On Tue, May 21, 2019 at 09:44:04AM +0300, Jani Nikula wrote: > > On Mon, 20 May 2019, Gwan-gyeong Mun > > wrote: > > > VSC SDP Payload for PSR is one of data block type of SDP > > > (Secondaray Data > > > Packet). In

Re: [Intel-gfx] linux-next: Fixes tag needs some work in the drm-intel tree

2019-05-21 Thread Joonas Lahtinen
Quoting Stephen Rothwell (2019-05-20 15:15:38) > Hi all, > > In commit > > 0d90ccb70211 ("drm/i915: Delay semaphore submission until the start of the > signaler") > > Fixes tag > > Fixes: e88619646971 ("drm/i915: Use HW semaphores for inter-engine synchroni > > has these problem(s): > >

Re: [Intel-gfx] [PATCH] drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15

2019-05-21 Thread Ville Syrjälä
On Mon, May 20, 2019 at 04:25:41PM -0700, Khaled Almahallawy wrote: > According to DP 1.4 standard, if the source supports four pre-emphasis > levels, then the source shall set the bit MAX_PRE-EMPHASIS_REACHED = 1 only > when trasmitter programmed PRE-EMPHASIS_SET field (bits 4:3) to 11b (Level

Re: [Intel-gfx] [PATCH v2] drm/i915/huc: Don't try to check HuC status if it's not loaded

2019-05-21 Thread Michal Wajdeczko
On Tue, 21 May 2019 13:04:12 +0200, Ye, Tony wrote: There are two users of I915_PARAM_HUC_STATUS, the intel-media driver and the legacy intel-vaapi-driver. Both drivers check the return value like this: has_huc = !! ret_value; So the ABI change will break the existing stack because

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Allow modeset on unregisted connectors unconditionally (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm: Allow modeset on unregisted connectors unconditionally (rev2) URL : https://patchwork.freedesktop.org/series/60871/ State : success == Summary == CI Bug Log - changes from CI_DRM_6110 -> Patchwork_13054

[Intel-gfx] [PATCH v9 2/6] drm: Rename struct edp_vsc_psr to struct dp_sdp

2019-05-21 Thread Gwan-gyeong Mun
VSC SDP Payload for PSR is one of data block type of SDP (Secondaray Data Packet). In order to generalize SDP packet structure name, it renames struct edp_vsc_psr to struct dp_sdp. And each SDP data blocks have different usages, each SDP type has different reserved data blocks and

[Intel-gfx] [PATCH v9 5/6] drm/i915/dp: Change a link bandwidth computation for DP

2019-05-21 Thread Gwan-gyeong Mun
Data M/N calculations were assumed a bpp as RGB format. But when we are using YCbCr 4:2:0 output format on DP, we should change bpp calculations as YCbCr 4:2:0 format. The pipe_bpp value was assumed RGB format, therefore, it was multiplied with 3. But YCbCr 4:2:0 requires a multiplier value to

[Intel-gfx] [PATCH v9 1/6] drm/i915/dp: Add a config function for YCBCR420 outputs

2019-05-21 Thread Gwan-gyeong Mun
This patch checks a support of YCBCR420 outputs on an encoder level. If the input mode is YCBCR420-only mode then it prepares DP as an YCBCR420 output, else it continues with RGB output mode. It set output_format to INTEL_OUTPUT_FORMAT_YCBCR420 in order to using a pipe scaler as RGB to YCbCr

[Intel-gfx] [PATCH v9 0/6] drm/i915/dp: Support for DP YCbCr4:2:0 outputs

2019-05-21 Thread Gwan-gyeong Mun
On Gen 11 platform, to enable resolutions like 5K@120 (or higher) we need to use DSC (DP 1.4) or YCbCr4:2:0 (DP 1.3 or 1.4) on DP. In order to support YCbCr4:2:0 on DP we need to program YCBCR 4:2:0 to MSA and VSC SDP. And Link M/N values are calculated and applied based on the Full Clock

[Intel-gfx] [PATCH v9 3/6] drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format

2019-05-21 Thread Gwan-gyeong Mun
Function intel_pixel_encoding_setup_vsc handles vsc header and data block setup for pixel encoding / colorimetry format. Setup VSC header and data block in function intel_pixel_encoding_setup_vsc for pixel encoding / colorimetry format as per dp 1.4a spec, section 2.2.5.7.1, table 2-119: VSC SDP

[Intel-gfx] [PATCH v9 6/6] drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11

2019-05-21 Thread Gwan-gyeong Mun
Bspec describes that GEN10 only supports capability of YUV 4:2:0 output to HDMI port and GEN11 supports capability of YUV 4:2:0 output to both DP and HDMI ports. v2: Minor style fix. Signed-off-by: Gwan-gyeong Mun Reviewed-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_dp.c | 3 +++ 1

[Intel-gfx] [PATCH v9 4/6] drm/i915/dp: Add a support of YCBCR 4:2:0 to DP MSA

2019-05-21 Thread Gwan-gyeong Mun
When YCBCR 4:2:0 outputs is used for DP, we should program YCBCR 4:2:0 to MSA and VSC SDP. As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication of Color Encoding Format and Content Color Gamut] while sending YCBCR 420 signals we should program MSA MISC1 fields which indicate VSC SDP for

Re: [Intel-gfx] [PATCH 29/33] fbcon: replace FB_EVENT_MODE_CHANGE/_ALL with direct calls

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 12:56:30PM +0200, Maarten Lankhorst wrote: > Op 20-05-2019 om 10:22 schreef Daniel Vetter: > > Create a new wrapper function for this, feels like there's some > > refactoring room here between the two modes. > > > > Signed-off-by: Daniel Vetter > > Cc: Lee Jones > > Cc:

[Intel-gfx] [CI 04/10] drm/i915: Re-expose SINGLE_TIMELINE flags for context creation

2019-05-21 Thread Chris Wilson
The SINGLE_TIMELINE flag can be used to create a context such that all engine instances within that context share a common timeline. This can be useful for mixing operations between real and virtual engines, or when using a composite context for a single client API context. Signed-off-by: Chris

[Intel-gfx] [CI 09/10] drm/i915/execlists: Virtual engine bonding

2019-05-21 Thread Chris Wilson
Some users require that when a master batch is executed on one particular engine, a companion batch is run simultaneously on a specific slave engine. For this purpose, we introduce virtual engine bonding, allowing maps of master:slaves to be constructed to constrain which physical engines a

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Michal Hocko
On Tue 21-05-19 20:04:34, Tetsuo Handa wrote: > On 2019/05/21 19:51, Michal Hocko wrote: > > On Tue 21-05-19 19:44:01, Tetsuo Handa wrote: > >> On 2019/05/21 19:06, Daniel Vetter wrote: > >>> In some special cases we must not block, but there's not a > >>> spinlock, preempt-off, irqs-off or

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 02/27] trace.pl: Ignore signaling on non i915 fences

2019-05-21 Thread Tvrtko Ursulin
On 21/05/2019 08:57, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-05-20 15:47:14) From: Tvrtko Ursulin gem_wsim uses the sw_fence timeline and confuses the script. v2: * Check the correct timeline as well. (Chris) Signed-off-by: Tvrtko Ursulin --- scripts/trace.pl | 3 +++ 1 file

Re: [Intel-gfx] [v6][PATCH 03/12] drm/i915: Add intel_color_lut_equal() to compare hw and sw gamma/degamma lut values

2019-05-21 Thread Sharma, Swati2
On 14-May-19 9:40 PM, Ville Syrjälä wrote: On Tue, May 14, 2019 at 03:13:21PM +0530, Swati Sharma wrote: v3: -Rebase v4: -Renamed intel_compare_color_lut() to intel_color_lut_equal() [Jani] -Added the default label above the correct label [Jani] -Corrected smatch warn "variable

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 24/27] gem_wsim: Discover engines

2019-05-21 Thread Andi Shyti
Hi Tvrtko, On Mon, May 20, 2019 at 03:47:36PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Instead of hardcoding the VCS balancing engines, discover, both with the > new engines query, or with the legacy get_param in the fallback case, so > class based addressing always works. > >

Re: [Intel-gfx] [PATCH 29/33] fbcon: replace FB_EVENT_MODE_CHANGE/_ALL with direct calls

2019-05-21 Thread Maarten Lankhorst
Op 20-05-2019 om 10:22 schreef Daniel Vetter: > Create a new wrapper function for this, feels like there's some > refactoring room here between the two modes. > > Signed-off-by: Daniel Vetter > Cc: Lee Jones > Cc: Daniel Thompson > Cc: Jingoo Han > Cc: Bartlomiej Zolnierkiewicz > Cc: Daniel

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Tetsuo Handa
On 2019/05/21 19:51, Michal Hocko wrote: > On Tue 21-05-19 19:44:01, Tetsuo Handa wrote: >> On 2019/05/21 19:06, Daniel Vetter wrote: >>> In some special cases we must not block, but there's not a >>> spinlock, preempt-off, irqs-off or similar critical section already >>> that arms the

[Intel-gfx] [CI 01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Chris Wilson
Having hid the partially exposed new ABI from the PR, put it back again for completion of context recovery. A significant part of context recovery is the ability to reuse as much of the old context as is feasible (to avoid expensive reconstruction). The biggest chunk kept hidden at the moment is

[Intel-gfx] [CI 05/10] drm/i915: Allow userspace to clone contexts on creation

2019-05-21 Thread Chris Wilson
A usecase arose out of handling context recovery in mesa, whereby they wish to recreate a context with fresh logical state but preserving all other details of the original. Currently, they create a new context and iterate over which bits they want to copy across, but it would much more convenient

[Intel-gfx] [CI 08/10] drm/i915: Extend execution fence to support a callback

2019-05-21 Thread Chris Wilson
In the next patch, we will want to configure the slave request depending on which physical engine the master request is executed on. For this, we introduce a callback from the execute fence to convey this information. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin ---

[Intel-gfx] [CI 10/10] drm/i915: Allow specification of parallel execbuf

2019-05-21 Thread Chris Wilson
There is a desire to split a task onto two engines and have them run at the same time, e.g. scanline interleaving to spread the workload evenly. Through the use of the out-fence from the first execbuf, we can coordinate secondary execbuf to only become ready simultaneously with the first, so that

[Intel-gfx] [CI 03/10] drm/i915: Extend I915_CONTEXT_PARAM_SSEU to support local ctx->engine[]

2019-05-21 Thread Chris Wilson
Allow the user to specify a local engine index (as opposed to class:index) that they can use to refer to a preset engine inside the ctx->engine[] array defined by an earlier I915_CONTEXT_PARAM_ENGINES. This will be useful for setting SSEU parameters on virtual engines that are local to the context

[Intel-gfx] [CI 07/10] drm/i915: Apply an execution_mask to the virtual_engine

2019-05-21 Thread Chris Wilson
Allow the user to direct which physical engines of the virtual engine they wish to execute one, as sometimes it is necessary to override the load balancing algorithm. v2: Only kick the virtual engines on context-out if required Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko

[Intel-gfx] [CI 02/10] drm/i915: Allow a context to define its set of engines

2019-05-21 Thread Chris Wilson
Over the last few years, we have debated how to extend the user API to support an increase in the number of engines, that may be sparse and even be heterogeneous within a class (not all video decoders created equal). We settled on using (class, instance) tuples to identify a specific engine, with

[Intel-gfx] [CI 06/10] drm/i915: Load balancing across a virtual engine

2019-05-21 Thread Chris Wilson
Having allowed the user to define a set of engines that they will want to only use, we go one step further and allow them to bind those engines into a single virtual instance. Submitting a batch to the virtual engine will then forward it to any one of the set in a manner as best to distribute

[Intel-gfx] Comments in Fixes: line (Was: Re: linux-next: Fixes tag needs some work in the drm-intel tree)

2019-05-21 Thread Joonas Lahtinen
We also have an incoming patch where the Fixes: line has a comment in it. Does your tooling account for this when checking the Fixes: line? Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH v2] drm/i915/huc: Don't try to check HuC status if it's not loaded

2019-05-21 Thread Ye, Tony
There are two users of I915_PARAM_HUC_STATUS, the intel-media driver and the legacy intel-vaapi-driver. Both drivers check the return value like this:     has_huc = !! ret_value; So the ABI change will break the existing stack because negative values are treated as 1, won't it? On

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add i2c symlink under hdmi connector (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: add i2c symlink under hdmi connector (rev2) URL : https://patchwork.freedesktop.org/series/60866/ State : success == Summary == CI Bug Log - changes from CI_DRM_6110 -> Patchwork_13053 Summary ---

Re: [Intel-gfx] [PULL] gvt-fixes

2019-05-21 Thread Joonas Lahtinen
Quoting Zhenyu Wang (2019-05-21 09:24:08) > > Hi, > > Here's gvt-fixes for 5.2-rc. It contains vgpu reset fix with > proper timeline handling, fixes for guest TRTT setting which > should be handled in context state instead of pushing directly > to hardware and one error return fix. This is now

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60909/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Restore control

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60909/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13059

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Vulkan performance query support

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Vulkan performance query support URL : https://patchwork.freedesktop.org/series/60916/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/perf: introduce a versioning of the i915-perf uapi Okay! Commit:

[Intel-gfx] [PATCH v5 1/2] drm/i915: Make sandybridge_pcode_read() deal with the second data register

2019-05-21 Thread Ville Syrjala
From: Ville Syrjälä The pcode mailbox has two data registers. So far we've only ever used the one, but that's about to change. Expose the second data register to the callers of sandybridge_pcode_read(). Signed-off-by: Ville Syrjälä Reviewed-by: Clint Taylor Reviewed-by: Radhakrishna Sripada

[Intel-gfx] [PATCH v5 2/2] drm/i915: Make sure we have enough memory bandwidth on ICL

2019-05-21 Thread Ville Syrjala
From: Ville Syrjälä ICL has so many planes that it can easily exceed the maximum effective memory bandwidth of the system. We must therefore check that we don't exceed that limit. The algorithm is very magic number heavy and lacks sufficient explanation for now. We also have no sane way to

Re: [Intel-gfx] [PATCH] drm/i915: add force_probe module parameter to replace alpha_support

2019-05-21 Thread Rodrigo Vivi
On Mon, May 06, 2019 at 04:48:01PM +0300, Jani Nikula wrote: > The i915.alpha_support module parameter has caused some confusion along > the way. Add new i915.force_probe parameter to specify PCI IDs of > devices to probe, when the devices are recognized but not automatically > probed by the

Re: [Intel-gfx] [PATCH 4/5] drm/i915: add a new perf configuration execbuf parameter

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 15:08:54) > + if (eb->oa_config && > + eb->oa_config != eb->i915->perf.oa.exclusive_stream->oa_config) { But the oa_config is not ordered with respect to requests, and the registers changed here are not context saved and so may be changed by a

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for fbcon notifier begone! (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: fbcon notifier begone! (rev2) URL : https://patchwork.freedesktop.org/series/60843/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6712c9a81334 dummycon: Sprinkle locking checks -:45: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by

Re: [Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 17:50:30) > On 21/05/2019 17:36, Chris Wilson wrote: > > Quoting Lionel Landwerlin (2019-05-21 15:08:52) > >> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > >> b/drivers/gpu/drm/i915/gt/intel_lrc.c > >> index f263a8374273..2ad95977f7a8 100644 > >> ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for fbcon notifier begone! (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: fbcon notifier begone! (rev2) URL : https://patchwork.freedesktop.org/series/60843/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: dummycon: Sprinkle locking checks Okay! Commit: fbdev: locking check for fb_set_suspend

[Intel-gfx] ✗ Fi.CI.BAT: failure for fbcon notifier begone! (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: fbcon notifier begone! (rev2) URL : https://patchwork.freedesktop.org/series/60843/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13061 Summary --- **FAILURE**

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Expand subslice mask

2019-05-21 Thread Summers, Stuart
On Thu, 2019-05-16 at 15:40 -0700, Daniele Ceraolo Spurio wrote: > > > > --- a/drivers/gpu/drm/i915/gt/intel_sseu.h > > +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h > > @@ -9,16 +9,18 @@ > > > > #include > > #include > > +#include > > AFAICS this header is not needed anymore. With it

Re: [Intel-gfx] [PATCH 4/4] mm, notifier: Add a lockdep map for invalidate_range_start

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 5:41 PM Jerome Glisse wrote: > > On Mon, May 20, 2019 at 11:39:45PM +0200, Daniel Vetter wrote: > > This is a similar idea to the fs_reclaim fake lockdep lock. It's > > fairly easy to provoke a specific notifier to be run on a specific > > range: Just prep it, and then

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Support for DP YCbCr4:2:0 outputs (rev4)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915/dp: Support for DP YCbCr4:2:0 outputs (rev4) URL : https://patchwork.freedesktop.org/series/60404/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13058 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60909/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0ef328fc3f6f drm/i915: Restore control over ppgtt for

Re: [Intel-gfx] [PATCH 4/4] mm, notifier: Add a lockdep map for invalidate_range_start

2019-05-21 Thread Jerome Glisse
On Tue, May 21, 2019 at 06:00:36PM +0200, Daniel Vetter wrote: > On Tue, May 21, 2019 at 5:41 PM Jerome Glisse wrote: > > > > On Mon, May 20, 2019 at 11:39:45PM +0200, Daniel Vetter wrote: > > > This is a similar idea to the fs_reclaim fake lockdep lock. It's > > > fairly easy to provoke a

Re: [Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 15:08:52) > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > b/drivers/gpu/drm/i915/gt/intel_lrc.c > index f263a8374273..2ad95977f7a8 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -2085,7 +2085,7 @@

Re: [Intel-gfx] [PATCH 4/5] drm/i915: add a new perf configuration execbuf parameter

2019-05-21 Thread Lionel Landwerlin
On 21/05/2019 18:07, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-05-21 15:08:54) + if (eb->oa_config && + eb->oa_config != eb->i915->perf.oa.exclusive_stream->oa_config) { But the oa_config is not ordered with respect to requests, and the registers changed here are not

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Allow modeset on unregisted connectors unconditionally (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm: Allow modeset on unregisted connectors unconditionally (rev2) URL : https://patchwork.freedesktop.org/series/60871/ State : success == Summary == CI Bug Log - changes from CI_DRM_6110_full -> Patchwork_13054_full

[Intel-gfx] ✓ Fi.CI.BAT: success for kernel.h: Add non_block_start/end()

2019-05-21 Thread Patchwork
== Series Details == Series: kernel.h: Add non_block_start/end() URL : https://patchwork.freedesktop.org/series/60896/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13057 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH 3/5] drm/i915/perf: allow for CS OA configs to be created lazily

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 15:08:53) > Here we introduce a mechanism by which the execbuf part of the i915 > driver will be able to request that a batch buffer containing the > programming for a particular OA config be created. > > We'll execute these OA configuration buffers right

  1   2   >