== Series Details ==
Series: drm/i915: Add Pipe D cursor ctrl register for Gen12 (rev2)
URL : https://patchwork.freedesktop.org/series/67144/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6945 -> Patchwork_14513
Summary
Hi Chris,
On Mon, Sep 23, 2019 at 08:41:49AM +0100, Chris Wilson wrote:
> As not every machine can use contexts, include a non-context reset stress
> test to run in parallel to enabling/disabling pipes.
makes sense.
> Signed-off-by: Chris Wilson
> ---
> tests/i915/gem_eio.c | 7 +--
> 1
Am 17.09.19 um 16:56 schrieb Daniel Vetter:
> [SNIP]
>>> +/* When either the importer or the exporter can't handle
>>> dynamic
>>> + * mappings we cache the mapping here to avoid issues with the
>>> + * reservation object lock.
>>> +
== Series Details ==
Series: TGL TC enabling (rev3)
URL : https://patchwork.freedesktop.org/series/66695/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6945_full -> Patchwork_14507_full
Summary
---
**SUCCESS**
No
From: Ankit Nautiyal
Currently the offset for PIPE D cursor control register is missing in
i915_reg.h due to which the cursor plane cannot be enabled for Pipe D.
This also causes kernel Warning, when a user requests to enable cursor
plane for PIPE D for Gen 12 platforms.
This patch adds the
On 24/09/2019 00:51, john.c.harri...@intel.com wrote:
From: John Harrison
With virtual engines, it is no longer possible to know which specific
physical engine a given request will be executed on at the time that
request is generated. This means that the request itself must be engine
agnostic
Quoting Mika Kuoppala (2019-09-24 11:21:38)
> Chris Wilson writes:
> > +static u32 *set_offsets(u32 *regs,
> > + const u8 *data,
> > + const struct intel_engine_cs *engine)
> > +#define NOP(x) (BIT(7) | (x))
> > +#define LRI(count, flags) ((flags) << 6 |
Quoting Patchwork (2019-09-24 08:43:47)
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915/selftests: Verify the LRC
> register layout between init and HW (rev2)
> URL : https://patchwork.freedesktop.org/series/67135/
> State : success
>
> == Summary ==
>
> CI Bug Log -
On Fri, 20 Sep 2019 at 13:18, Chris Wilson wrote:
>
> Since dropping the set-to-gtt-domain in commit a679f58d0510 ("drm/i915:
> Flush pages on acquisition"), we no longer mark the contents as dirty on
> a write fault. This has the issue of us then not marking the pages as
> dirty on releasing the
On 24/09/2019 00:51, john.c.harri...@intel.com wrote:
From: John Harrison
With virtual engines, it is no longer possible to know which specific
physical engine a given request will be executed on at the time that
request is generated. This means that the request itself must be engine
agnostic
On 2019/9/24 上午12:05, Alex Williamson wrote:
> On Mon, 23 Sep 2019 21:03:26 +0800
> Jason Wang wrote:
>
>> Mdev bus only supports vfio driver right now, so it doesn't implement
>> match method. But in the future, we may add drivers other than vfio,
>> one example is virtio-mdev[1] driver. This
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Fixup preempt-to-busy vs
resubmission of a virtual request
URL : https://patchwork.freedesktop.org/series/67115/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6944_full -> Patchwork_14504_full
On 24/09/2019 00:51, john.c.harri...@intel.com wrote:
From: John Harrison
Gen12 introduces a completely new and different scheme for
implementing engine relative MMIO accesses - MI_LRI_MMIO_REMAP. This
requires using the base address of instance zero of the relevant
engine class. And then, it
Chris Wilson writes:
> Before we submit the first context to HW, we need to construct a valid
> image of the register state. This layout is defined by the HW and should
> match the layout generated by HW when it saves the context image.
> Asserting that this should be equivalent should help
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Verify the LRC register
layout between init and HW (rev2)
URL : https://patchwork.freedesktop.org/series/67135/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b188840c0465 drm/i915/selftests: Verify
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Verify the LRC register
layout between init and HW (rev2)
URL : https://patchwork.freedesktop.org/series/67135/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6945 -> Patchwork_14512
== Series Details ==
Series: drm/i915: Add Pipe D cursor ctrl register for Gen12 (rev2)
URL : https://patchwork.freedesktop.org/series/67144/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0158d2fbd4e0 drm/i915: Add Pipe D cursor ctrl register for Gen12
-:34:
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Fixup preempt-to-busy vs
resubmission of a virtual request
URL : https://patchwork.freedesktop.org/series/67116/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6944_full -> Patchwork_14505_full
On Mon, Sep 23, 2019 at 02:23:25PM -0400, Bhawanpreet Lakha wrote:
> Rename "i915_hdcp_sink_capability" to "hdcp_sink_capability"
>
> The content protection tests only start if this debugfs entry exists.
> Since the name is specific to intel driver these tests cannot be used with
> other drivers.
Quoting Mika Kuoppala (2019-09-24 11:21:38)
> Chris Wilson writes:
>
> > Before we submit the first context to HW, we need to construct a valid
> > image of the register state. This layout is defined by the HW and should
> > match the layout generated by HW when it saves the context image.
> >
Before we submit the first context to HW, we need to construct a valid
image of the register state. This layout is defined by the HW and should
match the layout generated by HW when it saves the context image.
Asserting that this should be equivalent should help avoid any undefined
behaviour and
== Series Details ==
Series: mdev based hardware virtio offloading support (rev3)
URL : https://patchwork.freedesktop.org/series/66989/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6346e474d4a5 vringh: fix copy direction of vringh_iov_push_kern()
1f34e53afc28 mdev: class id
Quoting Chris Wilson (2019-09-24 15:59:50)
> Before we submit the first context to HW, we need to construct a valid
> image of the register state. This layout is defined by the HW and should
> match the layout generated by HW when it saves the context image.
> Asserting that this should be
On 02/09/2019 05:02, Chris Wilson wrote:
We don't need to hold struct_mutex now for retiring requests, so drop it
from i915_retire_requests() and i915_gem_wait_for_idle(), finally
removing I915_WAIT_LOCKED for good.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gem/i915_gem_client_blt.c
On 2019/9/23 下午11:36, Michael S. Tsirkin wrote:
> On Mon, Sep 23, 2019 at 11:20:12PM +0800, kbuild test robot wrote:
>> Hi Jason,
>>
>> I love your patch! Yet something to improve:
>>
>> [auto build test ERROR on linus/master]
>> [cannot apply to v5.3 next-20190920]
>> [if your patch is applied
On 2019/9/24 上午5:02, Parav Pandit wrote:
> Hi Jason,
>
>
>> -Original Message-
>> From: Jason Wang
>> Sent: Monday, September 23, 2019 8:03 AM
>> To: k...@vger.kernel.org; linux-s...@vger.kernel.org; linux-
>> ker...@vger.kernel.org; dri-de...@lists.freedesktop.org; intel-
>>
On Sun, 22 Sep 2019, Swati Sharma wrote:
> For icl+, have hw read out to create hw blob of gamma
> lut values. icl+ platforms supports multi segmented gamma
> mode by default, add hw lut creation for this mode.
>
> This will be used to validate gamma programming using dsb
> (display state buffer)
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
v2: move unlikely() to drm_debug_enabled()
Cc: Ben Skeggs
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/nouveau/dispnv50/disp.h | 4 ++--
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
Cc: Alex Deucher
Cc: Christian König
Cc: David (ChunMing) Zhou
Cc: amd-...@lists.freedesktop.org
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c | 4 ++--
1 file changed,
On Mon, Sep 23, 2019 at 03:02:54PM -0700, Lucas De Marchi wrote:
> On Mon, Sep 23, 2019 at 12:55 PM José Roberto de Souza
> wrote:
> > [...]
>
> > + ln1 &= ~(DKL_DP_MODE_CFG_DP_X1_MODE |
> > DKL_DP_MODE_CFG_DP_X2_MODE);
> > +
> > + lane_mask =
drm_debug_enabled() is the way to check. __drm_debug is now reserved for
drm print code only. No functional changes.
v2: Rebase on move unlikely() to drm_debug_enabled()
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_print.c | 8
include/drm/drm_print.h | 5 +++--
2 files
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Verify the LRC register
layout between init and HW (rev3)
URL : https://patchwork.freedesktop.org/series/67135/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
04c615713c10 drm/i915/selftests: Verify
On Mon, 23 Sep 2019 12:00:41 -0400
"Michael S. Tsirkin" wrote:
> On Mon, Sep 23, 2019 at 09:45:59AM -0600, Alex Williamson wrote:
> > On Mon, 23 Sep 2019 21:03:30 +0800
> > Jason Wang wrote:
> >
> > > We want to copy from iov to buf, so the direction was wrong.
> > >
> > > Signed-off-by:
This reverts commit 84af7649188194a74cdd6437235a5e3c86108f0f.
This is causing problems with the display, displays are all
bright colors.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 126 +++--
drivers/gpu/drm/i915/i915_reg.h| 6 -
2
On Mon, Sep 23, 2019 at 12:55:05PM -0700, José Roberto de Souza wrote:
> From: Lucas De Marchi
>
> The disable function can be the same as for MG phy since the same
> registers are used. The others are different as registers changed,
> also adding a empty dkl_pll_write() to be implemented later.
== Series Details ==
Series: drm/i915: Engine relative MMIO (rev9)
URL : https://patchwork.freedesktop.org/series/57117/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6945_full -> Patchwork_14509_full
Summary
---
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-09-24 11:21:38)
>> Chris Wilson writes:
>>
>> > Before we submit the first context to HW, we need to construct a valid
>> > image of the register state. This layout is defined by the HW and should
>> > match the layout generated by HW when it
== Series Details ==
Series: drm/print: add and use drm_debug_enabled() (rev2)
URL : https://patchwork.freedesktop.org/series/66656/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6948 -> Patchwork_14515
Summary
---
On 24-Sep-19 5:47 PM, Jani Nikula wrote:
On Sun, 22 Sep 2019, Swati Sharma wrote:
For icl+, have hw read out to create hw blob of gamma
lut values. icl+ platforms supports multi segmented gamma
mode by default, add hw lut creation for this mode.
This will be used to validate gamma programming
We have used the tests for our hdcp implementation. But because of the
name we can't use it as is.
Bhawan
On 2019-09-24 5:54 a.m., Petri Latvala wrote:
> On Mon, Sep 23, 2019 at 02:23:25PM -0400, Bhawanpreet Lakha wrote:
>> Rename "i915_hdcp_sink_capability" to "hdcp_sink_capability"
>>
>> The
On 02/09/2019 05:03, Chris Wilson wrote:
Nothing inside the idle worker now requires struct_mutex, so we can
remove the indirection of using our own worker.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 28 ++-
== Series Details ==
Series: mdev based hardware virtio offloading support (rev3)
URL : https://patchwork.freedesktop.org/series/66989/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6948 -> Patchwork_14516
Summary
---
On 2019/9/24 上午6:59, Parav Pandit wrote:
>
>> -Original Message-
>> From: Jason Wang
>> Sent: Monday, September 23, 2019 8:03 AM
>> To: k...@vger.kernel.org; linux-s...@vger.kernel.org; linux-
>> ker...@vger.kernel.org; dri-de...@lists.freedesktop.org; intel-
>>
Quoting Mika Kuoppala (2019-09-24 13:44:54)
> Chris Wilson writes:
>
> > Beware the slithy t'oves.
> >
> > Forked GTT access on icl is notoriously slow, so rather than spend an
> > eternity checking the whole object, check for a completion event after
> > handling the pagefault. It's is the race
Chris Wilson writes:
> Beware the slithy t'oves.
>
> Forked GTT access on icl is notoriously slow, so rather than spend an
> eternity checking the whole object, check for a completion event after
> handling the pagefault. It's is the race of the pagefault vs reset that
> we care most about, and
This sample driver creates mdev device that simulate virtio net device
over virtio mdev transport. The device is implemented through vringh
and workqueue. A device specific dma ops is to make sure HVA is used
directly as the IOVA. This should be sufficient for kernel virtio
driver to work.
Only
This patch introduces a new mdev transport for virtio. This is used to
use kernel virtio driver to drive the mediated device that is capable
of populating virtqueue directly.
A new virtio-mdev driver will be registered to the mdev bus, when a
new virtio-mdev device is probed, it will register the
Beware the slithy t'oves.
Forked GTT access on icl is notoriously slow, so rather than spend an
eternity checking the whole object, check for a completion event after
handling the pagefault. It's is the race of the pagefault vs reset that
we care most about, and we expect the bug to result in the
Chris Wilson writes:
> Beware the slithy t'oves.
>
> Forked GTT access on icl is notoriously slow, so rather than spend an
> eternity checking the whole object, check for a completion event after
> handling the pagefault. It's is the race of the pagefault vs reset that
> we care most about, and
== Series Details ==
Series: i915/gem_map_gtt: Escape from slow forked GTT access
URL : https://patchwork.freedesktop.org/series/67161/
State : success
== Summary ==
CI Bug Log - changes from IGT_5201 -> IGTPW_3495
Summary
---
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
v2: Move unlikely() to drm_debug_enabled()
Cc: Rob Clark
Cc: Sean Paul
Cc: linux-arm-...@vger.kernel.org
Cc: freedr...@lists.freedesktop.org
Reviewed-by: Rob Clark
Signed-off-by: Jani Nikula
---
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 2 +-
Hi all, v2 of [1], a little refactoring around drm_debug access to
abstract it better. There shouldn't be any functional changes.
I'd appreciate acks for merging the lot via drm-misc. If there are any
objections to that, we'll need to postpone the last patch until
everything has been merged and
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
Cc: Lucas Stach
Cc: Russell King
Cc: Christian Gmeiner
Cc: etna...@lists.freedesktop.org
Acked-by: Lucas Stach
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 8
Move drm_debug variable declaration and definition to where they are
relevant and needed. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_drv.c | 17 -
drivers/gpu/drm/drm_print.c | 19 +++
include/drm/drm_drv.h | 2 --
Add helper to check if a drm debug category is enabled. Convert drm core
to use it. No functional changes.
v2: Move unlikely() to drm_debug_enabled() (Eric)
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_atomic_uapi.c | 2 +-
drivers/gpu/drm/drm_dp_mst_topology.c | 6 +++---
Allow better abstraction of the drm_debug global variable in the
future. No functional changes.
Cc: Francisco Jerez
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i2c/sil164_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i2c/sil164_drv.c
Hi all:
There are hardware that can do virtio datapath offloading while having
its own control path. This path tries to implement a mdev based
unified API to support using kernel virtio driver to drive those
devices. This is done by introducing a new mdev transport for virtio
(virtio_mdev) and
Mdev bus only supports vfio driver right now, so it doesn't implement
match method. But in the future, we may add drivers other than vfio,
the first driver could be virtio-mdev. This means we need to add
device class id support in bus match method to pair the mdev device
and mdev driver correctly.
This patch adds bus uevent support for mdev bus in order to allow
cooperation with userspace.
Signed-off-by: Jason Wang
---
drivers/vfio/mdev/mdev_driver.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/vfio/mdev/mdev_driver.c b/drivers/vfio/mdev/mdev_driver.c
index
We want to copy from iov to buf, so the direction was wrong.
Signed-off-by: Jason Wang
---
drivers/vhost/vringh.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/vhost/vringh.c b/drivers/vhost/vringh.c
index 08ad0d1f0476..a0a2d74967ef 100644
---
On 2019/9/24 上午4:58, Parav Pandit wrote:
> Hi Jason,
>
>> -Original Message-
>> From: Jason Wang
>> Sent: Monday, September 23, 2019 8:03 AM
>> To: k...@vger.kernel.org; linux-s...@vger.kernel.org; linux-
>> ker...@vger.kernel.org; dri-de...@lists.freedesktop.org; intel-
>>
On 2019/9/24 上午6:28, Parav Pandit wrote:
>
>> -Original Message-
>> From: Jason Wang
>> Sent: Monday, September 23, 2019 8:03 AM
>> To: k...@vger.kernel.org; linux-s...@vger.kernel.org; linux-
>> ker...@vger.kernel.org; dri-de...@lists.freedesktop.org; intel-
>>
This patch implements basic support for mdev driver that supports
virtio transport for kernel virtio driver.
Signed-off-by: Jason Wang
---
include/linux/mdev.h| 2 +
include/linux/virtio_mdev.h | 145
2 files changed, 147 insertions(+)
create mode
Currently, except for the create and remove, the rest of
mdev_parent_ops is designed for vfio-mdev driver only and may not help
for kernel mdev driver. With the help of class id, this patch
introduces device specific callbacks inside mdev_device
structure. This allows different set of callback to
Add support to parse mdev class id table.
Signed-off-by: Jason Wang
---
drivers/vfio/mdev/vfio_mdev.c | 2 ++
scripts/mod/devicetable-offsets.c | 3 +++
scripts/mod/file2alias.c | 10 ++
3 files changed, 15 insertions(+)
diff --git a/drivers/vfio/mdev/vfio_mdev.c
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-09-24 11:21:38)
>> Did you check how this would play out with just REG being wide enough?
> Function old new delta
> gen9_xcs_offsets 122 145 +23
> gen12_xcs_offsets
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Verify the LRC register
layout between init and HW (rev3)
URL : https://patchwork.freedesktop.org/series/67135/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6948 -> Patchwork_14514
Quoting Patchwork (2019-09-24 14:48:50)
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915/selftests: Verify the LRC
> register layout between init and HW (rev3)
> URL : https://patchwork.freedesktop.org/series/67135/
> State : success
>
> == Summary ==
>
> CI Bug Log -
== Series Details ==
Series: drm/i915: Add Pipe D cursor ctrl register for Gen12 (rev2)
URL : https://patchwork.freedesktop.org/series/67144/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6945_full -> Patchwork_14513_full
On Mon, Sep 23, 2019 at 12:55:11PM -0700, José Roberto de Souza wrote:
> Link training is failling when running link at 2.7GHz and 1.62GHz and
> following BSpec pll algorithm.
>
> Comparing the values calculated and the ones from the reference table
> it looks like
On 2019-09-24 at 12:54:54 +0300, Petri Latvala wrote:
> On Mon, Sep 23, 2019 at 02:23:25PM -0400, Bhawanpreet Lakha wrote:
> > Rename "i915_hdcp_sink_capability" to "hdcp_sink_capability"
> >
> > The content protection tests only start if this debugfs entry exists.
> > Since the name is specific
== Series Details ==
Series: Revert "drm/i915/color: Extract icl_read_luts()"
URL : https://patchwork.freedesktop.org/series/67174/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6948 -> Patchwork_14517
Summary
---
== Series Details ==
Series: series starting with [v2] drm/i915/selftests: Verify the LRC register
layout between init and HW (rev5)
URL : https://patchwork.freedesktop.org/series/67135/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
48cb8fb0a186 drm/i915/selftests: Verify the
On 02/09/2019 05:03, Chris Wilson wrote:
wait_for_timelines is essentially the same loop as retiring requests
(with an extra), so merge the two into one routine.
Extra suspense! :)
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 +-
Op 22-09-2019 om 19:08 schreef Manasi Navare:
> After the state is committed, we readout the HW registers and compare
> the HW state with the SW state that we just committed.
> For Transcdoer port sync, we add master_transcoder and the
> salves bitmask to the crtc_state, hence we need to read
== Series Details ==
Series: series starting with [v2] drm/i915/selftests: Verify the LRC register
layout between init and HW (rev5)
URL : https://patchwork.freedesktop.org/series/67135/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6948 -> Patchwork_14518
On Tue, Sep 24, 2019 at 12:30 AM Nautiyal, Ankit K
wrote:
>
> From: Ankit Nautiyal
>
> Currently the offset for PIPE D cursor control register is missing in
> i915_reg.h due to which the cursor plane cannot be enabled for Pipe D.
> This also causes kernel Warning, when a user requests to enable
If we disable rps, it appears the Tigerlake is stable enough to run
multiple engines simultaneously in CI. As disabling rps should only
cause the execution being slow, whereas many features depend on the
different engines, we would prefer to have the engines enabled while the
hangs are being
On Tue, Sep 24, 2019 at 9:00 AM Jani Nikula wrote:
>
> Allow better abstraction of the drm_debug global variable in the
> future. No functional changes.
>
> Cc: Alex Deucher
> Cc: Christian König
> Cc: David (ChunMing) Zhou
> Cc: amd-...@lists.freedesktop.org
> Signed-off-by: Jani Nikula
On Tue, Sep 24, 2019 at 9:00 AM Jani Nikula wrote:
>
> drm_debug_enabled() is the way to check. __drm_debug is now reserved for
> drm print code only. No functional changes.
>
> v2: Rebase on move unlikely() to drm_debug_enabled()
>
> Signed-off-by: Jani Nikula
Acked-by: Alex Deucher
> ---
>
On Tue, Sep 24, 2019 at 05:38:00PM +0200, Maarten Lankhorst wrote:
> Op 22-09-2019 om 19:08 schreef Manasi Navare:
> > After the state is committed, we readout the HW registers and compare
> > the HW state with the SW state that we just committed.
> > For Transcdoer port sync, we add
On Tue, Sep 24, 2019 at 01:01:52PM +0530, Nautiyal, Ankit K wrote:
> From: Ankit Nautiyal
Just a nit: Can you modify the subject to be "drm/i915/tgl" to make it
easier for backporters to identify?
>
> Currently the offset for PIPE D cursor control register is missing in
> i915_reg.h due to
On Tue, Sep 24, 2019 at 8:59 AM Jani Nikula wrote:
>
> Move drm_debug variable declaration and definition to where they are
> relevant and needed. No functional changes.
>
> Signed-off-by: Jani Nikula
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/drm_drv.c | 17 -
>
On Tue, Sep 24, 2019 at 8:59 AM Jani Nikula wrote:
>
> Add helper to check if a drm debug category is enabled. Convert drm core
> to use it. No functional changes.
>
> v2: Move unlikely() to drm_debug_enabled() (Eric)
>
> Signed-off-by: Jani Nikula
Acked-by: Alex Deucher
> ---
>
== Series Details ==
Series: mdev based hardware virtio offloading support (rev2)
URL : https://patchwork.freedesktop.org/series/66989/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6944_full -> Patchwork_14501_full
On 2019-09-23 at 19:26:56 +0300, Imre Deak wrote:
> On Fri, Sep 13, 2019 at 01:53:36PM +0530, Anshuman Gupta wrote:
> > DC3CO enabling B.Specs sequence requires to enable end configure
> > exit scanlines to TRANS_EXITLINE register, programming this register
> > has to be part of modeset sequence
From: Ankit Nautiyal
Currently the offset for PIPE D cursor control register is missing in
i915_reg.h due to which the cursor plane cannot be enabled for Pipe D.
This also causes kernel Warning, when a user requests to enable cursor
plane for PIPE D for Gen 12 platforms.
This patch adds the
== Series Details ==
Series: drm/i915: Add Pipe D cursor ctrl register for Gen12
URL : https://patchwork.freedesktop.org/series/67144/
State : failure
== Summary ==
Applying: drm/i915: Add Pipe D cursor ctrl register for Gen12
Using index info to reconstruct a base tree...
M
If we disable rps, it appears the Tigerlake is stable enough to run
multiple engines simultaneously in CI. As disabling rps should only
cause the execution being slow, whereas many features depend on the
different engines, we would prefer to have the engines enabled while the
hangs are being
From: Srinivasan S
This patch avoids DP MST payload error message in dmesg, as it is trying
to update the payload to the disconnected DP MST device. After DP MST
device is disconnected we should not be updating the payload and
hence remove the error.
v2: Removed the connector status check and
On Fri, Sep 20, 2019 at 01:42:16PM +0200, Maarten Lankhorst wrote:
> We are still looking at drm_crtc_state in a few places, convert those
> to use intel_crtc_state instead. Look at uapi/hw where appropriate.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
> ---
>
On Tue, 2019-09-24 at 18:58 +0300, Imre Deak wrote:
> On Mon, Sep 23, 2019 at 12:55:11PM -0700, José Roberto de Souza
> wrote:
> > Link training is failling when running link at 2.7GHz and 1.62GHz
> > and
> > following BSpec pll algorithm.
> >
> > Comparing the values calculated and the ones from
After the state is committed, we readout the HW registers and compare
the HW state with the SW state that we just committed.
For Transcdoer port sync, we add master_transcoder and the
salves bitmask to the crtc_state, hence we need to read those during
the HW state readout to avoid pipe state
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/tgl: Add initial dkl pll support
URL : https://patchwork.freedesktop.org/series/67181/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6952 -> Patchwork_14521
== Series Details ==
Series: drm/i915/tgl: Add memory type decoding for bandwidth checking
URL : https://patchwork.freedesktop.org/series/67186/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6952 -> Patchwork_14522
Summary
Jani Nikula writes:
> Allow better abstraction of the drm_debug global variable in the
> future. No functional changes.
>
> Cc: Francisco Jerez
> Signed-off-by: Jani Nikula
Reviewed-by: Francisco Jerez
> ---
> drivers/gpu/drm/i2c/sil164_drv.c | 2 +-
> 1 file changed, 1 insertion(+), 1
On Fri, Sep 20, 2019 at 01:42:18PM +0200, Maarten Lankhorst wrote:
> We had this as an optimization to not do a plane update, but we killed
> it off because there are so many reasons we may have to do a plane
> update or fastset that it's best to just assume everything changed.
>
> Signed-off-by:
Quoting Patchwork (2019-09-24 20:33:04)
> Possible fixes
>
> * igt@gem_tiled_fence_blits@basic:
> - {fi-tgl-u2}:[SKIP][9] ([fdo#111714]) -> [PASS][10] +2 similar
> issues
>[9]:
>
Hi Manasi,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to v5.3 next-20190920]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to
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