The bits in DDI_BUF_CTL related to DP vswing emphasis were removed on
GLK since the relevant programming has moved to the PHY registers. The
bits still exist on BXT, but have a programming note indicating that
they're ignored. Let's stop programming them on gen9lp and and gen10+.
Bspec: 7534
== Series Details ==
Series: dumb buffer patches
URL : https://patchwork.freedesktop.org/series/71493/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7654_full -> Patchwork_15945_full
Summary
---
**SUCCESS**
No
We leave the kernel_context on the HW as we suspend (and while idle).
There is no guarantee that is complete in memory, so we try to inhibit
restoration from the kernel_context. Reinforce the inhibition by
scrubbing the context.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
When creating the initial LRC image, we also want to clear the MI_NOOPs
and register values. Rather than use a blanket memset beforehand, apply
the clears inline, close the context image and force inhibition of the
uninitialised reminder.
Signed-off-by: Chris Wilson
---
Empirically the minimal context image we use for rcs is insufficient to
state the engine. This is demonstrated if we poison the context image
such that any uninitialised state is invalid, and so if the engine
samples beyond our defined region, will fail to start.
Signed-off-by: Chris Wilson
---
Before we idle, on parking, we switch to the kernel context such that we
have a scratch context loaded while the GPU idle, protecting any
precious user state. Be paranoid and assume that the idle state may have
been trashed, and reset the kernel_context image after idling.
Signed-off-by: Chris
Keep scrubbing the kernel_context image with poison before we reset it
in order to demonstrate that we will be resilient in the case where it
is accidentally overwritten on idle.
Suggested-by: Imre Deak
Signed-off-by: Chris Wilson
Cc: Imre Deak
Reviewed-by: Mika Kuoppala
---
== Series Details ==
Series: drm/i915/selftests: Flush the context worker
URL : https://patchwork.freedesktop.org/series/71495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7655_full -> Patchwork_15946_full
Summary
== Series Details ==
Series: drm/i915: Stop programming DDI_BUF_TRANS_SELECT on recent platforms
URL : https://patchwork.freedesktop.org/series/71503/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7657 -> Patchwork_15950
== Series Details ==
Series: series starting with [1/5] drm/i915/gt: Include a bunch more rcs image
state
URL : https://patchwork.freedesktop.org/series/71506/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3900059d08ce drm/i915/gt: Include a bunch more rcs image state
-:22:
== Series Details ==
Series: series starting with [1/5] drm/i915/gt: Include a bunch more rcs image
state
URL : https://patchwork.freedesktop.org/series/71506/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7657 -> Patchwork_15951
== Series Details ==
Series: DP Phy compliance auto test (rev5)
URL : https://patchwork.freedesktop.org/series/71121/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7656_full -> Patchwork_15948_full
Summary
---
Quoting Imre Deak (2019-12-27 23:51:46)
> Currently the start address of a UV plane in a semiplanar YUV FB is tile
> size (4kB) aligned. I noticed, that enforcing only this alignment leads
> oddly to random memory corruptions on TGL while scanning out Y-tiled
> FBs. This issue can be easily
Quoting Imre Deak (2019-12-27 23:51:45)
> At least one framebuffer plane on TGL - the UV plane of YUV semiplanar
> FBs - requires a non-power-of-2 alignment, so add support for this. This
> new alignment restriction applies only to an offset within an FB, so the
> GEM buffer itself containing the
== Series Details ==
Series: series starting with [1/7] drm/i915/gt: Ensure that all new contexts
clear STOP_RING (rev3)
URL : https://patchwork.freedesktop.org/series/71479/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7653 -> Patchwork_15943
On successful allocation, instead returning the requested size
return the total size of allocated pages.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/i915_gem.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c
Lookup function to retrieve the pointer to a memory region of
a mem_type.
v2:
for_each_memory_region is used.
Signed-off-by: Ramalingam C
cc: Matthew Auld
Reviewed-by: Matthew Auld [v1]
---
drivers/gpu/drm/i915/intel_memory_region.c | 13 +
When LMEM is supported, dumb buffer preferred to be created from LMEM.
v2:
Parameters are reshuffled. [Chris]
v3:
s/region_id/mem_type
v4:
use the i915_gem_object_create_region [chris]
Signed-off-by: Ramalingam C
cc: Matthew Auld
Reviewed-by: Matthew Auld
---
Patches for getting the dumb buffer from LMEM.
Ramalingam C (3):
drm/i915: lookup for mem_region of a mem_type
drm/i915: Create dumb buffer from LMEM
drm/i915/dumb: return the allocated memory size
drivers/gpu/drm/i915/i915_gem.c| 27 ++
On 2019-11-14 at 04:47:35 +0530, Souza, Jose wrote:
> On Wed, 2019-11-13 at 18:04 +0530, Anshuamn Gupta wrote:
> > Looks good to me, there is a minor comment see below.
> > On 2019-10-31 at 17:14:20 -0700, José Roberto de Souza wrote:
> > > Both activate functions and the dc3co disable function
On 2019-11-19 at 00:12:35 +0530, Souza, Jose wrote:
> On Sun, 2019-11-17 at 18:23 +0530, Anshuamn Gupta wrote:
> > On 2019-10-31 at 17:14:22 -0700, José Roberto de Souza wrote:
> > > A recent change in BSpec allow us to change EXTLINE while
> > > transcoder
> > > is enabled so this allow us to
On Sat, 21 Dec 2019 at 14:49, Chris Wilson wrote:
>
> In the selftests, we may feed very long lists of blocks to be freed on
> culmination of the tests. This coupled with kasan and other
> malloc-tracing can make the kmem_cache_free() operation time consuming,
> and doing many of time trigger
On Mon, Dec 16, 2019 at 9:51 PM Hans de Goede wrote:
> Currently only the drivers/pinctrl/devicetree.c code allows registering
> pinctrl-mappings which may later be unregistered, all other mappings
> are assumed to be permanent.
>
> Non-dt platforms may also want to register pinctrl mappings
== Series Details ==
Series: series starting with [1/7] drm/i915/gt: Ensure that all new contexts
clear STOP_RING (rev4)
URL : https://patchwork.freedesktop.org/series/71479/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7654 -> Patchwork_15944
On Sun, 29 Dec 2019 at 18:32, Chris Wilson wrote:
>
> Only restore valid resource streamer state from the context image, i.e.
> avoid restoring if we know the image is invalid.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/446
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
Hi Blaž,
On Fri, 27 Dec 2019, Blaž Hrastnik wrote:
> Hi! I'm using a Surface Laptop 3 (Intel version, i7-1065G7) which is
> running the i915 driver. I have a screen flicker issue in 5.5rc that I
[...]
> It works on commit "x86/intel: Disable HPET on Intel Ice Lake
> platforms". But it doesn't
On Sun, 29 Dec 2019 at 18:32, Chris Wilson wrote:
>
> Set up the RING_MI_NODE in new contexts to clear the STOP_RING bit, just
> in case they find it still set after a reset (as they are the first
> contexts to be run).
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
On Sun, 29 Dec 2019 at 18:32, Chris Wilson wrote:
>
> Assume that the HW starts off with tag 0 "active" and so avoid using tag
> 0 for our own first ELSP submission.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
When cleaning up the mock device, remember to flush the context worker
to free the residual GEM contexts before shutting down the device.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/802
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem.c
On Sun, 29 Dec 2019 at 18:32, Chris Wilson wrote:
>
> Mark the GT as wedged so that we are not tempted to use it prior to
> initialisation.
>
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
== Series Details ==
Series: dumb buffer patches
URL : https://patchwork.freedesktop.org/series/71493/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7654 -> Patchwork_15945
Summary
---
**SUCCESS**
No regressions
== Series Details ==
Series: drm/i915/selftests: Flush the context worker
URL : https://patchwork.freedesktop.org/series/71495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7655 -> Patchwork_15946
Summary
---
On 24-12-2019 01:23, Harry Wentland wrote:
On 2019-12-23 12:03 p.m., Animesh Manna wrote:
During phy compliance auto test mode source need to read
requested test pattern from sink through DPCD. After processing
the request source need to set the pattern. So set/get method
added in drm layer as
Chris Wilson writes:
> When cleaning up the mock device, remember to flush the context worker
> to free the residual GEM contexts before shutting down the device.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/802
> Signed-off-by: Chris Wilson
> Cc: Matthew Auld
Reviewed-by: Mika
Quoting Mika Kuoppala (2019-12-30 16:00:22)
> Chris Wilson writes:
>
> > When cleaning up the mock device, remember to flush the context worker
> > to free the residual GEM contexts before shutting down the device.
> >
> > Closes: https://gitlab.freedesktop.org/drm/intel/issues/802
> >
Chris Wilson writes:
> Do not reset RING_BB_STATE, leaving it to the default state value. This
> prevents bdw/bsw from getting confused when executing batches from the
> GGTT.
Happily setting up ro registers through ctx image, stamped my me...
Reviewed-by: Mika Kuoppala
>
> Signed-off-by:
On Sun, 29 Dec 2019 at 18:32, Chris Wilson wrote:
>
> Keep scrubbing the kernel_context image with poison before we reset it
> in order to demonstrate that we will be resilient in the case where it
> is accidentally overwritten on idle.
>
> Suggested-by: Imre Deak
> Signed-off-by: Chris Wilson
Chris Wilson writes:
> Before we idle, on parking, we switch to the kernel context such that we
> have a scratch context loaded while the GPU idle, protecting any
> precious user state. Be paranoid and assume that the idle state may have
> been trashed, and reset the kernel_context image after
On 30-12-2019 21:41, Harry Wentland wrote:
On 2019-12-30 11:05 a.m., Manna, Animesh wrote:
On 24-12-2019 01:23, Harry Wentland wrote:
On 2019-12-23 12:03 p.m., Animesh Manna wrote:
During phy compliance auto test mode source need to read
requested test pattern from sink through DPCD. After
Do not reset RING_BB_STATE, leaving it to the default state value. This
prevents bdw/bsw from getting confused when executing batches from the
GGTT.
Signed-off-by: Chris Wilson
Acked-by: Matthew Auld
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 1 -
1 file changed, 1
== Series Details ==
Series: DP Phy compliance auto test (rev5)
URL : https://patchwork.freedesktop.org/series/71121/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8a55c99e987a drm/amd/display: Align macro name as per DP spec
b46d414a1888 drm/dp: get/set phy compliance pattern
When cleaning up the mock device, remember to flush the context worker
to free the residual GEM contexts before shutting down the device.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/802
Signed-off-by: Chris Wilson
Cc: Matthew Auld
Reviewed-by: Mika Kuoppala
---
== Series Details ==
Series: DP Phy compliance auto test (rev5)
URL : https://patchwork.freedesktop.org/series/71121/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7656 -> Patchwork_15948
Summary
---
**SUCCESS**
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/selftests: Flush the context
worker
URL : https://patchwork.freedesktop.org/series/71500/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7656 -> Patchwork_15949
Hey Matt,
On Tue, 24 Dec 2019, Matt Roper wrote:
> > When audio power domain is suspended, the display driver must
> > save state of AUD_FREQ_CNTRL on Tiger Lake and Ice Lake
> > systems. The initial value of the register is set by BIOS and
>
> I realize this patch landed several months ago, but
Quoting Chris Wilson (2019-12-30 16:01:10)
> We leave the kernel_context on the HW as we suspend (and while idle).
> There is no guarantee that is complete in memory, so we try to inhibit
> restoration from the kernel_context. Reinforce the inhibition by
> scrubbing the context.
>
>
DP_COMP_CTL and DP_COMP_PAT register used to program DP
compliance pattern.
Reviewed-by: Manasi Navare
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/i915_reg.h | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h
Send uevent to testapp and set test_active flag. To align with link
compliance design existing intel_dp_compliance tool will be used to
get the phy request in userspace through uevent.
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_dp.c | 10 --
1 file changed, 8
Driver changes mainly to process the request coming from Test equipment
as short pulse hpd interrupt to change link-pattern/v-swing/pre-emphasis
Complete auto test suite takes much lesser time than manual run.
Overall design:
--
Automate test request will come to source device as HDP
Chris Wilson writes:
> Keep scrubbing the kernel_context image with poison before we reset it
> in order to demonstrate that we will be resilient in the case where it
> is accidentally overwritten on idle.
>
> Suggested-by: Imre Deak
> Signed-off-by: Chris Wilson
> Cc: Imre Deak
> ---
>
Quoting Mika Kuoppala (2019-12-30 16:30:21)
> Chris Wilson writes:
>
> > Before we idle, on parking, we switch to the kernel context such that we
> > have a scratch context loaded while the GPU idle, protecting any
> > precious user state. Be paranoid and assume that the idle state may have
> >
== Series Details ==
Series: series starting with [1/6] drm/i915/selftests: Flush the context worker
URL : https://patchwork.freedesktop.org/series/71497/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7656 -> Patchwork_15947
Chris Wilson writes:
> When cleaning up the mock device, remember to flush the context worker
> to free the residual GEM contexts before shutting down the device.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/802
> Signed-off-by: Chris Wilson
> Cc: Matthew Auld
> ---
>
When creating the initial LRC image, we also want to clear the MI_NOOPs
and register values. Rather than use a blanket memset beforehand, apply
the clears inline, close the context image and force inhibition of the
uninitialised reminder.
Signed-off-by: Chris Wilson
---
Do not reset RING_BB_STATE, leaving it to the default state value. This
prevents bdw/bsw from getting confused when executing batches from the
GGTT.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 1 -
1 file changed, 1 deletion(-)
diff --git
When cleaning up the mock device, remember to flush the context worker
to free the residual GEM contexts before shutting down the device.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/802
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem.c
Keep scrubbing the kernel_context image with poison before we reset it
in order to demonstrate that we will be resilient in the case where it
is accidentally overwritten on idle.
Suggested-by: Imre Deak
Signed-off-by: Chris Wilson
Cc: Imre Deak
---
Before we idle, on parking, we switch to the kernel context such that we
have a scratch context loaded while the GPU idle, protecting any
precious user state. Be paranoid and assume that the idle state may have
been trashed, and reset the kernel_context image after idling.
Signed-off-by: Chris
We leave the kernel_context on the HW as we suspend (and while idle).
There is no guarantee that is complete in memory, so we try to inhibit
restoration from the kernel_context. Reinforce the inhibition by
scrubbing the context.
Signed-off-by: Chris Wilson
---
On Sun, 29 Dec 2019 at 18:32, Chris Wilson wrote:
>
> We leave the kernel_context on the HW as we suspend (and while idle).
> There is no guarantee that is complete in memory, so we try to inhibit
> restoration from the kernel_context. Reinforce the inhibition by
> scrubbing the context.
>
>
Quoting Chris Wilson (2019-12-30 16:01:09)
> Do not reset RING_BB_STATE, leaving it to the default state value. This
> prevents bdw/bsw from getting confused when executing batches from the
> GGTT.
>
> Signed-off-by: Chris Wilson
Acked-by: Matthew Auld
-Chris
Quoting Matthew Auld (2019-12-30 16:06:47)
> On Sun, 29 Dec 2019 at 18:32, Chris Wilson wrote:
> > static const struct intel_context_ops execlists_context_ops = {
> > @@ -3968,7 +3982,6 @@ static void init_common_reg_state(u32 * const regs,
> >
On Sun, 29 Dec 2019 at 18:32, Chris Wilson wrote:
>
> Before we idle, on parking, we switch to the kernel context such that we
> have a scratch context loaded while the GPU idle, protecting any
> precious user state. Be paranoid and assume that the idle state may have
> been trashed, and reset
Quoting Mika Kuoppala (2019-12-30 16:23:20)
> Chris Wilson writes:
>
> > Keep scrubbing the kernel_context image with poison before we reset it
> > in order to demonstrate that we will be resilient in the case where it
> > is accidentally overwritten on idle.
> >
> > Suggested-by: Imre Deak
> >
These debugfs entry will help testapp to understand the test request
during dp phy compliance mode.
Acked-by: Manasi Navare
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git
During DP phy compliance auto test mode, sink will request
combination of different test pattern with differnt level of
vswing, pre-emphasis. Function added to prepare for it.
Reviewed-by: Manasi Navare
Signed-off-by: Animesh Manna
---
.../drm/i915/display/intel_display_types.h| 1 +
During phy compliance auto test mode source need to read
requested test pattern from sink through DPCD. After processing
the request source need to set the pattern. So set/get method
added in drm layer as it is DP protocol.
v2: As per review feedback from Manasi on RFC version,
- added dp
vswing/pre-emphasis adjustment calculation is needed in processing
of auto phy compliance request other than link training, so moved
the same function in intel_dp.c.
No functional change.
v1: initial patch.
v2:
- used "intel_dp" prefix in function name. (Jani)
- used array notation instead
[Why]:
Aligh with DP spec wanted to follow same naming convention.
[How]:
Changed the macro name of the dpcd address used for getting requested
test-pattern.
Cc: Harry Wentland
Cc: Alex Deucher
Reviewed-by: Harry Wentland
Signed-off-by: Animesh Manna
---
As per request from DP phy compliance test few special
test pattern need to set by source. Added function
to set pattern in DP_COMP_CTL register. It will be
called along with other test parameters like vswing,
pre-emphasis programming in atomic_commit_tail path.
Signed-off-by: Animesh Manna
---
This patch process phy compliance request by programming requested
vswing, pre-emphasis and test pattern.
Note: FIXME tag added as design discusion is ongoing in previous patch
series. Some temporary fix added and the patch is under-development, not for
review.
Signed-off-by: Animesh Manna
---
Quoting Chris Wilson (2019-12-30 16:01:11)
> Before we idle, on parking, we switch to the kernel context such that we
> have a scratch context loaded while the GPU idle, protecting any
> precious user state. Be paranoid and assume that the idle state may have
> been trashed, and reset the
Quoting Patchwork (2019-12-30 16:53:38)
> == Series Details ==
>
> Series: series starting with [1/6] drm/i915/selftests: Flush the context
> worker
> URL : https://patchwork.freedesktop.org/series/71497/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7656 ->
On Mon, Dec 30, 2019 at 10:48:31AM +, Chris Wilson wrote:
> Quoting Imre Deak (2019-12-27 23:51:45)
> > At least one framebuffer plane on TGL - the UV plane of YUV semiplanar
> > FBs - requires a non-power-of-2 alignment, so add support for this. This
> > new alignment restriction applies only
On Mon, Dec 30, 2019 at 10:53:21AM +, Chris Wilson wrote:
> Quoting Imre Deak (2019-12-27 23:51:46)
> > Currently the start address of a UV plane in a semiplanar YUV FB is tile
> > size (4kB) aligned. I noticed, that enforcing only this alignment leads
> > oddly to random memory corruptions on
Quoting Imre Deak (2019-12-30 19:20:36)
> On Mon, Dec 30, 2019 at 10:53:21AM +, Chris Wilson wrote:
> > Quoting Imre Deak (2019-12-27 23:51:46)
> > > Currently the start address of a UV plane in a semiplanar YUV FB is tile
> > > size (4kB) aligned. I noticed, that enforcing only this alignment
== Series Details ==
Series: series starting with [1/7] drm/i915/gt: Ensure that all new contexts
clear STOP_RING (rev4)
URL : https://patchwork.freedesktop.org/series/71479/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7654_full -> Patchwork_15944_full
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