[Intel-gfx] [PATCH 3/4] drm/i915/vga: switch to use VGA definitions from video/vga.h

The video/vga.h has macros for the VGA registers. Switch to use them. Suggested-by: Matt Roper Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_vga.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c

[Intel-gfx] [PATCH 2/4] drm/i915: split out vlv sideband registers from i915_reg.h

Add a dedicated file vlv_sideband_reg.h for the VLV/CHV sideband registers. The sideband registers macros are needed by the same files that need vlv_sideband.h, so include the definitions from there. v2: Fix copyright year (Matt) Cc: Matt Roper Reviewed-by: Matt Roper Signed-off-by: Jani

[Intel-gfx] [PATCH 4/4] drm/i915: remove VGA register definitions

The only user of the VGA registers has switched to using the definitions in linux/vga.h, so these have become redundant. Remove them. Suggested-by: Matt Roper Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_reg.h | 41 - 1 file changed, 41 deletions(-)

[Intel-gfx] [PATCH 1/4] drm/i915: split out PCI config space registers from i915_reg.h

The PCI config space registers don't really belong next to the MMIO register definitions. v2: Fix copyright year (Matt) Cc: Matt Roper Reviewed-by: Matt Roper Signed-off-by: Jani Nikula --- .../gpu/drm/i915/display/intel_backlight.c| 1 + drivers/gpu/drm/i915/display/intel_cdclk.c|

Re: [Intel-gfx] [PATCH 2/3] drm/i915: move VGA registers to intel_vga.c

On Fri, 07 Jan 2022, Matt Roper wrote: > On Fri, Jan 07, 2022 at 11:49:50AM +0200, Jani Nikula wrote: >> The only users of the VGA register macros are in intel_vga.c. Hide the >> macros there. >> >> Cc: Matt Roper >> Signed-off-by: Jani Nikula > > It looks like only 5 of the ~30 registers here

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Drop unused register definitions

On Fri, 07 Jan 2022, Lucas De Marchi wrote: > On Fri, Jan 07, 2022 at 12:46:48PM +0200, Jani Nikula wrote: >>I still tell people to 1) split out register definitions to separate >>patches, and 2) add macros for the entire feature and full contents for >>each register, even if they remain unused.

Re: [Intel-gfx] [PATCH v2 7/7] drm/i915: Move SNPS PHY registers to their own header

On Mon, 10 Jan 2022, Jani Nikula wrote: > On Fri, 07 Jan 2022, Matt Roper wrote: >> These registers are only needed in a couple files and on specific >> platforms; let's keep them separate from the general register pool. >> >> Cc: Jani Nikula >> Signed-off-by: Matt Roper >> --- >>

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: split out PCI config space registers from i915_reg.h

== Series Details == Series: series starting with [1/4] drm/i915: split out PCI config space registers from i915_reg.h URL : https://patchwork.freedesktop.org/series/98672/ State : success == Summary == CI Bug Log - changes from CI_DRM_11058 -> Patchwork_21947

Re: [Intel-gfx] [PATCH 1/3] drm/i915: split out PCI config space registers from i915_reg.h

On Fri, 07 Jan 2022, Matt Roper wrote: > On Fri, Jan 07, 2022 at 11:49:49AM +0200, Jani Nikula wrote: >> The PCI config space registers don't really belong next to the MMIO >> register definitions. >> >> Cc: Matt Roper >> Signed-off-by: Jani Nikula >> --- > ... >> diff --git

Re: [Intel-gfx] [PATCH v2 6/7] drm/i915/gt: Move engine registers to their own header

On Fri, 07 Jan 2022, Matt Roper wrote: > Let's start breaking up and cleaning up the massive i915_reg.h file. > We'll start by moving all registers that are defined in relation to an > engine base to their own header. > > There are probably a bunch of other "engine registers" that we haven't >

Re: [Intel-gfx] [PATCH v2 3/7] drm/i915: Parameterize ECOSKPD

On Fri, 07 Jan 2022, Matt Roper wrote: > Combine the separate render and blitter register definitions into a > single definition. We already know we have some workarounds on an > upcoming platform that will need to update the ECOSKPD register for > other engines too, so this helps pave the way

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: split out PCI config space registers from i915_reg.h

== Series Details == Series: series starting with [1/4] drm/i915: split out PCI config space registers from i915_reg.h URL : https://patchwork.freedesktop.org/series/98672/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6a1b0048ac62 drm/i915: split out PCI config space

Re: [Intel-gfx] [PATCH v2 7/7] drm/i915: Move SNPS PHY registers to their own header

On Fri, 07 Jan 2022, Matt Roper wrote: > These registers are only needed in a couple files and on specific > platforms; let's keep them separate from the general register pool. > > Cc: Jani Nikula > Signed-off-by: Matt Roper > --- > drivers/gpu/drm/i915/display/intel_snps_phy.c | 1 + >

Re: [Intel-gfx] [PATCH v2 2/7] drm/i915: Parameterize PWRCTX_MAXCNT

On Fri, 07 Jan 2022, Matt Roper wrote: > Rather than having separate definitions for each engine, create a single > parameterized macro that takes the engine base offset. This will also > ensure we get to the proper offset if we ever need to use these > registers on newer platforms (where the

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: split out PCI config space registers from i915_reg.h

== Series Details == Series: series starting with [1/4] drm/i915: split out PCI config space registers from i915_reg.h URL : https://patchwork.freedesktop.org/series/98672/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit

Re: [Intel-gfx] [RFC 7/7] drm/i915/guc: Print the GuC error capture output register list.

On 07/01/2022 17:03, Teres Alexis, Alan Previn wrote: On Fri, 2022-01-07 at 09:03 +, Tvrtko Ursulin wrote: On 06/01/2022 18:33, Teres Alexis, Alan Previn wrote: On Thu, 2022-01-06 at 09:38 +, Tvrtko Ursulin wrote: On 05/01/2022 17:30, Teres Alexis, Alan Previn wrote: On Tue,

Re: [Intel-gfx] [PATCH v2 1/7] drm/i915: Use parameterized GPR register definitions everywhere

On Fri, 07 Jan 2022, Matt Roper wrote: > Since we have an engine-parameterized macro GEN8_RING_CS_GPR, let's use > that in place of the HSW_CS_GPR and BCS_GPR register definitions. > > Cc: Jani Nikula > Signed-off-by: Matt Roper Reviewed-by: Jani Nikula > --- >

[Intel-gfx] [PATCH v4 7/7] drm/i915: Remove short-term pins from execbuf, v6.

Add a flag PIN_VALIDATE, to indicate we don't need to pin and only protected by the object lock. This removes the need to unpin, which is done by just releasing the lock. eb_reserve is slightly reworked for readability, but the same steps are still done: - First pass pins with NONBLOCK. - Second

[Intel-gfx] [PATCH v4 6/7] drm/i915: Remove support for unlocked i915_vma unbind

Now that we require the object lock for all ops, some code handling race conditions can be removed. This is required to not take short-term pins inside execbuf. Signed-off-by: Maarten Lankhorst Acked-by: Niranjana Vishwanathapura --- drivers/gpu/drm/i915/i915_vma.c | 55

[Intel-gfx] [PATCH v4 5/7] drm/i915: Remove assert_object_held_shared

This duck tape workaround is no longer required, unbind and destroy are fixed to take the obj->resv mutex before destroying and obj->mm.lock has been removed, always requiring obj->resv as well. Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld ---

Re: [Intel-gfx] [PATCH v6 4/6] drm/i915: Use vma resources for async unbinding

On 07/01/2022 14:23, Thomas Hellström wrote: Implement async (non-blocking) unbinding by not syncing the vma before calling unbind on the vma_resource. Add the resulting unbind fence to the object's dma_resv from where it is picked up by the ttm migration code. Ideally these unbind fences should

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: remove questionable fence optimization during copy

== Series Details == Series: drm/i915: remove questionable fence optimization during copy URL : https://patchwork.freedesktop.org/series/98679/ State : failure == Summary == Applying: drm/i915: remove questionable fence optimization during copy Using index info to reconstruct a base tree... M

Re: [Intel-gfx] [PATCH v2 5/7] drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7

On Fri, 07 Jan 2022, Matt Roper wrote: > It's preferable to use parameterized register macros where possible. > > Signed-off-by: Matt Roper Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- > drivers/gpu/drm/i915/gvt/mmio_context.c | 4 ++-- >

[Intel-gfx] [PATCH v4 1/7] drm/i915: Call i915_gem_evict_vm in vm_fault_gtt to prevent new ENOSPC errors, v2.

Now that we cannot unbind kill the currently locked object directly because we're removing short term pinning, we may have to unbind the object from gtt manually, using a i915_gem_evict_vm() call. Changes since v1: - Remove -ENOSPC warning, can still happen with concurrent mmaps where we can't

[Intel-gfx] [PATCH v4 3/7] drm/i915: Add object locking to i915_gem_evict_for_node and i915_gem_evict_something

Because we will start to require the obj->resv lock for unbinding, ensure these shrinker functions also take the lock. This requires some function signature changes, to ensure that the ww context is passed around, but is mostly straightforward. Previously this was split up into several patches,

[Intel-gfx] [PATCH v4 4/7] drm/i915: Add i915_vma_unbind_unlocked, and take obj lock for i915_vma_unbind, v2.

We want to remove more members of i915_vma, which requires the locking to be held more often. Start requiring gem object lock for i915_vma_unbind, as it's one of the callers that may unpin pages. Some special care is needed when evicting, because the last reference to the object may be held by

[Intel-gfx] [PATCH v4 2/7] drm/i915: Add locking to i915_gem_evict_vm()

i915_gem_evict_vm will need to be able to evict objects that are locked by the current ctx. By testing if the current context already locked the object, we can do this correctly. This allows us to evict the entire vm even if we already hold some objects' locks. Previously, this was spread over

[Intel-gfx] [PATCH v4 0/7] drm/i915: Remove short term pins from execbuf by requiring lock to unbind.

Previously, short term pinning in execbuf was required because i915_vma was effectively independent from objects, and has its own refcount, locking, lifetime rules and pinning. This series removes the separate locking, by requiring vma->obj->resv to be held when pinning and unbinding. This will

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove short term pins from execbuf by requiring lock to unbind. (rev2)

== Series Details == Series: drm/i915: Remove short term pins from execbuf by requiring lock to unbind. (rev2) URL : https://patchwork.freedesktop.org/series/98137/ State : success == Summary == CI Bug Log - changes from CI_DRM_11059 -> Patchwork_21948

[Intel-gfx] [PATCH v2 2/6] drm/plane: Fix typo in format_mod_supported documentation

Fix minor typo: "valdiate" -> "validate". Signed-off-by: José Expósito --- include/drm/drm_plane.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index 0c1102dc4d88..06759badf99f 100644 --- a/include/drm/drm_plane.h +++

[Intel-gfx] [PATCH] drm/i915: remove questionable fence optimization during copy

First of all as discussed multiple times now kernel copies *must* always wait for all fences in a BO before actually doing the copy. This is mandatory. Additional to that drop the handling when there can't be a shared slot allocated on the source BO and just properly return an error code.

[Intel-gfx] [PATCH v3 6/6] drm/stm: ltdc: Drop format_mod_supported function

The "drm_plane_funcs.format_mod_supported" can be removed in favor of the default implementation. Signed-off-by: José Expósito --- drivers/gpu/drm/stm/ltdc.c | 11 --- 1 file changed, 11 deletions(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index

[Intel-gfx] [PATCH v2 5/6] drm: mxsfb: Drop format_mod_supported function

The "drm_plane_funcs.format_mod_supported" can be removed in favor of the default implementation. Signed-off-by: José Expósito --- drivers/gpu/drm/mxsfb/mxsfb_kms.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c

Re: [Intel-gfx] [PATCH v3 2/6] drm/plane: Fix typo in format_mod_supported documentation

Hi Simon, On Wed, Jan 05, 2022 at 11:54:43PM +, Simon Ser wrote: > Pushed patches 1 & 2 to drm-misc-next. Thanks for your contribution! Thanks a lot for the review and for applying the changes, appreciate it. Is there something that needs to improve in the other 4 patches? Or just waiting

[Intel-gfx] [PATCH -next] drm/i915/gvt: Fix intel_vgpu_default_mmio_write() kernel-doc comment

Fix function name in handlers.c kernel-doc comment to remove some warnings found by running scripts/kernel-doc, which is caused by using 'make W=1'. drivers/gpu/drm/i915/gvt/handlers.c:3812: warning: expecting prototype for intel_t_default_mmio_write(). Prototype was for

Re: [Intel-gfx] [PATCH v2 1/6] drm/plane: Make format_mod_supported truly optional

Thanks for your reviews :) I'll wait a couple of days to see if somebody else wants to comment and I'll send v3 adding the reviewed by tags and fixing the compiler warning. On Thu, Dec 23, 2021 at 05:03:19PM +0200, Ville Syrjälä wrote: > Another related thing that might be worth checking is

[Intel-gfx] [PATCH v2 0/6] Add missing format_mod_supported functions

Hi all, This patchset supersedes [1]. Now the title is a bit misleading, but I left it this way to (hopefully) facilitate the maintainers' work. A little context: Originally, I sent a patch adding modifiers to the VKMS driver and Simon Ser kindly reviewed it and pointed out that

[Intel-gfx] [PATCH v2 3/6] drm/simple-kms: Drop format_mod_supported function

The "drm_plane_funcs.format_mod_supported" can be removed in favor of the default implementation. Signed-off-by: José Expósito --- drivers/gpu/drm/drm_simple_kms_helper.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c

Re: [Intel-gfx] [PATCH] drm/i915: Discard large BIOS framebuffers causing display corruption.

LGTM — Aun-Ali Zaidi > On Jan 8, 2022, at 3:59 AM, Ashish Arora > wrote: > > > I believe I forgot to add Aditya to the conversation. So, I am sending the > patch as an attachment for those who want to test :)<0001-drm.patch>

[Intel-gfx] [PATCH v3 0/6] Add missing format_mod_supported functions

Hi all, This patchset supersedes [1]. Now the title is a bit misleading, but I left it this way to (hopefully) facilitate the maintainers' work. A little context: Originally, I sent a patch adding modifiers to the VKMS driver and Simon Ser kindly reviewed it and pointed out that

[Intel-gfx] [PATCH -next v2] drm/i915/fbc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE

Fix the following coccicheck warning: ./drivers/gpu/drm/i915/display/intel_fbc.c:1757:0-23: WARNING: intel_fbc_debugfs_false_color_fops should be defined with DEFINE_DEBUGFS_ATTRIBUTE Reported-by: Abaci Robot Signed-off-by: Yang Li --- drivers/gpu/drm/i915/display/intel_fbc.c | 8 1

Re: [Intel-gfx] [PATCH v3 4/4] drm/i915/fbc: Register per-crtc debugfs files

Hi Ville, On Mon, Dec 13, 2021 at 05:14:35PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Expose FBC debugfs files for each crtc. These may or may not point > to the same FBC instance depending on the platform. > > We leave the old global debugfs files in place until > igt catches up

[Intel-gfx] [PATCH v2 1/6] drm/plane: Make format_mod_supported truly optional

The documentation for "drm_plane_funcs.format_mod_supported" reads: This *optional* hook is used for the DRM to determine if the given format/modifier combination is valid for the plane. This allows the DRM to generate the correct format bitmask (which formats apply to which modifier),

[Intel-gfx] [PATCH v2 4/6] drm/i915/display: Drop format_mod_supported function

The "drm_plane_funcs.format_mod_supported" can be removed in favor of the default implementation. Signed-off-by: José Expósito --- drivers/gpu/drm/i915/display/intel_cursor.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c

Re: [Intel-gfx] [PATCH - v2] drm/i915: Discard large BIOS framebuffers causing display corruption.

Hi Jani Please review the patch and tell is something else is required. From: Ashish Arora Sent: Friday, 7 January, 2022, 8:32 pm To: jani.nik...@linux.intel.com; joonas.lahti...@linux.intel.com; rodrigo.v...@intel.com Cc: intel-gfx@lists.freedesktop.org;

[Intel-gfx] [PATCH] drm/i915/selftests: Fix NULL vs IS_ERR checking for kernel_context

Since i915_gem_create_context() function return error pointers, the kernel_context() function does not return null, It returns error pointers too. Using IS_ERR() to check the return value to fix this. Signed-off-by: Miaoqian Lin --- drivers/gpu/drm/i915/gt/selftest_execlists.c | 41

[Intel-gfx] [PATCH v3 4/6] drm/i915/display: Drop format_mod_supported function

The "drm_plane_funcs.format_mod_supported" can be removed in favor of the default implementation. Signed-off-by: José Expósito --- drivers/gpu/drm/i915/display/intel_cursor.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c

Re: [Intel-gfx] [PATCH] drm/i915: Discard large BIOS framebuffers causing display corruption.

Hi Orlando Thanks for informing that the Macs are also affected :). I've sne the v2 of the patch. You may try out if you want to. Get Outlook for Android From: Orlando Chamberlain Sent: Saturday, January 8, 2022 10:41:50 AM To:

Re: [Intel-gfx] [PATCH] drm/i915: remove questionable fence optimization during copy

Am 21.12.21 um 16:47 schrieb Thomas Hellström: Hi, Christian, On Tue, 2021-12-21 at 15:07 +0100, Christian König wrote: First of all as discussed multiple times now kernel copies *must* always wait for all fences in a BO before actually doing the copy. This is mandatory. This patch looks ok

[Intel-gfx] [PATCH] drm/i915: Discard large BIOS framebuffers causing display corruption.

From: Ashish Arora On certain 4k panels, the BIOS framebuffer is larger than what panel requires causing display corruption. Introduce a check for the same. Signed-off-by: Ashish Arora --- drivers/gpu/drm/i915/display/intel_fbdev.c | 11 +++ 1 file changed, 11 insertions(+) diff

Re: [Intel-gfx] [PATCH] drm/i915: Discard large BIOS framebuffers causing display corruption.

May I add your reviewed-by Aun-Ali Zaidi ? > On 08-Jan-2022, at 3:56 PM, Aun-Ali Zaidi wrote: > > LGTM > > — > Aun-Ali Zaidi > >> On Jan 8, 2022, at 3:59 AM, Ashish Arora >> wrote: >> >> >> I believe I forgot to add Aditya to the conversation. So, I am sending the >> patch as an

Re: [Intel-gfx] [PATCH v2 4/7] drm/i915: Use RING_PSMI_CTL rather than per-engine macros

On Fri, 07 Jan 2022, Matt Roper wrote: > We have a parameterized macro for RING_PSMI_CTL; let's use that instead > of the per-engine definitions where possible. > > Cc: Jani Nikula > Signed-off-by: Matt Roper Reviewed-by: Jani Nikula > --- > .../gpu/drm/i915/gt/intel_ring_submission.c |

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Remove short term pins from execbuf by requiring lock to unbind. (rev2)

== Series Details == Series: drm/i915: Remove short term pins from execbuf by requiring lock to unbind. (rev2) URL : https://patchwork.freedesktop.org/series/98137/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove short term pins from execbuf by requiring lock to unbind. (rev2)

== Series Details == Series: drm/i915: Remove short term pins from execbuf by requiring lock to unbind. (rev2) URL : https://patchwork.freedesktop.org/series/98137/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0a564d5e4bd9 drm/i915: Call i915_gem_evict_vm in vm_fault_gtt to

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: split out PCI config space registers from i915_reg.h

== Series Details == Series: series starting with [1/4] drm/i915: split out PCI config space registers from i915_reg.h URL : https://patchwork.freedesktop.org/series/98672/ State : success == Summary == CI Bug Log - changes from CI_DRM_11058_full -> Patchwork_21947_full

Re: [Intel-gfx] [PATCH] drm/i915: Discard large BIOS framebuffers causing display corruption.

I believe I forgot to add Aditya to the conversation. So, I am sending the patch as an attachment for those who want to test :) 0001-drm.patch Description: 0001-drm.patch

[Intel-gfx] [PATCH -next] drm/i915/fbc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE

Fix the following coccicheck warning: ./drivers/gpu/drm/i915/display/intel_fbc.c:1757:0-23: WARNING: intel_fbc_debugfs_false_color_fops should be defined with DEFINE_DEBUGFS_ATTRIBUTE Reported-by: Abaci Robot Signed-off-by: Yang Li --- drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- 1 file

[Intel-gfx] [PATCH - v2] drm/i915: Discard large BIOS framebuffers causing display corruption.

From: Ashish Arora On certain 4k panels, the BIOS framebuffer is larger than what panel requires causing display corruption. Introduce a check for the same. Signed-off-by: Ashish Arora --- drivers/gpu/drm/i915/display/intel_fbdev.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

[Intel-gfx] [PATCH v3 3/6] drm/simple-kms: Drop format_mod_supported function

The "drm_plane_funcs.format_mod_supported" can be removed in favor of the default implementation. Signed-off-by: José Expósito --- drivers/gpu/drm/drm_simple_kms_helper.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c

[Intel-gfx] [PATCH] i915: make array flex_regs static const

Don't populate the read-only array flex_regs on the stack but instead it static const. Also makes the object code a little smaller. Signed-off-by: Colin Ian King --- drivers/gpu/drm/i915/i915_perf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH v3 2/6] drm/plane: Fix typo in format_mod_supported documentation

Fix minor typo: "valdiate" -> "validate". Signed-off-by: José Expósito Reviewed-by: Simon Ser --- include/drm/drm_plane.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index 0c1102dc4d88..06759badf99f 100644 ---

[Intel-gfx] [PATCH v3 1/6] drm/plane: Make format_mod_supported truly optional

The documentation for "drm_plane_funcs.format_mod_supported" reads: This *optional* hook is used for the DRM to determine if the given format/modifier combination is valid for the plane. This allows the DRM to generate the correct format bitmask (which formats apply to which modifier),

Re: [Intel-gfx] [PATCH] drm/i915: Discard large BIOS framebuffers causing display corruption.

> On 07-Jan-2022, at 6:17 PM, Jani Nikula wrote: > > On Fri, 07 Jan 2022, Ashish Arora wrote: >> From: Ashish Arora >> >> On certain 4k panels, the BIOS framebuffer is larger than what panel >> requires causing display corruption. Introduce a check for the same. > > This is quite thin on

Re: [Intel-gfx] [PATCH] drm/i915: Discard large BIOS framebuffers causing display corruption.

On 07-Jan-2022, at 6:17 PM, Jani Nikula mailto:jani.nik...@linux.intel.com>> wrote: On Fri, 07 Jan 2022, Ashish Arora mailto:ashisharora.li...@outlook.com>> wrote: From: Ashish Arora mailto:ashisharora.li...@outlook.com>> On certain 4k panels, the BIOS framebuffer is larger than what panel

[Intel-gfx] [PATCH v2 6/6] drm/stm: ltdc: Drop format_mod_supported function

The "drm_plane_funcs.format_mod_supported" can be removed in favor of the default implementation. Signed-off-by: José Expósito --- drivers/gpu/drm/stm/ltdc.c | 11 --- 1 file changed, 11 deletions(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index

[Intel-gfx] [PATCH v3 5/6] drm: mxsfb: Drop format_mod_supported function

The "drm_plane_funcs.format_mod_supported" can be removed in favor of the default implementation. Signed-off-by: José Expósito --- drivers/gpu/drm/mxsfb/mxsfb_kms.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c

[Intel-gfx] i915 hangs up every second time in deep suspend

My Lenovo Thinkbook 13s-IWL is hanging up every second time when I put the device into the deep suspend mode. I put the device into suspend, the display is turning off, but the power button does not reach the slowly flashing mode. After a while the Laptop simply reboots. I was able to work

Re: [Intel-gfx] [PATCH v3 4/4] drm/i915/fbc: Register per-crtc debugfs files

On Tue, Dec 21, 2021 at 06:05:34PM +0200, Ville Syrjälä wrote: > On Sat, Dec 18, 2021 at 06:00:47PM -0700, Nathan Chancellor wrote: > > Hi Ville, > > > > On Mon, Dec 13, 2021 at 05:14:35PM +0200, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Expose FBC debugfs files for each crtc.

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: clean up i915_drv.h, part 2

== Series Details == Series: drm/i915: clean up i915_drv.h, part 2 URL : https://patchwork.freedesktop.org/series/98691/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11061 -> Patchwork_21957 Summary --- **FAILURE**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Asynchronous vma unbinding (rev7)

== Series Details == Series: drm/i915: Asynchronous vma unbinding (rev7) URL : https://patchwork.freedesktop.org/series/98055/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Asynchronous vma unbinding (rev7)

== Series Details == Series: drm/i915: Asynchronous vma unbinding (rev7) URL : https://patchwork.freedesktop.org/series/98055/ State : success == Summary == CI Bug Log - changes from CI_DRM_11061 -> Patchwork_21958 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/fbc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE (rev2)

== Series Details == Series: drm/i915/fbc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE (rev2) URL : https://patchwork.freedesktop.org/series/98682/ State : success == Summary == CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21955_full

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: clean up i915_drv.h, part 2

== Series Details == Series: drm/i915: clean up i915_drv.h, part 2 URL : https://patchwork.freedesktop.org/series/98691/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: fix potential refcnt issue of a dma_buf object

== Series Details == Series: drm/i915/selftests: fix potential refcnt issue of a dma_buf object URL : https://patchwork.freedesktop.org/series/98684/ State : success == Summary == CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21951_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/snps: vswing value refined for SNPS phys

== Series Details == Series: drm/i915/snps: vswing value refined for SNPS phys URL : https://patchwork.freedesktop.org/series/98710/ State : success == Summary == CI Bug Log - changes from CI_DRM_11061 -> Patchwork_21959 Summary ---

[Intel-gfx] [PATCH] drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for reference

All timestamps returned by GuC for GuC PMU busyness are captured from GUC PM TIMESTAMP. Since this timestamp does not tick when GuC goes idle, kmd uses RING_TIMESTAMP to measure busyness of an engine with an active context. In further stress testing, the MMIO read of the RING_TIMESTAMP is seen to

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Asynchronous vma unbinding (rev7)

== Series Details == Series: drm/i915: Asynchronous vma unbinding (rev7) URL : https://patchwork.freedesktop.org/series/98055/ State : warning == Summary == $ dim checkpatch origin/drm-tip fa2206c87130 drm/i915: Initial introduction of vma resources -:249: WARNING:FILE_PATH_CHANGES: added,

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for reference

== Series Details == Series: drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for reference URL : https://patchwork.freedesktop.org/series/98714/ State : success == Summary == CI Bug Log - changes from CI_DRM_11061 -> Patchwork_21960

Re: [Intel-gfx] [GIT PULL] GVT next changes for drm-intel-next-queued

On Fri, 2022-01-07 at 14:43 +, Wang, Zhi A wrote: > Hi folks: > > Happy holidays! This pull mostly contains the code re-factors patches > from Guenter Roeck and Rikard. Also a minor change from Zhenyu. > > Zhi > > The following changes since commit >

[Intel-gfx] [PATCH] drm/i915/snps: vswing value refined for SNPS phys

From: Clint Taylor Updated new values from BSPEC. BSPEC: 53920 Cc: Jani Nikula Cc: José Roberto de Souza Cc: Imre Deak Signed-off-by: Clint Taylor --- .../drm/i915/display/intel_ddi_buf_trans.c| 42 +-- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for reference

== Series Details == Series: drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for reference URL : https://patchwork.freedesktop.org/series/98714/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Fix NULL vs IS_ERR checking for kernel_context

== Series Details == Series: drm/i915/selftests: Fix NULL vs IS_ERR checking for kernel_context URL : https://patchwork.freedesktop.org/series/98685/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21952_full

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/snps: vswing value refined for SNPS phys

== Series Details == Series: drm/i915/snps: vswing value refined for SNPS phys URL : https://patchwork.freedesktop.org/series/98710/ State : success == Summary == CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21959_full Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Start cleaning up register definitions (rev3)

== Series Details == Series: Start cleaning up register definitions (rev3) URL : https://patchwork.freedesktop.org/series/98575/ State : warning == Summary == $ dim checkpatch origin/drm-tip e41d2f04b72a drm/i915: Use parameterized GPR register definitions everywhere -:22:

Re: [Intel-gfx] [PATCH] drm/i915/display: Enable second VDSC engine for higher moderates

> -Original Message- > From: Navare, Manasi D > Sent: Tuesday, January 11, 2022 1:07 AM > To: Kulkarni, Vandita > Cc: Nikula, Jani ; Lisovskiy, Stanislav > ; Ville Syrjälä > ; > intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Enable second VDSC >

[Intel-gfx] ✗ Fi.CI.IGT: failure for i915: make array flex_regs static const

== Series Details == Series: i915: make array flex_regs static const URL : https://patchwork.freedesktop.org/series/98688/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21956_full Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Asynchronous vma unbinding (rev7)

== Series Details == Series: drm/i915: Asynchronous vma unbinding (rev7) URL : https://patchwork.freedesktop.org/series/98055/ State : success == Summary == CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21958_full Summary

[Intel-gfx] [PATCH v3 08/11] drm/i915: Move SNPS PHY registers to their own header

These registers are only needed in a couple files and on specific platforms; let's keep them separate from the general register pool. v2: - Don't forget to include i915_reg_defs.h (Jani) - Ensure include guard matches header name (Jani) Cc: Jani Nikula Signed-off-by: Matt Roper Reviewed-by:

[Intel-gfx] [PATCH v3 11/11] drm/i915: Drop unused _PORT3 and _PORT4 TC phy register offsets

All MG/DKL PHY register regions are evenly spaced offset-wise (0x168000, 0x169000, 0x16A000, 0x16B000) so the _MMIO_PORT() macro we use to access their registers only needs the first two offsets. We can drop the _PORT3 and _PORT4 offsets which are never directly referenced. Cc: Jani Nikula

[Intel-gfx] [PATCH v3 07/11] drm/i915/gt: Move engine registers to their own header

Let's start breaking up and cleaning up the massive i915_reg.h file. We'll start by moving all registers that are defined in relation to an engine base to their own header. There are probably a bunch of other "engine registers" that we haven't moved yet (especially those that belong to the render

[Intel-gfx] [PATCH v3 04/11] drm/i915: Use RING_PSMI_CTL rather than per-engine macros

We have a parameterized macro for RING_PSMI_CTL; let's use that instead of the per-engine definitions where possible. Cc: Jani Nikula Signed-off-by: Matt Roper Reviewed-by: Jani Nikula --- .../gpu/drm/i915/gt/intel_ring_submission.c | 10 +-

[Intel-gfx] [PATCH v3 03/11] drm/i915: Parameterize ECOSKPD

Combine the separate render and blitter register definitions into a single definition. We already know we have some workarounds on an upcoming platform that will need to update the ECOSKPD register for other engines too, so this helps pave the way for that. Cc: Jani Nikula Signed-off-by: Matt

[Intel-gfx] [PATCH v3 09/11] drm/i915: Move combo PHY registers to their own header

These registers are only needed in a couple files and on specific platforms; let's keep them separate from the general register pool. Cc: Jani Nikula Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/display/icl_dsi.c| 1 + .../gpu/drm/i915/display/intel_combo_phy.c| 1 +

[Intel-gfx] [PATCH v3 10/11] drm/i915: Move TC PHY registers to their own header

Registers representing the MG/DKL TC PHYs (including the TC DPLLs which exist inside the PHY) are only needed in a couple files and on specific platforms; let's keep them separate from the general register pool. Cc: Jani Nikula Signed-off-by: Matt Roper ---

[Intel-gfx] [PATCH v3 01/11] drm/i915: Use parameterized GPR register definitions everywhere

Since we have an engine-parameterized macro GEN8_RING_CS_GPR, let's use that in place of the HSW_CS_GPR and BCS_GPR register definitions. Cc: Jani Nikula Signed-off-by: Matt Roper Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/i915_cmd_parser.c | 68 ++

[Intel-gfx] [PATCH v3 05/11] drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7

It's preferable to use parameterized register macros where possible. Cc: Jani Nikula Signed-off-by: Matt Roper Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- drivers/gpu/drm/i915/gvt/mmio_context.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h | 1

[Intel-gfx] [PATCH v3 00/11] Start cleaning up register definitions

Let's start splitting up and cleaning up parts of i915_reg.h. Rather than starting with dead code removal as we did in v1, this time we'll switch a few macros to parameterized style, and then move a few types of registers (engine registers, SNPS PHY registers) off to their own header files. v3:

[Intel-gfx] [PATCH v3 02/11] drm/i915: Parameterize PWRCTX_MAXCNT

Rather than having separate definitions for each engine, create a single parameterized macro that takes the engine base offset. This will also ensure we get to the proper offset if we ever need to use these registers on newer platforms (where the media engine offsets have changed). Cc: Jani

[Intel-gfx] [PATCH v3 06/11] drm/i915: Introduce i915_reg_defs.h

We'd like to start splitting i915_reg.h into various domain-specific register files and cleaning them up. Let's move the basic macros and type definitions to their own header file that can be including in each of the new split headers. Cc: Jani Nikula Signed-off-by: Matt Roper ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Start cleaning up register definitions (rev3)

== Series Details == Series: Start cleaning up register definitions (rev3) URL : https://patchwork.freedesktop.org/series/98575/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

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