On 11.03.2022 10:40, Lucas De Marchi wrote:
> On Tue, Mar 08, 2022 at 10:17:42PM +0530, Balasubramani Vivekanandan wrote:
> > This patch is continuation of the effort to move all pointers in i915,
> > which at any point may be pointing to device memory or system memory, to
> >
://patchwork.freedesktop.org/series/99711/
This patch converts all access to the lrc_desc through iosys_map
interfaces.
Cc: Lucas De Marchi
Cc: John Harrison
Cc: Matthew Brost
Cc: Umesh Nerlige Ramappa
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 2 +-
.../gpu/drm
On 23.02.2022 10:02, Das, Nirmoy wrote:
>
> On 22/02/2022 15:51, Balasubramani Vivekanandan wrote:
> > drm_memcpy_from_wc() performs fast copy from WC memory type using
> > non-temporal instructions. Now there are two similar implementations of
> > this function. O
is not
supported but uses memcpy_fromio as fallback for copying.
Cc: Matthew Brost
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/selftest_reset.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c
as fallback.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/i915_gpu_error.c | 45 +++
1 file changed, 25 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 1d042551619e
memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
by the implementation in drm_cache.c.
Updated to use the functions provided by drm_cache.c.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 8
1 file changed, 4 insertions
memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
by the implementation in drm_cache.c.
Updated to use the functions provided by drm_cache.c.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/selftests/intel_memory_region.c | 8 ++--
1 file changed, 6
memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
by the implementation in drm_cache.c.
Updated to use the functions provided by drm_cache.c.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 11 ---
1 file changed, 8
Balasubramani Vivekanandan (7):
drm: Relax alignment constraint for destination address
drm: Add drm_memcpy_from_wc() variant which accepts destination
address
drm/i915: use the memcpy_from_wc call from the drm
drm/i915/guc: use the memcpy_from_wc call from the drm
drm/i915/selftests: use
Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Cc: Thomas Hellstr_m
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/drm_cache.c | 54 +
include/drm/drm_cache.h | 3 +++
2 files changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/drm_cache.c b
-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/drm_cache.c | 44 -
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index c3e6e615bf09..a21c1350eb09 100644
--- a/drivers/gpu/drm
accordingly
(Lucas)
Cc: Lucas De Marchi
Cc: Matthew Auld
Cc: Thomas Hellstr_m
Signed-off-by: Balasubramani Vivekanandan
---
.../drm/i915/selftests/intel_memory_region.c | 41 +--
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests
feedback from Lucas)
Cc: Jani Nikula
Cc: Lucas De Marchi
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: Thomas Hellstr_m
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: Nirmoy Das
Balasubramani Vivekanandan (7):
drm: Relax alignment constraint for destination
Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Cc: Thomas Hellstr_m
Cc: Lucas De Marchi
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/drm_cache.c | 54 +
include/drm/drm_cache.h | 3 +++
2 files changed, 57 insertions(+)
diff --git a/drivers
as fallback.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/i915_gpu_error.c | 45 +++
1 file changed, 25 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 4967e79806f8
-off-by: Balasubramani Vivekanandan
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/drm_cache.c | 44 -
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index c3e6e615bf09..a21c1350eb09
is not
supported but uses memcpy_fromio as fallback for copying.
Cc: Matthew Brost
Cc: Michał Winiarski
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/selftest_reset.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm
Marchi
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index a24dc6441872
memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
by the implementation in drm_cache.c.
Updated to use the functions provided by drm_cache.c.
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 --
1
/O memory access?
> >
> > On Thu, Mar 03, 2022 at 11:30:11PM +0530, Balasubramani Vivekanandan wrote:
> > > memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
> > > by the implementation in drm_cache.c.
> > > Updated to use the
On 01.04.2022 18:07, Ramalingam C wrote:
> Move the static calculations out of the loops for copy and clear.
>
> Signed-off-by: Ramalingam C
> Reviewed-by: Thomas Hellstrom
> ---
> drivers/gpu/drm/i915/gt/intel_migrate.c | 40 -
> 1 file changed, 19 insertions(+), 21
On 21.03.2022 14:14, Lucas De Marchi wrote:
> On Thu, Mar 03, 2022 at 11:30:10PM +0530, Balasubramani Vivekanandan wrote:
> > memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
> > by the implementation in drm_cache.c.
> > Updated to use the functions pr
On 29.03.2022 00:37, Ramalingam C wrote:
> Move the static calculations out of the loops for copy and clear.
>
> Signed-off-by: Ramalingam C
> Reviewed-by: Thomas Hellström
> ---
> drivers/gpu/drm/i915/gt/intel_migrate.c | 44 -
> 1 file changed, 21 insertions(+), 23
Looks good to me.
Reviewed-by: Balasubramani Vivekanandan
On 28.03.2022 17:08, Matt Roper wrote:
> ATS-M is a server platform based on Xe_HPG and Xe_HPM, but without
> display support. From a driver point of view, it's easiest to just
> handle it as DG2 (including identifying as PLA
-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 3 +-
drivers/gpu/drm/i915/gt/selftest_reset.c | 8 ++-
drivers/gpu/drm/i915/i915_gpu_error.c | 9 ++-
drivers/gpu/drm/i915/i915_memcpy.c | 78 --
drivers/gpu/drm/i915/i915_memcpy.h
-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 5 +-
drivers/gpu/drm/i915/gt/selftest_reset.c | 8 ++-
drivers/gpu/drm/i915/i915_gpu_error.c | 9 ++-
drivers/gpu/drm/i915/i915_memcpy.c | 78 --
drivers/gpu/drm/i915/i915_memcpy.h
Fallback function implemented inside memcpy_from_wc functions when
copying using accelerated read is not possible.
v2: Fixed Sparse warnings
Balasubramani Vivekanandan (1):
drm/i915: Add fallback inside memcpy_from_wc functions
drivers/gpu/drm/i915/gem/i915_gem_object.c | 5 +-
drivers/gpu
On 08.02.2022 11:11, Lucas De Marchi wrote:
> On Mon, Feb 07, 2022 at 09:43:08PM +0530, Balasubramani Vivekanandan wrote:
> > memcpy_from_wc functions can fail if SSE4.1 is not supported or the
> > supplied addresses are not 16-byte aligned. It was then upto to the
> >
.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 23 +--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index bb864655c495..06d30670e15c
On 04.04.2022 15:01, Mullati Siva wrote:
> From: Siva Mullati
>
> Convert CT commands and descriptors to use iosys_map rather
> than plain pointer and save it in the intel_guc_ct_buffer struct.
> This will help with ct_write and ct_read for cmd send and receive
> after the initialization by
On 25.10.2023 18:47, Dnyaneshwar Bhadane wrote:
> Implemented workaround for XeLPM+
> BSpec: 51762
>
> Signed-off-by: Dnyaneshwar Bhadane
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Balasubramani Vivekan
On 21.09.2023 10:38, Jani Nikula wrote:
> On Thu, 21 Sep 2023, Balasubramani Vivekanandan
> wrote:
> > Separate the printing of display version and feature flags from the main
> > driver probe to inside the display initialization. This is in alignment
> > with isolati
)
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display/intel_display_driver.c | 5 +
drivers/gpu/drm/i915/i915_driver.c | 2 --
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
b/drivers/gpu/drm
Separate the printing of display version and feature flags from the main
driver probe to inside the display initialization. This is in alignment
with isolating the display code from the main driver and helps Xe driver
to resuse it.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm
Marchi
Cc: Daniele Ceraolo Spurio
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 2 +-
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 52 +
drivers/gpu/drm/i915/gt/uc/intel_guc_log.c| 77 ++-
drivers/gpu/drm/i915/gt/uc
is not
supported but uses memcpy_fromio as fallback for copying.
Cc: Matthew Brost
Cc: Michał Winiarski
Signed-off-by: Balasubramani Vivekanandan
Acked-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/selftest_reset.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff
accordingly
(Lucas)
Cc: Lucas De Marchi
Cc: Matthew Auld
Cc: Thomas Hellstr_m
Cc: Thomas Zimmermann
Cc: Daniel Vetter
Signed-off-by: Balasubramani Vivekanandan
Acked-by: Nirmoy Das
---
.../drm/i915/selftests/intel_memory_region.c | 41 +--
1 file changed, 28 insertions(+), 13
log using iosys_map
abstraction, in addition to using drm_memcpy_from_wc.
Cc: Jani Nikula
Cc: Lucas De Marchi
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: Thomas Hellstr_m
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: Nirmoy Das
Balasubramani Vivekanandan (7):
provides
the offset into the src address to start copy from.
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Cc: Thomas Hellstr_m
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Lucas De Marchi
Reviewed-by: Nirmoy Das
---
drivers
-off-by: Balasubramani Vivekanandan
Reviewed-by: Lucas De Marchi
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/drm_cache.c | 44 -
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index
memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
by the implementation in drm_cache.c.
Updated to use the functions provided by drm_cache.c.
v2: Pass newly added src offset argument to the modified
drm_memcpy_from_wc_vaddr() function.
Signed-off-by: Balasubramani
as fallback.
Signed-off-by: Balasubramani Vivekanandan
Acked-by: Nirmoy Das
---
drivers/gpu/drm/i915/i915_gpu_error.c | 45 +++
1 file changed, 25 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
New updates to HDMI combo PHY voltage swing tables. Actually with this
update (bspec updated on 08/17/2021), the values are reverted back to be
same as icelake for HDMI combo PHY.
Bspec: 49291
Signed-off-by: Balasubramani Vivekanandan
---
.../drm/i915/display/intel_ddi_buf_trans.c| 22
Voltage swing table updated for eDP HBR3
Bspec: 49291
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm
>
>
> v5:
> - Rebase to latest drm-tip (resolve trivial conflicts)
> - Move XEHP_BITMAP_BITS() to the header so that w
On 23.05.2022 13:45, Matt Roper wrote:
> As with EU masks, it's easier to store subslice/DSS masks internally in
> a format that's more natural for the driver to work with, and then only
> covert into the u8[] uapi form when the query ioctl is invoked. Since
> the hardware design changed
ADL-N being a subplatform of ADL-P, it lacks support for hwconfig
table. Explicit check added to skip ADL-N.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt
5/sseu: Disassociate internal subslice mask
> representation from uapi")
> Cc: Balasubramani Vivekanandan
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a
n >.
>
> Fixes: b87d39019651 ("drm/i915/sseu: Disassociate internal subslice mask
> representation from uapi")
> Reported-by: Balasubramani Vivekanandan
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
> 1 file changed, 1 i
On 04.04.2022 15:01, Mullati Siva wrote:
> From: Siva Mullati
>
> Convert CT commands and descriptors to use iosys_map rather
> than plain pointer and save it in the intel_guc_ct_buffer struct.
> This will help with ct_write and ct_read for cmd send and receive
> after the initialization by
On 16.03.2022 18:26, Mullati Siva wrote:
> From: Siva Mullati
>
> Convert slpc shared data to use iosys_map rather than
> plain pointer and save it in the intel_guc_slpc struct.
> This will help with in read and update slpc shared data
> after the slpc init by abstracting the IO vs system
O vs system memory.
>
> Signed-off-by: Siva Mullati
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 82 +++
> .../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 5 +-
> 2 files changed, 50 insertions(+), 37 deletions(-)
Acked-by: Balasubramani Vivekanandan
the initialization by abstracting the IO vs system memory.
>
> Signed-off-by: Siva Mullati
Acked-by: Balasubramani Vivekanandan
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 195 +-
> drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +-
> 2 files chan
On 28.04.2022 19:43, Siva Mullati wrote:
>
> On 14/04/22 17:41, Balasubramani Vivekanandan wrote:
> > On 04.04.2022 15:01, Mullati Siva wrote:
> >> From: Siva Mullati
> >>
> >> Convert CT commands and descriptors to use iosys_map
; Signed-off-by: Matt Roper
> Signed-off-by: Radhakrishna Sripada
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Balasubramani Vivekanandan
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_e
On 18.08.2022 16:41, Radhakrishna Sripada wrote:
> From: Matt Roper
>
> The part of the media and blitter engine contexts that we care about for
> setting up an initial state are the same on MTL as they were on DG2
> (and PVC), so we need to update the driver conditions to re-use the DG2
>
even if an RC6 entry had wiped the
> register back to hardware defaults since the last context ran.
>
> Fixes: 6dc85721df74 ("drm/i915/dg2: Add additional tuning settings")
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6642
> Signed-off-by: Matt Roper
Reviewed-
On 27.07.2022 20:46, Radhakrishna Sripada wrote:
> From: Matt Roper
>
> Going forward, the hardware teams no longer consider new platforms to
> have a "generation" in the way we've defined it for past platforms.
> Instead, each IP block (graphics, media, display) will have their own
>
> - Dg2, mtl xcs offsets slightly vary. Use a separate offsets array(Bala)
> - Drop unused registers in mtl rcs offsets.(Bala)
>
> Bspec: 46261, 46260, 45585
> Cc: Balasubramani Vivekanandan
> Signed-off-by: Matt Roper
> Signed-off-by: Radhakrishn
t; drivers/gpu/drm/i915/intel_step.c | 60 +++
> 1 file changed, 60 insertions(+)
Reviewed-by: Balasubramani Vivekanandan
>
> diff --git a/drivers/gpu/drm/i915/intel_step.c
> b/drivers/gpu/drm/i915/intel_step.c
> index 42b3133d8387..0fa7147c7d0f 100644
> --- a/dr
by: Radhakrishna Sripada
Reviewed-by: Balasubramani Vivekanandan
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 11 ++-
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
> b/drivers/gpu/drm/i915/intel_uncore.c
> index a852
On 19.09.2022 15:32, Matt Roper wrote:
> Gen8 was the first time our hardware had multicast registers (or at
> least the first time the multicast nature was exposed and MMIO accesses
> could be steered). There are some registers that transitioned from
> singleton behavior to multicast during the
On 19.09.2022 15:32, Matt Roper wrote:
> Starting in Xe_HP, several registers our driver works with have been
> converted from singleton registers into replicated registers with
> multicast behavior. Although the registers are still located at the
> same MMIO offsets as on previous platforms,
This is a prep patch for a patch series in which register offset of the
DDI ports are not calculated using the port enums but using a different
datastructure part of the device info.
So the device info is passed as a parameter to the macro DDI_BUF_CTL but
unused yet.
Signed-off-by: Balasubramani
calculation.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/i915_pci.c | 46 ++--
drivers/gpu/drm/i915/intel_device_info.h | 1 +
2 files changed, 44 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915
a WARN_ON as it is no longer valid. The WARN was added in the
commit "327f8d8c336d drm/i915: simplify setting of ddi_io_power_domain"
The ddi_io_power_domain calculation has changed completely since the
commit and doesn't need this WARN_ON anymore.
Signed-off-by: Balasubramani Vivekanandan
--
of
device info.
Series includes few patches at the end which does some cleanup and
fixing made possible because of unique enums for the ports.
Cc: Jani Nikula
Cc: Ville Syrjälä
Balasubramani Vivekanandan (6):
drm/i915/display: Pass struct drm_i915_private to DDI_BUF_CTL macro
On 23.09.2022 12:52, Jani Nikula wrote:
> On Wed, 21 Sep 2022, Balasubramani Vivekanandan
> wrote:
> > Display DDI ports are enumerated as PORT_A,PORT_B... . The enums are
> > also used as an index to access the DDI_BUF_CTL register for the port.
> >
> > With the in
On 23.09.2022 13:18, Ville Syrjälä wrote:
> On Fri, Sep 23, 2022 at 12:52:48PM +0300, Jani Nikula wrote:
> > On Wed, 21 Sep 2022, Balasubramani Vivekanandan
> > wrote:
> > > Display DDI ports are enumerated as PORT_A,PORT_B... . The enums are
> > > also used as a
Port enums are no more used in the DDI register offset caculcation. We
can remove the platform specific port redefinitions. Along with it we
also get rid of the code required for handling these special
definitions.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display
non-TypeC.
However, the enum definitions PORT_G/H/I and few usages of these enums
were left as it is.
These enums are unused as of today and can be removed.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display/intel_bios.c| 3 ---
drivers/gpu/drm/i915/display/intel_dis
port_identifier function was broken when TypeC ports were using enum
aliases. It would return wrong string for TypeC ports.
With unique enums for DDI ports now, fix port_identifier to cover all
ports.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display/intel_display.h
recently added for DG2/PVC. (Bala)
>
> Signed-off-by: Matt Roper
> Reviewed-by: Balasubramani Vivekanandan
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 +--
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 11 +++-
> drivers/gpu/drm/i915/gt/intel_workaro
ons(+), 66 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index 890960b56b9e..ad9985015b0e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/dri
++
> drivers/gpu/drm/i915/gt/intel_gt_mcr.h | 7
> 2 files changed, 62 insertions(+)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> index 4d
.c| 4 +-
> drivers/gpu/drm/i915/gvt/handlers.c | 2 +-
> drivers/gpu/drm/i915/gvt/mmio_context.c | 14 ++---
> drivers/gpu/drm/i915/i915_reg_defs.h | 27 +-
> 12 files changed, 117 insertions(+), 83 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
Regar
pu/drm/i915/gt/intel_gt_mcr.h | 3 +++
> 2 files changed, 31 insertions(+)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> index a2047a68ea7a..4dc360f4e344 100644
> -
> drivers/gpu/drm/i915/gt/intel_gt.c| 52 +++
> drivers/gpu/drm/i915/i915_gpu_error.c | 12 +--
> 2 files changed, 55 insertions(+), 9 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
arounds_types.h | 4 +-
> 2 files changed, 263 insertions(+), 174 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 96b9f02a2284..7671994d5b7a 10
anges added on future platforms will also be dumped).
> - Restore MULTICAST bit at the end of rw_with_mcr_steering_fw() if we
>cleared it. Also force the MULTICAST bit to true at the beginning of
>multicast writes just to be safe. (Bala)
>
> Bspec: 67788, 6
+--
> 3 files changed, 32 insertions(+), 4 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
> index 23a1ef9659bf..0d2811724b00 100644
> --- a/drivers/g
n any future platform.
>
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 17 -
> 1 file changed, 17 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
the unconditional GEN9_LNCFCMOCS usage
>in selftest_mocs. (Bala)
> - Include some additional TLB registers.
>
> Bspec: 66534
> Cc: Balasubramani Vivekanandan
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c| 4 ++--
> drivers/gp
r them).
>
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 55 +-
> 1 file changed, 34 insertions(+), 21 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/in
> - Switch more uncore operations in mmio_invalidate_full() to MCR
>operations for Xe_HP. (Bala)
>
> Cc: Balasubramani Vivekanandan
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c| 58 ---
> drivers/gpu/drm/i915/gt/inte
rs/gpu/drm/i915/gt/intel_workarounds.c | 10 +-
> 2 files changed, 9 insertions(+), 9 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index 71d8787
On 20.10.2022 17:20, Anusha Srivatsa wrote:
> Driver had discrepancy in how cdclk squash and crawl support
> were checked. Like crawl, add squash as a 1 bit feature flag
> to the display section of DG2.
>
> Cc: Balasubramani Vivekanandan
> Cc: Ville Syrjälä
> Signed-of
On 20.10.2022 17:20, Anusha Srivatsa wrote:
> No functional change. Introduce dg2_cdclk_squash_programming and
> move squash_ctl register programming bits to this.
>
> Cc: Balasubramani Vivekanandan
> Cc: Ville Syrjälä
> Signed-off-by: Anusha Srivatsa
> ---
> driv
dclk() to make it more modularized
> and easy to read and understand.
>
> Cc: Balasubramani Vivekanandan
> Cc: Ville Syrjälä
>
> Anusha Srivatsa (4):
> drm/i915/display: Change terminology for cdclk actions
> drm/i915/display: Introduce HAS_CDCLK_SQUASH macro
> drm/i91
On 21.10.2022 14:39, Anusha Srivatsa wrote:
> No functional change. Moving segments out to simplify
> bxt_set_cdlck()
>
> v2: s/bxt_cdclk_pll/bxt_cdclk_pll_update (Jani)
>
> Cc: Jani Nikula
> Cc: Balasubramani Vivekanandan
> Cc: Ville Syrjälä
> Signed-off-by: Anusha
On 21.10.2022 14:39, Anusha Srivatsa wrote:
> No functional change. Introduce dg2_cdclk_squash_program and
> move squash_ctl register programming bits to this.
>
> v2: s/dg2_cdclk_squash_programming/dg2_cdclk_squash_program (Jani)
>
> Cc: Jani Nikula
> Cc: Balasubrama
On 21.10.2022 14:39, Anusha Srivatsa wrote:
> No functional changes. Changing terminolgy in some
> print statements. s/has_cdclk_squasher/has_cdclk_squash,
> s/crawler/crawl and s/squasher/squash.
>
> Cc: Balasubramani Vivekanandan
> Cc: Ville Syrjälä
> Signed-of
On 21.10.2022 14:39, Anusha Srivatsa wrote:
> Driver had discrepancy in how cdclk squash and crawl support
> were checked. Like crawl, add squash as a 1 bit feature flag
> to the display section of DG2.
>
> Cc: Balasubramani Vivekanandan
> Cc: Ville Syrjälä
> Signed-of
On 13.10.2022 16:32, Anusha Srivatsa wrote:
> From: Ville Syrjälä
>
> For MTL, changing cdclk from between certain frequencies has
> both squash and crawl. Use the current cdclk config and
> the new(desired) cdclk config to construtc a mid cdclk config.
> Set the cdclk twice:
> - Current cdclk
peC ports defined at the bottom, driver can easily
identify the TypeC ports.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display/icl_dsi.c| 12 ++--
drivers/gpu/drm/i915/display/intel_bios.c | 4 +-
drivers/gpu/drm/i915/display/intel_ddi.c
commit and doesn't need this WARN_ON anymore.
Signed-off-by: Balasubramani Vivekanandan
---
drivers/gpu/drm/i915/display/icl_dsi.c| 12 ++--
drivers/gpu/drm/i915/display/intel_bios.c | 4 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 63 +++---
drivers/gpu/drm/i915/disp
(MattR)
>
> BSpec: 49306
>
> Cc: Matt Roper
> Original Author: Brian J Lovin
> Signed-off-by: Radhakrishna Sripada
> ---
> drivers/gpu/drm/i915/display/intel_gmbus.c | 15 +++
> drivers/gpu/drm/i915/display/intel_gmbus.h | 1 +
> 2 files chang
(MattR)
>
> BSpec: 49306
>
> Cc: Matt Roper
> Original Author: Brian J Lovin
> Signed-off-by: Radhakrishna Sripada
> ---
> drivers/gpu/drm/i915/display/intel_gmbus.c | 15 +++
> drivers/gpu/drm/i915/display/intel_gmbus.h | 1 +
> 2 files chang
On 01.09.2022 23:03, Radhakrishna Sripada wrote:
> Display 14 and future platforms do not directly communicate to Pcode
> via mailbox the SAGV bandwidth information. PM Demand registers are
> used to communicate display power requirements to the PUnit which would
> include GV point and mask value.
e
> those don't use either guc or execlist, i.e. HAS_EXECLISTS() is false.
>
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 16
> 1 file changed, 4 insertions(+), 12 deletions(-)
Reviewed-by: Balasubramani Vivekanandan
>
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