or=implicit-function-declaration]
tmp += _mm_stream_load_si128(s++);
^
gem_gtt_speed.c:65:3: warning: nested extern declaration of
‘_mm_stream_load_si128’ [-Wnested-externs]
gem_gtt_speed.c:70:2: error: unknown type name ‘__m128i’
*(volatile __m128i *)src = tmp;
^
CC: Chris Wilson
Signed-of
;
# error "SSE4.1 instruction set not enabled"
^
v2: Use a pragma directive (Chris)
Cc: Chris Wilson
Signed-off-by: Damien Lespiau
---
tests/gem_exec_flush.c | 1 +
tests/gem_gtt_speed.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/tests/gem_exec_flush.c b/tests/ge
On Thu, Jul 14, 2016 at 06:48:26PM +0100, Chris Wilson wrote:
> On Thu, Jul 14, 2016 at 06:44:59PM +0100, Chris Wilson wrote:
> > On Thu, Jul 14, 2016 at 06:31:37PM +0100, Damien Lespiau wrote:
> > > Depending how the gcc was compiled it may be necessary to enable SSE4
We exit early if has_aliasing_ppgtt is 0, so towards the end of the
function has_aliasing_ppgtt can only be 1.
Also:
if (foo)
return 1;
else
return 0;
when foo is already a bool is really just:
return foo;
Signed-off-by: Damien Lespiau
On Fri, Dec 04, 2015 at 04:19:49PM +0100, Daniel Vetter wrote:
> This was broken in
>
> commit 6a8beeffed3b2d33151150e3a03696e697f16d46
> Author: Wayne Boyer
> Date: Wed Dec 2 13:28:14 2015 -0800
>
> drm/i915: Clean up device info structure definitions
>
> and I didn't spot this while rev
On Fri, Nov 06, 2015 at 02:11:16PM +0200, Mika Kuoppala wrote:
> From: Mika Kuoppala
>
> Add Skylake Intel Graphics GT4 PCI IDs
>
> v2: Rebase
>
> Signed-off-by: Mika Kuoppala
> ---
Reviewed-by: Damien Lespiau
> drivers/gpu/drm/i915/i915_drv.c | 1 +
&
On Fri, Dec 04, 2015 at 07:00:36PM +, Damien Lespiau wrote:
> On Fri, Nov 06, 2015 at 02:11:16PM +0200, Mika Kuoppala wrote:
> > From: Mika Kuoppala
> >
> > Add Skylake Intel Graphics GT4 PCI IDs
> >
> > v2: Rebase
> >
> > Signed-off-by: Mi
commit 985dd4360fdf2533fe48a33a4a2094f2e4718dc0
Author: Imre Deak
Date: Thu Jan 28 16:04:12 2016 +0200
drm/i915/bxt: update list of PCIIDs
Signed-off-by: Damien Lespiau
---
src/i915_pciids.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/i915_pciids.h
On Thu, Feb 04, 2016 at 06:14:02PM +, Kibey, Sameer wrote:
> Updated the list-workarounds script so that it
> can parse Mesa directory if provided. Moved the
> common code to a separate function to allow
> reuse for both kernel and mesa.
>
> The new command line is:
> Usage: list-workarounds [
On Fri, Feb 05, 2016 at 01:55:19PM -0800, Sameer Kibey wrote:
> Updated the list-workarounds script so that it
> can parse Mesa directory if provided. Moved the
> common code to a separate function to allow
> reuse for both kernel and mesa.
>
> The new command line is:
> Usage: list-workarounds [o
That script is a python 3 script, so we can't use the python 2 print
statement, it's a function now.
I missed it in the review because reviewing a diff without additional
context gives you a partial story.
Cc: Sameer Kibey
Cc: Dylan Baker
Signed-off-by: Damien Lespiau
---
sc
On Fri, Feb 05, 2016 at 04:12:08PM -0800, Dylan Baker wrote:
> > > parse(work_arounds)
> > > + print "\nList of workarounds found in %s:" % project
>
> Hey Damien, the script says it's python 3, and this ^^^ is broken syntax
> in python 3 (but not in 2).
:(
I did notice the python2 con
Hi Lukas,
I'm sorry I haven't reacted sooner. I've enabled the option to only
consider git send-email patches on intel-gfx as we were having a lot of
false positives (ie patchwork considering emails were people were making
suggestions with diffs as patches to test).
I'm not sure how you send your
On Mon, May 09, 2016 at 04:23:44PM +0300, Marius Vlad wrote:
> Easier to catch compilation errors.
Having -Werror by default is a no go as you cannot control/predict the
set of warnings (and the quality of those) of all previous and future
gcc/clang versions.
Always using this flag will cause di
On Mon, May 09, 2016 at 06:55:12PM +0300, Marius Vlad wrote:
> > Adding a test (with patchwork integration!) that ensures each commit
> > posted on this mailing-list compiles without new warning with a chosen
> > toolchain (and even passes distcheck!) would be nice.
> We have this for check and dis
On Tue, May 10, 2016 at 05:32:15PM +0300, Marius Vlad wrote:
> v2: Initially added Werror by default. Make it optional so it doesn't
> break android build and (potential) distros maintaing the package
> (Hinted by Damien Lespiau).
>
> --enable-werror will enable -Werror compil
erate the vaapi shaders from
source and check for differences in the generated opcodes.
https://cgit.freedesktop.org/vaapi/intel-driver/
If all the shaders do compile and there's no difference in the generated
code, this is:
Acked-by: Damien Lespiau
--
Damien
>
> diff --git a/as
On Thu, May 19, 2016 at 07:02:40AM -0700, Ben Widawsky wrote:
> On Thu, May 19, 2016 at 12:28:10PM +0100, Damien Lespiau wrote:
> > On Mon, May 16, 2016 at 01:39:10PM +0300, Marius Vlad wrote:
> > > Signed-off-by: Marius Vlad
> > > ---
&
On Fri, Sep 18, 2015 at 06:17:05PM +0300, Mika Kuoppala wrote:
> Parse csr/dmc firmware version and augment debug message
> by printing it.
>
> Cc: Animesh Manna
> Signed-off-by: Mika Kuoppala
FWIW I did something similar in the past, but that contribution was
denied. I also had the DC states e
On Thu, Oct 08, 2015 at 12:03:30PM +0100, Damien Lespiau wrote:
> The DMC firmware version decoding was different in my patch and I'm sure
> it worked then. Maye the header has changed :(
By the way, if this is indeed the case, could you fix
intel_firmware_decode as wel
On Thu, Oct 22, 2015 at 12:01:21AM +0530, Thulasimani, Sivakumar wrote:
>
>
> On 8/25/2015 2:50 AM, Vivi, Rodrigo wrote:
> >On Mon, 2015-08-24 at 19:54 +, Zanoni, Paulo R wrote:
> >>Em Qui, 2015-08-20 às 16:23 -0700, Rodrigo Vivi escreveu:
> >>>Let's use a native read with retry as suggested
On Wed, Oct 28, 2015 at 01:58:55PM +, Sharma, Shashank wrote:
>Hi Damien
>
>This is regarding one of the patches:
>drm: Add support for alternate clocks of 4k modes
>(3f2f653378112c1453c0d83c81746a9225e4bc75)
>
>I am seeing that from function drm_match_hdmi_mode we are not
On Wed, Oct 28, 2015 at 06:38:21PM +0200, Jani Nikula wrote:
> > Are you seeing a bug? it's totally possible, I've never used an actual
> > conformance tool when I wrote that code, so it's likely buggy and the
> > VIC in the AVI infoframe may well be wrong.
>
> Possibly relevant
> https://bugs.fre
Hi all,
I've added a feature to sort the patches sent to intel-gfx into 3
buckets: i915, intel-gpu-tools and libdrm. This sorting relies on
tagging patches, using the subject prefixes (which is what most people
do already anyway).
- i915 (intel-gfx): catchall project, all mails not matching any
On Mon, Nov 09, 2015 at 10:45:14AM +0200, Jani Nikula wrote:
> On Sun, 08 Nov 2015, Damien Lespiau wrote:
> > There are two new patchwork projects then:
> >
> > http://patchwork.freedesktop.org/project/intel-gpu-tools/
> > http://patchwork.freedesktop.org/project
On Mon, Nov 09, 2015 at 01:21:33PM +0200, Jani Nikula wrote:
> On Mon, 09 Nov 2015, Damien Lespiau wrote:
> > That would work for us, but not in the general case (for other
> > projects). I was thinking of using some kind of other heuristic, eg.
> > (subject, commit message,
On Fri, Nov 06, 2015 at 04:42:10PM +0200, Mika Kuoppala wrote:
> Add Skylake Intel Graphics GT4 PCI IDs.
>
> Signed-off-by: Mika Kuoppala
Reviewed-by: Damien Lespiau
--
Damien
> ---
> lib/intel_chipset.h | 12 +++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
for review and
make patchwork understand it. For instance, being able to review
several patches in one go could be done with:
Patches 1-3,6: Reviewed-by: Damien Lespiau damien.lesp...@intel.com
(See: https://github.com/dlespiau/patchwork/issues/27)
> Is suggesting deprecating the use of emai
On Thu, Nov 19, 2015 at 12:44:07PM +0200, Jani Nikula wrote:
> On Wed, 18 Nov 2015, Daniel Vetter wrote:
> > On Sun, Nov 08, 2015 at 12:31:36AM +0000, Damien Lespiau wrote:
> >> Hi all,
> >>
> >> I've added a feature to sort the patches sent to intel
On Wed, Jan 06, 2016 at 12:08:36PM +, Michel Thierry wrote:
> My kbl stopped working because of this.
>
> Fixes regression from
> commit 2f693e28b8df69f67beced5e18bb2b91c2bfcec2
> Author: Damien Lespiau
> Date: Wed Nov 4 19:24:12 2015 +0200
> drm/i915: Make turnin
Syncs with:
commit 15620206ae87ba9643ffa6f5ddb5471be7192006
Author: Mika Kuoppala
Date: Fri Nov 6 14:11:16 2015 +0200
drm/i915/skl: Add SKL GT4 PCI IDs
Signed-off-by: Damien Lespiau
---
src/i915_pciids.h | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff
On Wed, Jan 13, 2016 at 04:46:43PM +0200, Gabriel Feceoru wrote:
> Starting with Gen7 (IVB) Display PipeC can be fused off on some production
> parts. When disabled, display hardware will prevent the pipe C register bit
> from being set to 1.
>
> Fixed by adjusting pipe_count to reflect this.
The
ed to load DMC firmware
> [https://01.org/linuxgraphics/intel-linux-graphics-firmwares], disabling
> runtime power management.
>
> Signed-off-by: Chris Wilson
> Cc: Damien Lespiau
> Cc: Imre Deak
> Cc: Sunil Kamath
> Cc: Daniel Vetter
> Cc: Animesh Manna
On Thu, Jan 14, 2016 at 11:30:31PM +0800, kbuild test robot wrote:
> Hi Mahesh,
>
> [auto build test ERROR on drm-intel/for-linux-next]
> [also build test ERROR on next-20160114]
> [cannot apply to v4.4]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improving
On Fri, Jan 15, 2016 at 03:49:00PM +, Morton, Derek J wrote:
> Can this be merged so IGT on Android builds? No one has raise any
> objections since Monday about this patch.
Merged, thanks for the patch.
--
Damien
___
Intel-gfx mailing list
Intel-gf
On Thu, Jan 21, 2016 at 08:14:34PM +, Zanoni, Paulo R wrote:
> Em Ter, 2016-01-19 às 14:50 +, Patchwork escreveu:
> > == Summary ==
> >
> > Built on 20c388faff9d8c41ab27e825c685526561b892a2 drm-intel-nightly:
> > 2016y-01m-19d-13h-31m-46s UTC integration manifest
> >
> > Test kms_flip:
>
We are reading at most sizeof(data) bytes, but then data may not contain
a terminating '\0', at least in theory, so strstr() may overflow the
stack allocated array.
Make sure that data always contains at least one '\0'.
Signed-off-by: Damien Lespiau
---
xf86drm.c | 3 ++
On Fri, Jan 22, 2016 at 04:48:05PM +0200, Ville Syrjälä wrote:
> On Fri, Jan 22, 2016 at 12:51:23PM +0000, Damien Lespiau wrote:
> > We are reading at most sizeof(data) bytes, but then data may not contain
> > a terminating '\0', at least in theory, so strstr() may overflo
On Wed, Jan 27, 2016 at 09:16:24AM -0800, Joe Perches wrote:
> On Wed, 2016-01-27 at 16:47 +, Patchwork wrote:
> > == Summary ==
> >
> > Built on 5ae916607e3e12ba18c848dff42baaad5b118c4b drm-intel-nightly:
> > 2016y-01m-27d-12h-48m-36s UTC integration manifest
>
> I've no idea what this mean
t; v2: Don't store the pipe disabled mask in device info (Damien)
>
> v3: Don't check FUSE_STRAP register for pipe c disabled
>
> Cc: Damien Lespiau
> Signed-off-by: Patrik Jakobsson
Reviewed-by: Damien Lespiau
(listing the valid cases would have made things simpler?)
(queueing work while holding
> the spinlock) is intentional as it makes a subsequent patch a bit nicer.
> The change should also only effect HSW platforms.
>
> Based on patches from:
> CC: Haihao Xiang
> Signed-off-by: Ben Widawsky
Reviewe
On Sat, Apr 27, 2013 at 05:59:20PM -0700, Ben Widawsky wrote:
> @@ -2720,12 +2720,12 @@ static void gen6_enable_rps(struct drm_device *dev)
> gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
>
> /* requires MSI enabled */
> - I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVE
On Sat, Apr 27, 2013 at 05:59:21PM -0700, Ben Widawsky wrote:
> Signed-off-by: Ben Widawsky
> ---
> drivers/gpu/drm/i915/i915_irq.c | 27 ++-
> 1 file changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq
On Sat, Apr 27, 2013 at 05:59:22PM -0700, Ben Widawsky wrote:
> Signed-off-by: Ben Widawsky
> ---
> drivers/gpu/drm/i915/i915_irq.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 21b09cd..4a1b7f5 100644
> --
On Sat, Apr 27, 2013 at 05:59:23PM -0700, Ben Widawsky wrote:
> It's overkill on older gens, but it's useful for newer gens.
>
> Signed-off-by: Ben Widawsky
Reviewed-by: Damien Lespiau
--
Damien
___
Intel-gfx mai
ed-off-by: Ben Widawsky
With or without the naming biskeshed below:
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/i915_irq.c | 58 +-
> drivers/gpu/drm/i915/i915_reg.h | 101
> ++--
> drivers/
On Sat, Apr 27, 2013 at 05:59:25PM -0700, Ben Widawsky wrote:
> v2: Use the correct lock to protect PM interrupt regs, this was
> accidentally lost from earlier (Haihao)
> Fix return types (Ben)
>
> CC: Xiang, Haihao
> Signed-off-by: Ben Widawsky
> ---
Reviewed-by: Damien
> Signed-off-by: Ben Widawsky
With or without the bikeshed below:
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/i915_irq.c | 26 --
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_ringbuf
On Sat, Apr 27, 2013 at 05:59:27PM -0700, Ben Widawsky wrote:
> From: "Xiang, Haihao"
>
> v2 (Ben): s/hsw/hws
>
> Signed-off-by: Xiang, Haihao
> [Order changed, and modified by]
> Signed-off-by: Ben Widawsky
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 13 +
> 1 file changed, 13
On Sat, Apr 27, 2013 at 05:59:28PM -0700, Ben Widawsky wrote:
> From: "Xiang, Haihao"
>
> A user can run batchbuffer via VEBOX ring.
>
> Signed-off-by: Xiang, Haihao
> [Order changed by]
> Signed-off-by: Ben Widawsky
Reviewed-by: Damien Lespiau
--
Damien
solved by]
> Signed-off-by: Ben Widawsky
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/i915_dma.c | 3 +++
> include/uapi/drm/i915_drm.h | 2 +-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/driv
On Tue, May 28, 2013 at 11:50:46AM -0700, Ben Widawsky wrote:
> > > - if (gt_iir & (GT_GEN6_BLT_CS_ERROR_INTERRUPT |
> > > - GT_GEN6_BSD_CS_ERROR_INTERRUPT |
> > > - GT_RENDER_CS_ERROR_INTERRUPT)) {
> > > + if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
> > > +
t; semaphore mailbox interactions by using the ringname in the semaphore
> data structures.
>
> This patch should have no functional impact.
>
> v2: The English parts (as opposed to register names) of the comments
> were reversed. (Damien)
>
> Signed-off-by: Ben Widawsky
Revi
d have no
> behavioral changes.
>
> Signed-off-by: Ben Widawsky
Reviewed-by: Damien Lespiau
--
Damien
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
ix the English parts of clarification (again, register names were
> right, text was reversed) (Damien)
> Restore the still valid invariant. (Damien)
> The bsd semaphore register should be MI_SEMAPHORE_SYNC_VVE (Damien)
>
> Signed-off-by: Ben Widawsky
Re
On Tue, May 28, 2013 at 07:22:25PM -0700, Ben Widawsky wrote:
> v2: Add new PCH_NOP check (Damien)
> Add SDEIMR comment (Damien)
>
> Signed-off-by: Ben Widawsky
Reviewed-by: Damien Lespiau
--
Damien
___
Intel-gfx mailing li
der changed, and modified by]
> CC: "Bloomfield, Jon"
> Signed-off-by: Ben Widawsky
> ---
Reviewed-by: Damien Lespiau
--
Damien
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
ps
> disable.
> expanded commit message
>
> v4: v3 was based off the wrong branch
>
> v5: Added the setting of PMIMR because of previous patch update
>
> CC: Chris Wilson
> Signed-off-by: Ben Widawsky
> ---
Reviewed-by: Damien Lespiau
--
Damien
> dr
t, we don't want to do
> anything about it, so we simply ignore it. Since writing the original
> assertion, the code has changed quite a bit, and I believe removing this
> assertion is perfectly safe.
>
> Signed-off-by: Ben Widawsky
Reviewed-by: Damien Lespiau
--
Damien
_
that we can address later if deemed necessary):
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/i915_dma.c |6 +++
> drivers/gpu/drm/i915/i915_drv.h | 12 +
> drivers/gpu/drm/i915/intel_drv.h |4 ++
&g
ic pm handler for hsw+
>
> See
>
> commit 58bf8062d0b293b8e1028e5b0342082002886bd4
> Author: Daniel Vetter
> Date: Thu Jun 21 14:55:22 2012 +0200
>
> drm/i915: rip out the PM_IIR WARN
>
> for the extensive reasoning why the WARN is bogus.
>
> Cc: Damien Le
Also intel_iosf_read() does not exist, and would need a bit more
arguments.
Signed-off-by: Damien Lespiau
---
tools/intel_iosf_read.c | 70 -
1 file changed, 70 deletions(-)
delete mode 100644 tools/intel_iosf_read.c
diff --git a/tools
This tool only supports ILK. I take the fact that nobody has felt the
need to update it for later platforms as a sign it's not very useful.
Signed-off-by: Damien Lespiau
---
Android.mk | 33 --
tools/.gitignore | 1 -
tools/Makefi
Signed-off-by: Damien Lespiau
---
lib/instdone.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/instdone.c b/lib/instdone.c
index 4679a9c..ad5c62f 100644
--- a/lib/instdone.c
+++ b/lib/instdone.c
@@ -37,6 +37,7 @@ int num_instdone_bits = 0;
static void
add_instdone_bit(uint32_t reg
XXX: more detailed commit message
---
lib/Makefile.am| 9 +-
lib/intel_dpio.c | 94 -
lib/intel_gpu_tools.h | 15 ++
lib/intel_iosf.c | 85
lib
I played a bit with this as that's something thas has been floating around for
a bit and could be used for:
- unit testing kernel functions (eg. PLL computations)
- reuse off some code (intel_reg.h, sideband, device_info struct, ...)
- Ville wanted to fuzzy test the EDID code (and has a bran
As it's usual to do, don't leave it in the middle of valid cases.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 63996a
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 47a9de0..d146993 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915
On Wed, Jun 05, 2013 at 02:28:50PM +0300, Jani Nikula wrote:
> On Wed, 05 Jun 2013, Damien Lespiau wrote:
> > As it's usual to do, don't leave it in the middle of valid cases.
> >
> > Signed-off-by: Damien Lespiau
> > ---
> > drivers/gpu/drm/i915
Hi,
Patches 1-7: Some comments to signal the Wa we're implementing for the next
person that goes through the list.
Patch 8: Random detail when reading that code
Patch 9-10: Two new workarounds. I don't remember at all the discussions around
RC6+ on GEN6+, but there's definitely a workaround that
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_pm.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 57e99b1..eb3c2c4 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
We also wait for that blank on other platforms but the w/a doesn't
apply there. Not an issue at all.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_pm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_pm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index eb3c2c4..2eb1846 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0e72da6..ce14594 100644
--- a/drivers/gpu/drm/i915
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_display.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 827d7ca..9e0d69c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index ce14594..009e616 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_ddi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 486c46b..bc7dd9a 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
intel_enable_rc6() is used to check if we can compute the RC6 residency
in the sysfs code. Disable this for platforms older than Ironlake.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_pm.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b
Let's disable RC6+ by default. We still leave the possibility to
override this with the module parameter.
I've also shuffled the code around so we always log if we have RC6
enabled or disabled.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_pm.c | 25 +-
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_gem.c | 9 +
drivers/gpu/drm/i915/i915_reg.h | 9 +++--
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 58048d4..187a9a4 100644
--- a
On Fri, Jun 07, 2013 at 05:51:57PM +0100, Chris Wilson wrote:
> On Fri, Jun 07, 2013 at 05:41:16PM +0100, Damien Lespiau wrote:
>
> During GFX reset? This patch looks a little permanent to me, so please
> explain.
The description of the bits is "Enable msg channel blockreq/ack
m
On Fri, Jun 07, 2013 at 05:59:45PM +0100, Damien Lespiau wrote:
> I could also test it I guess...
Well, it does seem to behave. The confusion may be from the WA name, the
field is called "Block Msg channel during resets". This is still mostly
guess work though
It's now intel_sdvo_get_capabilities().
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_sdvo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index 7068195..221d415 100644
--- a/driver
In case of intel_sdvo_get_active_outputs() failing, we end up reading a
value from the stack.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_sdvo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915
This makes, arguably, the condition on state easier to read.
Suggested-by: Chris Wilson
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_drv.c | 6 +++---
drivers/gpu/drm/i915/intel_fb.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915
omain", for lack of a
better wording. And so the limits follow that.
Otherwise, the patch looks good:
Reviewed-by: Damien Lespiau
--
Damien
>
> v2: Extract the common i8xx m/n limits into a single define. This was
> motivated by the mess for the g4x limits where they'
On Tue, May 21, 2013 at 09:54:54PM +0200, Daniel Vetter wrote:
> Again the same confusion that our code expects m1/m2 in register values.
> This time around with the added fun that many of the existing values
> have been all off by a bit in different directions. Hence extract a
> common #define.
>
, and the register value based m limits look sane enough.
- n can vary between 2 and 6, but we declare the 3-6 as limits.
- p1 seems to be able to go up to 9
- the m upper limit seems a bit big, but the docs are a bit shy on
that values for pnv.
Otherwise, the change itself seems good
#x27;s believe this spreadsheet, it's more convincing that
the pure hw limits. With that:
Reviewed-by: Damien Lespiau
--
Damien
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On Tue, May 21, 2013 at 09:54:56PM +0200, Daniel Vetter wrote:
> Now this was broken in pretty fundamental ways:
> - M1/M2 have been consistently off by 2 and used doc values instead of
> the two less registers values our code expects.
> - M/N limits often were too small by seemingly arbitrary am
On Sun, May 26, 2013 at 05:48:15PM +0200, Daniel Vetter wrote:
> We can get at this easily through intel_crtc->config now.
>
> v2: Drop more stuff gcc spotted.
>
> v3: Drop even more stuff gcc spotted.
>
> Signed-off-by: Daniel Vetter
Rev
On Tue, May 21, 2013 at 09:54:59PM +0200, Daniel Vetter wrote:
> Panel fitters on ivb/hsw are not created equal since not all of them
> support the new high-quality upscaling mode. To offset this the hw
> allows us to freely assign the pfits to pipes.
>
> Since our code currently doesn't support t
On Wed, Jun 05, 2013 at 01:34:16PM +0200, Daniel Vetter wrote:
> Currently still with an empty register state, this will follow in a
> next step. This one here just creates the new vfunc and uses it for
> cross-checking, initial state takeover and the dpll assert function.
>
> And add a FIXME for
On Wed, Jun 05, 2013 at 01:34:17PM +0200, Daniel Vetter wrote:
> Simply grew too big. This also makes the fixup and restore logic in
> setup_hw_state stand out a bit more clearly.
>
> Signed-off-by: Daniel Vetter
Reviewed-by: Damien Lespiau
--
Damien
> ---
> dr
On Wed, Jun 05, 2013 at 01:34:18PM +0200, Daniel Vetter wrote:
> Simply grew too large and neede to be split up into parts.
>
> Signed-off-by: Daniel Vetter
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/intel_display.c | 44
> +++
> Signed-off-by: Daniel Vetter
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_dis
On Wed, Jun 12, 2013 at 04:39:14PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 12, 2013 at 02:31:23PM +0100, Damien Lespiau wrote:
> > On Wed, Jun 05, 2013 at 01:34:16PM +0200, Daniel Vetter wrote:
> > > @@ -8621,6 +8657,17 @@ static void intel_cpu_pll_init(struct drm_
cross-check code will get angry.
>
> v3: Don't forget to read the pch pll state in the crtc get_pipe_config
> function for ibx/ilk platforms.
>
> Signed-off-by: Daniel Vetter
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i
pll code in line with the i8xx/i9xx pll code. Or at least improves
> matters a lot.
>
> This should fix sdvo on ilk-ivb for low-res modes.
>
> Signed-off-by: Daniel Vetter
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 ++--
> 1 f
Vetter
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/intel_display.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 334f86a..4d
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