[Intel-gfx] [PATCH 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

2015-11-26 Thread Deepak M
For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. v2: Moving the comment to intel_dsi.h(Jani) Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu

[Intel-gfx] [PATCH 2/2] drm/i915: CABC support for backlight control

2015-11-26 Thread Deepak M
Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_dsi.c | 17 +++- drivers/gpu/drm/i915/intel_dsi.h | 4 + drivers/gpu/drm/i915/intel_dsi_cabc.c | 179

[Intel-gfx] [MIPI SEQ PARSING v3 03/13] drm/i915: Add Intel opregion mailbox 5 structure

2015-11-30 Thread Deepak M
Mailbox 5 is BIOS to Driver Notification mailbox is intended to support BIOS to Driver event notification or data storage for BIOS to Driver data synchronization purpose. Mailbox 5 is the extension of mailbox 3. Cc: Jani Nikula Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [MIPI SEQ PARSING v3 02/13] drm/i915: Updating asle structure with new fields

2015-11-30 Thread Deepak M
v3: rebase Cc: Jani Nikula Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_opregion.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c index e362a30..64efedf 100644 --- a/drivers/gpu/drm

[Intel-gfx] [MIPI SEQ PARSING v3 01/13] drm/i915: Adding the parsing logic for the i2c element

2015-11-30 Thread Deepak M
: Deepak M --- drivers/gpu/drm/i915/intel_bios.c | 6 +++ drivers/gpu/drm/i915/intel_bios.h | 1 + drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 60 ++ 3 files changed, 67 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915

[Intel-gfx] [MIPI SEQ PARSING v3 07/13] drm/i915: Added support the v3 mipi sequence block

2015-11-30 Thread Deepak M
. Cc: Jani Nikula Signed-off-by: vkorjani Signed-off-by: Deepak M --- Addressed most of the minor comments in this version, except the one where Jani had suggested to change the logic in the goto_next_sequence(), Thought of handling this as a new patch after this series. http

[Intel-gfx] [MIPI SEQ PARSING v3 06/13] drm/i915: Parsing VBT if size of VBT exceeds 6KB

2015-11-30 Thread Deepak M
memory unmap in intel_opregion_fini -removed the new file created for opregion macro`s Cc: Jani Nikula Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_opregion.c | 33 +++-- 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [MIPI SEQ PARSING v3 09/13] drm/i915: Added the generic gpio sequence support and gpio table

2015-11-30 Thread Deepak M
The generic gpio is sequence is parsed from the VBT and the GPIO table is updated with the North core, South core and SUS core elements. v2: Move changes in sideband.c file to new patch(Jani), rebase v3: Moved the Macro`s to intel_dsi_panel_vbt.c (Jani) Cc: Jani Nikula Signed-off-by: Deepak M

[Intel-gfx] [MIPI SEQ PARSING v3 08/13] drm/i915: Extend gpio read/write to other cores

2015-11-30 Thread Deepak M
Adding a argument to the gpio read/write functions which accepts the block name. v2: rebase v3: rebase Cc: Jani Nikula Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h| 5 +++-- drivers/gpu/drm/i915/i915_reg.h| 5 + drivers/gpu/drm/i915

[Intel-gfx] [MIPI SEQ PARSING v3 00/13] Patches to support the version 3 of MIPI sequence in VBT.

2015-11-30 Thread Deepak M
comments. Deepak M (8): drm/i915: Updating asle structure with new fields drm/i915: Add Intel opregion mailbox 5 structure drm/i915: Do opregion VBT validation during opregion setup drm/i915: Add debug entry to get the opregion VBT blob drm/i915: Parsing VBT if size of VBT exceeds 6KB drm/i915

[Intel-gfx] [MIPI SEQ PARSING v3 05/13] drm/i915: Add debug entry to get the opregion VBT blob

2015-11-30 Thread Deepak M
VBT offset. Cc: Jani Nikula Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_debugfs.c | 29 + drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_bios.c | 1 + drivers/gpu/drm/i915/intel_opregion.c | 3 +++ 4 files changed, 34

[Intel-gfx] [MIPI SEQ PARSING v3 04/13] drm/i915: Do opregion VBT validation during opregion setup

2015-11-30 Thread Deepak M
Calling the validate_vbt before assiging the opregion vbt blob. Size of the VBT blob cant be more than 6KB when VBT is present in mailbox 4. Cc: Jani Nikula Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/intel_bios.c | 43

[Intel-gfx] [PATCH 1/3] drm/i915: Add DPI FIFO empty status check

2015-12-04 Thread Deepak M
From: Gaurav K Singh After sending SHUTDOWN or TURN ON packet,check the DPI FIFO empty status. Signed-off-by: Gaurav K Singh --- drivers/gpu/drm/i915/intel_dsi.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index

[Intel-gfx] [PATCH 2/3] drm/i915: Correct the Ref clock value for BXT

2015-12-04 Thread Deepak M
The reference clock for BXT is 19.2 MHz not 19.5 MHz, updating the correct value here. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8bd2699

[Intel-gfx] [PATCH 3/3] drm/i915: Use the ceil value for the additional clk divider

2015-12-04 Thread Deepak M
Additional clock value divider should use the ceil value of the calulation to get the correct divider value. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_dsi_pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add DPI FIFO empty status check

2015-12-04 Thread Deepak, M
> -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Friday, December 4, 2015 3:20 PM > To: Deepak, M > Cc: intel-gfx@lists.freedesktop.org; Gaurav K Singh > > Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add DPI FIFO empty s

[Intel-gfx] [PATCH] drm/i915: Add DPI FIFO empty status check

2015-12-04 Thread Deepak M
From: Gaurav K Singh Before sending TURN ON packet,check the DPI FIFO empty status. v2: Change in commit message Checking for FIFO empty only during TURN ON packet. Signed-off-by: Gaurav K Singh Signed-off-by: Deepak M --- Got to know about the patch where they are removing this DPI

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Correct the Ref clock value for BXT

2015-12-04 Thread Deepak, M
> -Original Message- > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel > Vetter > Sent: Friday, December 4, 2015 9:52 PM > To: Ville Syrjälä > Cc: Deepak, M ; intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915:

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Use the ceil value for the additional clk divider

2015-12-04 Thread Deepak, M
> -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Friday, December 4, 2015 5:22 PM > To: Deepak, M > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915: Use the ceil value for the > additiona

[Intel-gfx] [PATCH] drm/i915: Add DPI FIFO empty status check

2015-12-08 Thread Deepak M
From: Gaurav K Singh Before sending TURN ON packet,check the DPI FIFO empty status. v2: Change in commit message Checking for FIFO empty only during TURN ON packet. v3: Adding a new function for DPI FIFO empty check Signed-off-by: Gaurav K Singh Signed-off-by: Deepak M --- drivers/gpu

[Intel-gfx] [BXT MIPI PATCH 1/2] drm/i915: Set the Z inversion overlap field for BXT

2015-12-08 Thread Deepak M
For broxton dual link Z-inversion overlap field is present in MIPI_CTRL register unlike the other platforms, hence setting the same in this patch. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h | 4 drivers/gpu/drm/i915/intel_dsi.c | 16 +--- 2 files changed, 17

[Intel-gfx] [BXT MIPI PATCH 2/2] drm/i915: dual link pipe selection for bxt

2015-12-08 Thread Deepak M
Pipe is assigned based on the port, but it should be based on current crtc. Correcting the same in this patch. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_dsi.c | 23 ++- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915: dual link pipe selection for bxt

2015-12-09 Thread Deepak M
Pipe is assigned based on the port, but it should be based on current crtc. Correcting the same in this patch. v2: Use macro BXT_PIPE_SELECT(pipe) (Daniel) Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h | 4 +--- drivers/gpu/drm/i915/intel_dsi.c | 15 +++ 2 files

Re: [Intel-gfx] [BXT MIPI PATCH 2/2] drm/i915: dual link pipe selection for bxt

2015-12-09 Thread Deepak, M
> -Original Message- > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel > Vetter > Sent: Wednesday, December 9, 2015 1:50 PM > To: Deepak, M > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [BXT MIPI PATCH 2/2] drm/i915: dual

[Intel-gfx] [PATCH] drm/i915: Parsing VBT if size of VBT exceeds 6KB

2015-12-13 Thread Deepak M
memory unmap in intel_opregion_fini -removed the new file created for opregion macro`s v4: Moving the vbt assignment after the opregion fields are assigned Cc: Mika Kahola Cc: Jani Nikula Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_opregion.c | 47

[Intel-gfx] [PATCH] drm/i915: Set the Z inversion overlap field

2016-11-01 Thread Deepak M
Dual link Z-inversion overlap field is present in MIPI_CTRL register unlike the older platforms, hence setting the same in this patch. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_dsi.c | 17 + 2 files changed, 15 insertions

[Intel-gfx] [APL PO PATCH] drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards

2016-02-02 Thread Deepak M
The MIPI clock calculations for the addtional clock are revised from B0 stepping onwards, the bit definitions have changed compared to old stepping. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h | 104 +-- drivers/gpu/drm/i915/intel_dsi_pll.c

[Intel-gfx] [PATCH] drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards

2016-02-02 Thread Deepak M
The MIPI clock calculations for the addtional clock are revised from B0 stepping onwards, the bit definitions have changed compared to old stepping. v2: Fixing compilation warning. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h | 104

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards

2016-02-04 Thread Deepak, M
> -Original Message- > From: Jani Nikula [mailto:jani.nik...@linux.intel.com] > Sent: Thursday, February 4, 2016 6:29 PM > To: Deepak, M ; intel-gfx@lists.freedesktop.org > Cc: Deepak, M > Subject: Re: [Intel-gfx] [PATCH] drm/i915/bxt: Additional MIPI clock divider

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards

2016-02-04 Thread Deepak, M
> -Original Message- > From: Jani Nikula [mailto:jani.nik...@linux.intel.com] > Sent: Thursday, February 4, 2016 7:28 PM > To: Deepak, M ; intel-gfx@lists.freedesktop.org > Subject: RE: [Intel-gfx] [PATCH] drm/i915/bxt: Additional MIPI clock divider > form B0 stepping o

[Intel-gfx] [PATCH] drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards

2016-02-15 Thread Deepak M
The MIPI clock calculations for the addtional clock are revised from B0 stepping onwards, the bit definitions have changed compared to old stepping. v2: Fixing compilation warning. v3: Retained the old Macros (Jani) Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h | 96

[Intel-gfx] [Generic GPIO patch 2/3] drm/i915: GPIO for CHT generic MIPI

2016-02-19 Thread Deepak M
From: Yogesh Mohan Marimuthu The GPIO configuration and register offsets are different from baytrail for cherrytrail. Port the gpio programming accordingly for cherrytrail in this patch. Cc: Jani Nikula Signed-off-by: Yogesh Mohan Marimuthu Signed-off-by: Deepak M --- drivers/gpu/drm/i915

[Intel-gfx] [Generic GPIO patch 3/3] drm/i915: BXT GPIO support for backlight and panel control

2016-02-19 Thread Deepak M
From: Uma Shankar Added the BXT GPIO pin configuration and programming logic for backlight and panel control. Cc: Jani Nikula Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 46 ++ 1 file changed, 46 insertions(+) diff --git a/drivers/g

[Intel-gfx] [Generic GPIO patch 1/3] drm/i915/dsi: Added the generic gpio sequence support and gpio table

2016-02-19 Thread Deepak M
- don't return null on errors v4 by Deepak - rebase - prefixed the VLV_ to all the GPIO macros Signed-off-by: Deepak M Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_reg.h| 6 + drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 606 ++--- 2 files ch

[Intel-gfx] [PATCH 2/2] drm/i915: Add functions to execute the new sequences from VBT

2016-02-19 Thread Deepak M
-off-by: Deepak M --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 48 ++ 1 file changed, 48 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c index c6e18fe..db8e210 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 1/2] drm: Add few more wrapper functions for drm panel

2016-02-19 Thread Deepak M
Currently there are few pair of functions which are called during the panel enable/disable sequence. To improve the granularity, adding few more wrapper functions so that the functions are more specific on what they are doing. Cc: Jani Nikula Signed-off-by: Deepak M Signed-off-by: Gaurav K

Re: [Intel-gfx] [Generic GPIO patch 1/3] drm/i915/dsi: Added the generic gpio sequence support and gpio table

2016-02-19 Thread Deepak, M
> -Original Message- > From: Nikula, Jani > Sent: Friday, February 19, 2016 6:51 PM > To: Deepak, M ; intel-gfx@lists.freedesktop.org > Cc: Deepak, M > Subject: Re: [Generic GPIO patch 1/3] drm/i915/dsi: Added the generic gpio > sequence support and gpio table >

[Intel-gfx] [PATCH] drm/i915/dsi: Added the generic gpio sequence support and gpio table

2016-02-19 Thread Deepak M
- don't return null on errors v4 by Deepak - rebase - prefixed the VLV_ to all the GPIO macros v5 by deepak - readded the checks which were removed in the earlier patchset (Jani) Signed-off-by: Deepak M Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_reg.h| 6 + dr

[Intel-gfx] [PATCH] drm/i915: Get the i2c bus number from the ACPI

2016-02-19 Thread Deepak M
Currently for executing the i2c MIPI sequence, we are relaying on the i2c bus bunmber which is specified in the VBT. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_dma.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 7 ++ drivers/gpu/drm/i915/intel_acpi.c | 49

Re: [Intel-gfx] [PATCH] drm/i915: Get the i2c bus number from the ACPI

2016-02-19 Thread Deepak, M
This patch reads the i2c bus number from the _CRS table of the display module of the ACPI, which will be updated by the BIOS with the i2c info which is used for this module. > -Original Message- > From: Deepak, M > Sent: Friday, February 19, 2016 7:26 PM > T

Re: [Intel-gfx] [PATCH] drm/i915: Get the i2c bus number from the ACPI

2016-02-19 Thread Deepak, M
> -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Friday, February 19, 2016 7:38 PM > To: Deepak, M > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915: Get the i2c bus number from the > ACPI >

[Intel-gfx] [GPIO PATCH 1/2] drm/i915: GPIO for CHT generic MIPI

2016-02-22 Thread Deepak M
Marimuthu Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h| 20 ++ drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 107 ++--- 2 files changed, 102 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[Intel-gfx] [GPIO PATCH 2/2] drm/i915: GPIO for BXT generic MIPI

2016-02-22 Thread Deepak M
From: Uma Shankar Added the BXT GPIO pin configuration and programming logic for backlight and panel control. v2 by Deepak - Added the GPIO table got BXT. - Added gpio_free Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Uma Shankar Signed-off-by: Deepak M --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 2/2] drm/i915: GPIO for CHT generic MIPI

2016-02-24 Thread Deepak M
: Jani Nikula Signed-off-by: Yogesh Mohan Marimuthu Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 123 +++-- 1 file changed, 98 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 1/2] drm/i915/dsi: Added the generic gpio sequence support and gpio table

2016-02-24 Thread Deepak M
- don't return null on errors v4 by Deepak - rebase - prefixed the VLV_ to all the GPIO macros v5 by deepak - readded the checks which were removed in the earlier patchset (Jani) Cc: Ville Syrjälä Signed-off-by: Deepak M Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_

Re: [Intel-gfx] [PATCH 2/2] drm/i915: GPIO for CHT generic MIPI

2016-02-29 Thread Deepak, M
> -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Thursday, February 25, 2016 9:07 PM > To: Deepak, M > Cc: intel-gfx@lists.freedesktop.org; Mohan Marimuthu, Yogesh > ; Nikula, Jani > > Subject: Re: [PATCH 2/2] drm/i915: G

Re: [Intel-gfx] [PATCH 2/2] drm/i915: GPIO for CHT generic MIPI

2016-02-29 Thread Deepak, M
> -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Monday, February 29, 2016 7:20 PM > To: Deepak, M > Cc: intel-gfx@lists.freedesktop.org; Mohan Marimuthu, Yogesh > ; Nikula, Jani > > Subject: Re: [PATCH 2/2] drm/i915: G

[Intel-gfx] [PATCH] drm/i915: GPIO for BXT generic MIPI

2016-03-02 Thread Deepak M
Shankar Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_dsi.c | 6 + drivers/gpu/drm/i915/intel_dsi.h | 2 +- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 686 + 3 files changed, 693 insertions(+), 1 deletion(-) diff --git a/drivers/gpu

Re: [Intel-gfx] [PATCH] drm/i915: GPIO for BXT generic MIPI

2016-03-02 Thread Deepak, M
Attached is the GPIO table for the BXT, most of the GPIO`s numberings are sequential except few of them in the northwest core because of which complete table is added in the file. > -Original Message- > From: Deepak, M > Sent: Wednesday, March 2, 2016 8:14 PM > T

[Intel-gfx] [CABC PATCH 0/2] CABC patch list

2016-03-08 Thread Deepak M
Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Deepak M (2): drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT drm/i915: CABC support for backlight control drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915

[Intel-gfx] [CABC PATCH 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

2016-03-08 Thread Deepak M
For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. v2: Moving the comment to intel_dsi.h(Jani) Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu

[Intel-gfx] [CABC PATCH 2/2] drm/i915: CABC support for backlight control

2016-03-08 Thread Deepak M
Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_dsi.c | 17 +++- drivers/gpu/drm/i915/intel_dsi.h | 4 + drivers/gpu/drm/i915/intel_dsi_cabc.c | 179

[Intel-gfx] [PATCH 2/2] drm/i915: CABC support for backlight control

2016-03-08 Thread Deepak M
Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_dsi.c | 17 +++- drivers/gpu/drm/i915/intel_dsi.h | 4 + drivers/gpu/drm/i915/intel_dsi_cabc.c | 179

[Intel-gfx] [PATCH 1/2] drm/i915: Get the i2c bus number from the ACPI

2016-03-11 Thread Deepak M
: Deepak M --- drivers/gpu/drm/i915/i915_dma.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 11 drivers/gpu/drm/i915/intel_acpi.c | 59 +++ 3 files changed, 72 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c

[Intel-gfx] [PATCH 2/2] drm/i915: Adding the parsing logic for the i2c element

2016-03-11 Thread Deepak M
ce id. Cc: Ville Syrjälä Signed-off-by: vkorjani Signed-off-by: Deepak M Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 84 -- 1 file changed, 81 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/dr

[Intel-gfx] [PATCH 2/2] drm/i915: Adding the parsing logic for the i2c element

2016-03-11 Thread Deepak M
d-off-by: vkorjani Signed-off-by: Deepak M Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 84 -- 1 file changed, 81 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915: GPIO for BXT generic MIPI

2016-03-11 Thread Deepak M
Shankar Signed-off-by: Deepak M --- GPIO mapping table can be found in the below link: https://drive.google.com/drive/folders/0BxSYm2johowAaE94S0ZvbE1wTG8 drivers/gpu/drm/i915/intel_dsi.c | 6 + drivers/gpu/drm/i915/intel_dsi.h | 2 +- drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915: Add ddb size field to device info structure

2016-09-13 Thread Deepak M
Adding the ddb size into the devide info will avoid platform checks while computing wm. Suggested-by: Ander Conselvan de Oliveira Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_pci.c | 5 + drivers/gpu/drm/i915/intel_pm.c | 13

[Intel-gfx] [PATCH] drm/i915: Add ddb size field to device info structure

2016-09-14 Thread Deepak M
Adding the ddb size into the devide info will avoid platform checks while computing wm. v2: Added comment and WARN_ON if ddb size is zero.(Jani) Suggested-by: Ander Conselvan de Oliveira Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_pci.c | 5

[Intel-gfx] [PATCH] drm/i915: Add ddb size field to device info structure

2016-09-15 Thread Deepak M
Adding the ddb size into the devide info will avoid platform checks while computing wm. v2: Added comment and WARN_ON if ddb size is zero.(Jani) v3: Added WARN_ON at the right place.(Jani) Suggested-by: Ander Conselvan de Oliveira Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [MIPI CABC 0/2] CABC patch list

2016-03-21 Thread Deepak M
: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Deepak M (2): drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT drm/i915: CABC support for backlight control drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915

[Intel-gfx] [MIPI CABC 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

2016-03-21 Thread Deepak M
For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. v2: Moving the comment to intel_dsi.h(Jani) Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu

[Intel-gfx] [MIPI CABC 2/2] drm/i915: CABC support for backlight control

2016-03-21 Thread Deepak M
: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_dsi.c | 19 +++- drivers/gpu/drm/i915/intel_dsi.h | 4 + drivers/gpu/drm/i915/intel_dsi_cabc.c | 179

Re: [Intel-gfx] [MIPI CABC 2/2] drm/i915: CABC support for backlight control

2016-03-23 Thread Deepak, M
> -Original Message- > From: Nikula, Jani > Sent: Tuesday, March 22, 2016 7:19 PM > To: Deepak, M ; intel-gfx@lists.freedesktop.org > Cc: Deepak, M ; Vetter, Daniel > ; Adebisi, YetundeX > > Subject: Re: [MIPI CABC 2/2] drm/i915: CABC support for backlight con

[Intel-gfx] [PATCH 2/2] drm/i915: CABC support for backlight control

2016-03-24 Thread Deepak M
mipi_dsi_dcs_write() instead of mipi_dsi_dcs_write_buffer() (Jani) Move DCS macro`s to include/video/mipi_display.h (Jani) Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- The DCS command macro`s are defined in the patch which is posted in the dri-devel list. drivers

[Intel-gfx] [PATCH 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

2016-03-24 Thread Deepak M
For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. v2: Moving the comment to intel_dsi.h(Jani) Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu

[Intel-gfx] [PATCH 2/3] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

2016-03-24 Thread Deepak M
For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. v2: Moving the comment to intel_dsi.h(Jani) Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu

Re: [Intel-gfx] [PATCH 2/2] drm/i915: CABC support for backlight control

2016-03-24 Thread Deepak, M
> -Original Message- > From: Nikula, Jani > Sent: Thursday, March 24, 2016 3:11 PM > To: Deepak, M ; intel-gfx@lists.freedesktop.org > Cc: Deepak, M ; Vetter, Daniel > ; Adebisi, YetundeX > > Subject: Re: [PATCH 2/2] drm/i915: CABC support for backlight control

[Intel-gfx] [PATCH 1/3] drm: Add new DCS commands in the enum list

2016-03-24 Thread Deepak M
Adding new DCS commands which are specified in the DCS 1.3 spec related to CABC. Cc: Thierry Reding Cc: David Airlie Cc: Ville Syrjälä Cc: Daniel Vetter Suggested-by: Jani Nikula Signed-off-by: Deepak M --- include/video/mipi_display.h | 8 1 file changed, 8 insertions(+) diff

[Intel-gfx] [PATCH 3/3] drm/i915: CABC support for backlight control

2016-03-24 Thread Deepak M
mipi_dsi_dcs_write() instead of mipi_dsi_dcs_write_buffer() (Jani) Move DCS macro`s to include/video/mipi_display.h (Jani) Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 1

[Intel-gfx] [PATCH 1/5] drm: Add new DCS commands in the enum list

2016-03-28 Thread Deepak M
Adding new DCS commands which are specified in the DCS 1.3 spec related to CABC. v2: Sorted the Macro`s by value (Andrzej) Cc: Andrzej Hajda Cc: Thierry Reding Cc: David Airlie Cc: Ville Syrjälä Cc: Daniel Vetter Suggested-by: Jani Nikula Signed-off-by: Deepak M --- include/video

[Intel-gfx] [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT

2016-03-28 Thread Deepak M
These fields in VBT indicates the PWM source which is used and also the controller number. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_bios.c | 12 drivers/gpu/drm/i915/intel_drv.h | 5 + drivers/gpu/drm/i915

[Intel-gfx] [PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT

2016-03-28 Thread Deepak M
Signed-off-by: Deepak M --- DCS commands 0x53h and 0x54h controls the panel PWM operations and therfore we should send these commands to the ports mentioned in the field "dl_panel_pwm_ports" in the VBT DCS commands 55h and 56h controls the CABC operation and therfore we should be sen

[Intel-gfx] [PATCH 4/5] drm/i915: Add DCS control for Panel PWM

2016-03-28 Thread Deepak M
() instead of mipi_dsi_dcs_write_buffer() (Jani) Move DCS macro`s to include/video/mipi_display.h (Jani) v6: Rename the file to intel_dsi_panel_pwm.c Removing the CABC operations Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- Should this below check be

[Intel-gfx] [PATCH 5/5] CABC support for Panel PWM backlight control

2016-03-28 Thread Deepak M
here assumes that the panels use standard SW register for control. CABC is supported only when the PWM source for backlight is from the panel. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_dsi.c | 19 +++ drivers/gpu/drm/i915/intel_dsi.h | 3

[Intel-gfx] [PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT

2016-03-29 Thread Deepak M
Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_bios.c | 10 ++ drivers/gpu/drm/i915/intel_bios.h | 5 - drivers/gpu/drm/i915/intel_dsi.h | 9 + 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 4/5] drm/i915: Add DCS control for Panel PWM

2016-03-29 Thread Deepak M
() instead of mipi_dsi_dcs_write_buffer() (Jani) Move DCS macro`s to include/video/mipi_display.h (Jani) v6: Rename the file to intel_dsi_dcs_backlight.c Removing the CABC operations Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT

2016-03-29 Thread Deepak M
These fields in VBT indicates the PWM source which is used and also the controller number. Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_bios.c | 12 drivers/gpu/drm

[Intel-gfx] [PATCH 1/5] drm: Add new DCS commands in the enum list

2016-03-29 Thread Deepak M
Adding new DCS commands which are specified in the DCS 1.3 spec related to CABC. v2: Sorted the Macro`s by value (Andrzej) Cc: Ville Syrjälä Cc: Daniel Vetter Suggested-by: Jani Nikula Signed-off-by: Deepak M --- include/video/mipi_display.h | 8 1 file changed, 8 insertions

[Intel-gfx] [PATCH 5/5] drm/i915: CABC support for Panel PWM backlight control

2016-03-29 Thread Deepak M
here assumes that the panels use standard SW register for control. CABC is supported only when the PWM source for backlight is from the panel. Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_dsi.c | 19

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT

2016-03-29 Thread Deepak, M
> -Original Message- > From: Nikula, Jani > Sent: Tuesday, March 29, 2016 8:31 PM > To: intel-gfx@lists.freedesktop.org; Deepak, M > Cc: Nikula, Jani > Subject: [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT > > From: Deepak M > > The

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Get the i2c bus number from the ACPI

2016-04-19 Thread Deepak, M
Waiting for review comments. > -Original Message- > From: Deepak, M > Sent: Friday, March 11, 2016 3:55 PM > To: intel-gfx@lists.freedesktop.org > Cc: Deepak, M ; Nikula, Jani ; > Ville Syrjälä > Subject: [PATCH 1/2] drm/i915: Get the i2c bus number from the AC

[Intel-gfx] [MIPI CABC 2/2] drm/i915: CABC support for backlight control

2015-11-16 Thread Deepak M
here assumes that the panels use standard SW register for control. In this design there will be no PWM signal from the SoC and DCS commands are sent to enable and control the backlight brightness. Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- Addressed the

[Intel-gfx] [MIPI CABC 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

2015-11-16 Thread Deepak M
For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. Cc: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_bios.c | 13

[Intel-gfx] [MIPI CABC 0/2] CABC patch list

2015-11-16 Thread Deepak M
: Jani Nikula Cc: Daniel Vetter Cc: Yetunde Adebisi Deepak M (2): drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT drm/i915: CABC support for backlight control drivers/gpu/drm/i915/intel_bios.c | 13 drivers/gpu/drm/i915/intel_bios.h | 5 +- drivers/gpu/drm/i915

[Intel-gfx] [CABC PATCH v1 1/3][RFC] drm/i915: Store the CABC enabled field parsed from VBT to dev_priv structure

2015-07-05 Thread Deepak M
Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h |1 + drivers/gpu/drm/i915/intel_bios.c |2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 1dbd957..1d30cb7 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [CABC PATCH v1 0/3][RFC] CABC patch list

2015-07-05 Thread Deepak M
. Again a filed is added in the VBT to get this data from the version 197 onwards. One of the below patches parses these fields from the VBT. Please review the below patches. Deepak M (3): drm/i915: Store the CABC enabled field parsed from VBT to dev_priv structure drm/i915: Parsing the PWM

[Intel-gfx] [CABC PATCH v1 3/3][RFC] drm/i915: CABC support for backlight control

2015-07-05 Thread Deepak M
here assumes that the panels use standard SW register for control. In this design there will be no PWM signal from the SoC and DCS commands are sent to enable and control the backlight brightness. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_dsi.h | 13 +++ drivers/gpu/drm/i915

[Intel-gfx] [CABC PATCH v1 2/3][RFC] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

2015-07-05 Thread Deepak M
For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_bios.c | 13 + drivers/gpu/drm/i915/intel_bios.h |5 - drivers

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 01/11] drm/i915: Adding the parsing logic for the i2c element

2015-09-09 Thread Deepak M
From: vkorjani New sequence element for i2c is been added in the mipi sequence block of the VBT. This patch parses and executes the i2c sequence. v2: Add i2c_put_adapter call(Jani), rebase Signed-off-by: vkorjani Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_bios.c |6

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 04/11] drm/i915: Using the approprite vbt size if vbt is not in mailbox4 of opregion

2015-09-09 Thread Deepak M
. v2: - Use opregion filed from dev_priv struct instead of creating a new field in dev_priv (Jani) - Have vbt_size field vaild in all scenarios (Jani) - rebase Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h |2 ++ drivers/gpu/drm/i915/intel_bios.c | 42

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 02/11] drm/i915: Updating asle structure with new fields

2015-09-09 Thread Deepak M
Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_opregion.c |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c index cb1c657..f46231f 100644 --- a/drivers/gpu/drm/i915/intel_opregion.c

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 05/11] drm/i915: Added support the v3 mipi sequence block

2015-09-09 Thread Deepak M
Signed-off-by: Deepak M --- drivers/gpu/drm/i915/intel_bios.c | 119 +++- drivers/gpu/drm/i915/intel_bios.h |8 ++ drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |7 ++ 3 files changed, 114 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 00/11] Patches to support the version 3 of MIPI sequence in VBT.

2015-09-09 Thread Deepak M
the bdb header cant be relied. So its better to consider the vbt size from the mailbox3 when the VBT is not present in mailbox4. Other patches implements the parsing of the new sequence type which are added in the block 53. v2: Addressed Jani`s review comments. Deepak M (6): drm/i915: Updating

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 03/11] drm/i915: Parsing VBT if size of VBT exceeds 6KB

2015-09-09 Thread Deepak M
) - Fix the i915_opregion() in debugfs (Jani) Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_debugfs.c | 24 ++- drivers/gpu/drm/i915/i915_drv.h |4 + drivers/gpu/drm/i915/intel_bios.c | 49 +- drivers/gpu/drm/i915/intel_opregion.c | 279

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 07/11] drm/i915: Added the generic gpio sequence support and gpio table

2015-09-09 Thread Deepak M
The generic gpio is sequence is parsed from the VBT and the GPIO table is updated with the North core, South core and SUS core elements. v2: Move changes in sideband.c file to new patch(Jani), rebase Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_reg.h|5 + drivers/gpu

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 09/11] drm: Add few more wrapper functions for drm panel

2015-09-09 Thread Deepak M
Currently there are few pair of functions which are called during the panel enable/disable sequence. To improve the granularity, adding few more wrapper functions so that the functions are more specific on what they are doing. v2: rebase Signed-off-by: Deepak M Signed-off-by: Gaurav K Singh

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 08/11] drm/i915: GPIO for CHT generic MIPI

2015-09-09 Thread Deepak M
From: Yogesh Mohan Marimuthu The GPIO configuration and register offsets are different from baytrail for cherrytrail. Port the gpio programming accordingly for cherrytrail in this patch. v2: Rebase Signed-off-by: Yogesh Mohan Marimuthu --- drivers/gpu/drm/i915/i915_reg.h| 23 +++

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 06/11] drm/i915: extending gpio read/write to other cores

2015-09-09 Thread Deepak M
Adding a argument to the gpio read/write functions which accepts the block name. v2: rebase Signed-off-by: Deepak M --- drivers/gpu/drm/i915/i915_drv.h|5 +++-- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |4 ++-- drivers/gpu/drm/i915/intel_sideband.c |9

[Intel-gfx] [MIPI SEQ PARSING v2 PATCH 11/11] drm/i915: BXT GPIO support for backlight and panel control

2015-09-09 Thread Deepak M
From: Uma Shankar Added the BXT GPIO pin configuration and programming logic for backlight and panel control. v2: rebase Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 46 1 file changed, 46 insertions(+) diff --git a/drivers/gpu/dr

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