[Intel-gfx] [PATCH 2/2] drm/i915: fix VDD state tracking after system resume

2014-06-27 Thread Imre Deak
Just like during booting the BIOS can leave the VDD bit enabled after system resume. So apply the same state sanitization there too. This fixes a problem where after resume the port power domain refcount gets unbalanced. Reported-by: Jarkko Nikula jarkko.nik...@intel.com Signed-off-by: Imre Deak

[Intel-gfx] [PATCH 1/2] drm/i915: factor out intel_edp_panel_vdd_sanitize

2014-06-27 Thread Imre Deak
This will be needed by an upcoming patch too that needs to sanitize the VDD state during resume. The additional async disabling is only needed for the resume path, here it doesn't make a difference since we enable VDD right after the sanitize call. Signed-off-by: Imre Deak imre.d...@intel.com

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: gmch: fix stuck primary plane due to memory self-refresh mode

2014-06-27 Thread Imre Deak
Hi Egbert, On Fri, 2014-06-27 at 15:55 +0200, Egbert Eich wrote: Chris Wilson writes: On Fri, Jun 27, 2014 at 12:07:47AM +0200, Egbert Eich wrote: Hi Daniel, hi Imre, Daniel Vetter writes: Adding Egbert since he's done the original hack here. Imre please keep him

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: gmch: factor out intel_set_memory_cxsr

2014-07-01 Thread Imre Deak
On Tue, 2014-07-01 at 09:18 +0530, Deepak S wrote: On Friday 13 June 2014 05:24 PM, Imre Deak wrote: This functionality will be also needed by an upcoming patch, so factor it out. As a bonus this also makes things a bit more uniform across platforms. Note that this also changes the register

[Intel-gfx] [PATCH v3 1/3] drm/i915: gmch: factor out intel_set_memory_cxsr

2014-07-01 Thread Imre Deak
and according to the spec all the relevant bits are reserved-MBZ or reserved with a 0 default value. v2: - unchanged v3: - fix missing cxsr disabling on pineview (Deepak) Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Deepak S deepa...@linux.intel.com --- drivers/gpu/drm/i915/i915_drv.h | 2

Re: [Intel-gfx] [BUG?] 3.16-rc6 ... at drivers/gpu/drm/i915/intel_pm.c:5997 intel_display_power_put+0x12d/0x160()

2014-07-25 Thread Imre Deak
On Thu, 2014-07-24 at 01:33 +0200, Ian Kumlien wrote: Try four, now including CC lists for the intel driver... Could you give a try to the 2 patches at: https://patchwork.kernel.org/patch/4437061/ If these don't fix the issue, could you send a full dmesg log with the drm.debug=14 kernel option

Re: [Intel-gfx] [PATCH 17/40] drm/i915: Add chv cmnlane power wells

2014-07-25 Thread Imre Deak
this.. In any case: Reviewed-by: Imre Deak imre.d...@intel.com + } else { + phy = DPIO_PHY1; + I915_WRITE(DPLL(PIPE_C), I915_READ(DPLL(PIPE_C)) | +DPLL_REFA_CLK_ENABLE_VLV | DPLL_INTEGRATED_CRI_CLK_VLV); + } + udelay(1); /* 10ns

Re: [Intel-gfx] [PATCH 18/40] drm/i915: Kill intel_reset_dpio()

2014-07-25 Thread Imre Deak
...@linux.intel.com Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_display.c | 31 --- 1 file changed, 31 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a16f635..3cd73f4 100644

Re: [Intel-gfx] [PATCH 19/40] drm/i915: Add disp2d power well for chv

2014-07-25 Thread Imre Deak
for pipe C. So leave the code iffed out for now. Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_pm.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers

Re: [Intel-gfx] [PATCH 20/40] drm/i915: Add per-pipe power wells for chv

2014-07-25 Thread Imre Deak
-by: Ville Syrjälä ville.syrj...@linux.intel.com Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_reg.h | 12 drivers/gpu/drm/i915/intel_pm.c | 126 2 files changed, 138 insertions(+) diff --git a/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 21/40] drm/i915: Add chv port B and C TX wells

2014-07-25 Thread Imre Deak
-by: Ville Syrjälä ville.syrj...@linux.intel.com Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_pm.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index de5416b

Re: [Intel-gfx] [PATCH 22/40] drm/i915: Add chv port D TX wells

2014-07-25 Thread Imre Deak
, for all other ports we power up all lanes regardless of the actual configuration (until the PHY side setup is proved to work fine). So for consistency I'd do the same here too. With that change: Reviewed-by: Imre Deak imre.d...@intel.com + BIT(POWER_DOMAIN_INIT)) + static const struct

Re: [Intel-gfx] [PATCH 22/40] drm/i915: Add chv port D TX wells

2014-07-29 Thread Imre Deak
On Mon, 2014-07-28 at 18:19 +0300, Ville Syrjälä wrote: On Fri, Jul 25, 2014 at 04:30:29PM +0300, Imre Deak wrote: On Sat, 2014-06-28 at 02:04 +0300, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com Add the TX wells for port D. The Punit subsystem

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add get_config implementation for DSI encoder

2014-07-29 Thread Imre Deak
On Sat, 2014-07-12 at 17:17 +0530, Shobhit Kumar wrote: Call to vlv_crtc_clock_get is not needed for DSI and was causing dpio read WARN dumps as well. Absence of -get_config was casuing othet WARN dumps as well. With this the last of the known WARN dumps for DSI should be fixed.

Re: [Intel-gfx] [v2] drm/i915: Add correct hw/sw config check for DSI encoder

2014-07-29 Thread Imre Deak
On Tue, 2014-07-15 at 18:15 +0530, Shobhit Kumar wrote: Check in vlv_crtc_clock_get if DPLL is enabled before calling dpio read. It will not be enabled for DSI and avoid dpio read WARN dumps. Absence of -get_config was causing other WARN dumps as well. Update dpll_hw_state as well correctly

Re: [Intel-gfx] [PATCH 2/3] drm/i915: wait for all DSI FIFOs to be empty

2014-07-29 Thread Imre Deak
On Sat, 2014-07-12 at 17:17 +0530, Shobhit Kumar wrote: Ensure that the DSI packets for a particular sequence are completely sent before going ahead in the enabling or disabling of the panel Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com Reviewed-by: Imre Deak imre.d...@intel.com

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Add support for Video Burst Mode for MIPI DSI

2014-07-30 Thread Imre Deak
+ computed_ddr) { + DRM_ERROR(DDR clock is less than computed\n); Bikeshed: Burst mode freq is less than computed makes more sense to me. In any case the patch looks ok to me: Reviewed-by: Imre Deak imre.d...@intel.com + return

[Intel-gfx] [PATCH v2 2/2] drm/i915: fix VDD state tracking after system resume

2014-07-30 Thread Imre Deak
-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com --- drivers/gpu/drm/i915/intel_display.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1edfd1a..fdb5657 100644

[Intel-gfx] [PATCH v2 1/2] drm/i915: factor out intel_edp_panel_vdd_sanitize

2014-07-30 Thread Imre Deak
encoders (Ville) Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com --- drivers/gpu/drm/i915/intel_dp.c | 60 drivers/gpu/drm/i915/intel_drv.h | 1 + 2 files changed, 44 insertions(+), 17 deletions(-) diff

Re: [Intel-gfx] [v3] drm/i915: Add correct hw/sw config check for DSI encoder

2014-07-30 Thread Imre Deak
calculation Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_display.c | 4 ++ drivers/gpu/drm/i915/intel_dsi.c | 21 +- drivers/gpu/drm/i915/intel_dsi.h | 1 + drivers/gpu/drm/i915/intel_dsi_pll.c

[Intel-gfx] [PATCH v3 2/2] drm/i915: fix VDD state tracking after system resume

2014-07-31 Thread Imre Deak
(Daniel) Reported-and-tested-by: Jarkko Nikula jarkko.nik...@linux.intel.com Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_dp.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 71294b5

Re: [Intel-gfx] [BUG?] 3.16-rc6 ... at drivers/gpu/drm/i915/intel_pm.c:5997 intel_display_power_put+0x12d/0x160()

2014-07-31 Thread Imre Deak
On Wed, 2014-07-30 at 22:52 +0200, Ian Kumlien wrote: Sorry for the delay, it's been damned hot - vacation is over and overtime has been all the rage at work... No problem, thanks for the feedback. On fre, 2014-07-25 at 12:28 +0300, Imre Deak wrote: On Thu, 2014-07-24 at 01:33 +0200, Ian

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Update DDL only for current CRTC

2014-07-31 Thread Imre Deak
: Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_pm.c | 25 + 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b881639..90df1e8 100644 --- a/drivers/gpu

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Generalize drain latency computation

2014-07-31 Thread Imre Deak
On Wed, 2014-07-16 at 18:24 +0530, Gajanan Bhat wrote: Modify drain latency computation to use it for any plane. Same function can be used for primary, cursor and sprite planes. Signed-off-by: Gajanan Bhat gajanan.b...@intel.com --- drivers/gpu/drm/i915/i915_reg.h |1 +

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Add sprite watermark programming for VLV and CHV

2014-07-31 Thread Imre Deak
On Wed, 2014-07-16 at 18:24 +0530, Gajanan Bhat wrote: Program DDL register as part sprite watermark programming for CHV and VLV. Signed-off-by: Gajanan Bhat gajanan.b...@intel.com This looks ok, but could you confirm, ideally referencing some document, that we don't need to program any of

Re: [Intel-gfx] [BUG?] 3.16-rc6 ... at drivers/gpu/drm/i915/intel_pm.c:5997 intel_display_power_put+0x12d/0x160()

2014-08-01 Thread Imre Deak
On Thu, 2014-07-31 at 23:47 +0200, Ian Kumlien wrote: On tor, 2014-07-31 at 14:39 +0300, Imre Deak wrote: On Wed, 2014-07-30 at 22:52 +0200, Ian Kumlien wrote: Sorry for the delay, it's been damned hot - vacation is over and overtime has been all the rage at work... No problem

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Add sprite watermark programming for VLV and CHV

2014-08-07 Thread Imre Deak
On Thu, 2014-08-07 at 11:26 +0530, Bhat, Gajanan wrote: On 7/31/2014 7:14 PM, Imre Deak wrote: On Wed, 2014-07-16 at 18:24 +0530, Gajanan Bhat wrote: Program DDL register as part sprite watermark programming for CHV and VLV. Signed-off-by: Gajanan Bhat gajanan.b...@intel.com This looks

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Adding Gfx Clock, Wake and Gunit save/restore logic in PM suspend/resume paths.

2014-08-08 Thread Imre Deak
On Fri, 2014-08-08 at 14:29 +0530, Sagar Arun Kamble wrote: On Fri, 2014-08-08 at 09:42 +0200, Daniel Vetter wrote: On Fri, Aug 08, 2014 at 12:22:44PM +0530, Sagar Arun Kamble wrote: Hi Daniel, On Mon, 2014-08-04 at 10:07 +0200, Daniel Vetter wrote: On Fri, Aug 01, 2014 at 12:34:56PM

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Adding Gfx Clock, Wake and Gunit save/restore logic in PM suspend/resume paths.

2014-08-08 Thread Imre Deak
On Fri, 2014-08-08 at 15:54 +0530, Sagar Arun Kamble wrote: On Fri, 2014-08-08 at 11:15 +0200, Daniel Vetter wrote: On Fri, Aug 08, 2014 at 02:29:38PM +0530, Sagar Arun Kamble wrote: On Fri, 2014-08-08 at 09:42 +0200, Daniel Vetter wrote: On Fri, Aug 08, 2014 at 12:22:44PM +0530, Sagar

[Intel-gfx] [PATCH 1/4] drm/i915: fix HPD IRQ reenable work cancelation

2014-08-11 Thread Imre Deak
since the HPD IRQs will still be effectively masked by the first level interrupt mask. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_irq.c | 33 - drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 2/4] drm/i915: cancel hotplug and dig_port work during suspend and unload

2014-08-11 Thread Imre Deak
ref itself provides for the needed serialization. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_drv.c | 8 drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 3 +-- 3 files changed, 10 insertions(+), 2 deletions(-) diff

[Intel-gfx] [PATCH 3/4] drm/i915: make sure VDD is turned off during system suspend

2014-08-11 Thread Imre Deak
Atm we may leave eDP VDD enabled during system suspend after the CRTCs are disabled through an HPD-DPCD read event. So disable VDD during suspend at a point when no HPDs can occur. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_drv.c | 15 +++ drivers/gpu

[Intel-gfx] [PATCH 4/4] drm/i915: don't try to retrain a DP link on an inactive CRTC

2014-08-11 Thread Imre Deak
Atm we may retrain the DP link even if the CRTC is inactive through HPD work-intel_dp_check_link_status(). This in turn can lock up the PHY (at least on BYT), since the DP port is disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81948 Signed-off-by: Imre Deak imre.d...@intel.com

Re: [Intel-gfx] [PATCH 2/4] drm/i915: cancel hotplug and dig_port work during suspend and unload

2014-08-12 Thread Imre Deak
On Tue, 2014-08-12 at 15:13 +0300, Ville Syrjälä wrote: On Mon, Aug 11, 2014 at 09:54:15PM +0300, Imre Deak wrote: Make sure these work handlers don't run after we system suspend or unload the driver. Note that we don't cancel the handlers during runtime suspend. That could lead to a lockup

Re: [Intel-gfx] [PATCH 3/4] drm/i915: make sure VDD is turned off during system suspend

2014-08-12 Thread Imre Deak
On Tue, 2014-08-12 at 15:34 +0300, Ville Syrjälä wrote: On Mon, Aug 11, 2014 at 10:04:50PM +0300, Imre Deak wrote: Atm we may leave eDP VDD enabled during system suspend after the CRTCs are disabled through an HPD-DPCD read event. So disable VDD during suspend at a point when no HPDs can

Re: [Intel-gfx] [PATCH 2/4] drm/i915: cancel hotplug and dig_port work during suspend and unload

2014-08-12 Thread Imre Deak
On Tue, 2014-08-12 at 15:53 +0300, Ville Syrjälä wrote: On Tue, Aug 12, 2014 at 03:36:01PM +0300, Imre Deak wrote: On Tue, 2014-08-12 at 15:13 +0300, Ville Syrjälä wrote: On Mon, Aug 11, 2014 at 09:54:15PM +0300, Imre Deak wrote: Make sure these work handlers don't run after we system

Re: [Intel-gfx] [PATCH v3 1/1] drm/i915: Sharing Gfx Clock, Wake and Gunit save/restore logic using common handler for runtime/system s/r paths

2014-08-13 Thread Imre Deak
at macro level. v3: 1. Prepared common handlers for platform specific tasks to be done before HW suspend and after HW resume from D0i3. 2. Changed commit header. Cc: Imre Deak imre.d...@intel.com Cc: Paulo Zanoni paulo.r.zan...@intel.com Cc: Daniel Vetter daniel.vet...@ffwll.ch Cc

[Intel-gfx] [PATCH v2 1/5] drm/i915: take display port power domain in DP HPD handler

2014-08-13 Thread Imre Deak
Ville noticed that we can call ibx_digital_port_connected() which accesses the HW without holding any power well/runtime pm reference. Fix this by holding a display port power domain reference around the whole hpd_pulse handler. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm

[Intel-gfx] [PATCH v2 2/5] drm/i915: fix HPD IRQ reenable work cancelation

2014-08-13 Thread Imre Deak
since the HPD IRQs will still be effectively masked by the first level interrupt mask. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_irq.c | 33 - drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH v2 4/5] drm/i915: make sure VDD is turned off during system suspend

2014-08-13 Thread Imre Deak
the needed serialization. v2: - add note to commit message about the runtime suspend path (Ville) - use edp_panel_vdd_off_sync(), so we can keep the WARN in edp_panel_vdd_off() (Ville) Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_drv.c | 15 +++ drivers/gpu

[Intel-gfx] [PATCH v2 5/5] drm/i915: don't try to retrain a DP link on an inactive CRTC

2014-08-13 Thread Imre Deak
Atm we may retrain the DP link even if the CRTC is inactive through HPD work-intel_dp_check_link_status(). This in turn can lock up the PHY (at least on BYT), since the DP port is disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81948 Signed-off-by: Imre Deak imre.d...@intel.com

[Intel-gfx] [PATCH v2 3/5] drm/i915: cancel hotplug and dig_port work during suspend and unload

2014-08-13 Thread Imre Deak
ref itself provides for the needed serialization. v2: - fix the order of canceling dig_port_work wrt. hotplug_work (Ville) - zero out {long,short}_hpd_port_mask and hpd_event_bits for speed (Ville) Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_drv.c | 16

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Created common handler for platform specific suspend/resume

2014-08-14 Thread Imre Deak
to intel_suspend_complete and intel_resume_prepare. Cc: Imre Deak imre.d...@intel.com Cc: Paulo Zanoni paulo.r.zan...@intel.com Cc: Daniel Vetter daniel.vet...@ffwll.ch Cc: Jani Nikula jani.nik...@linux.intel.com Cc: Goel, Akash akash.g...@intel.com For the future: it's not necessary to CC the above people

Re: [Intel-gfx] [PATCH 1/4] drm/i915: fix HPD IRQ reenable work cancelation

2014-08-15 Thread Imre Deak
On Wed, 2014-08-13 at 19:33 +0300, Ville Syrjälä wrote: The series seems fine to me. Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com for the rest as well. Thanks, I assume it's for v2. I'd say this is for -fixes. The problem existed even in 3.16, but only the MST support made it

Re: [Intel-gfx] [PATCH 1/4] drm/i915: fix HPD IRQ reenable work cancelation

2014-08-15 Thread Imre Deak
On Fri, 2014-08-15 at 12:48 +0300, Jani Nikula wrote: On Fri, 15 Aug 2014, Imre Deak imre.d...@intel.com wrote: On Wed, 2014-08-13 at 19:33 +0300, Ville Syrjälä wrote: The series seems fine to me. Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com for the rest as well. Thanks

[Intel-gfx] [PATCH] drm/i915: fix suspend/resume for GENs w/o runtime PM support

2014-08-18 Thread Imre Deak
system s/r on old platforms. The issue was introduced in commit 016970beb05da6285c2f3ed2bee1c676cb75972e Author: Sagar Kamble sagar.a.kam...@intel.com Date: Wed Aug 13 23:07:06 2014 +0530 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82751 Signed-off-by: Imre Deak imre.d...@intel.com

[Intel-gfx] [PATCH v3 1/5] drm/i915: take display port power domain in DP HPD handler

2014-08-18 Thread Imre Deak
Ville noticed that we can call ibx_digital_port_connected() which accesses the HW without holding any power well/runtime pm reference. Fix this by holding a display port power domain reference around the whole hpd_pulse handler. Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Ville

[Intel-gfx] [PATCH v3 3/5] drm/i915: cancel hotplug and dig_port work during suspend and unload

2014-08-18 Thread Imre Deak
ref itself provides for the needed serialization. v2: - fix the order of canceling dig_port_work wrt. hotplug_work (Ville) - zero out {long,short}_hpd_port_mask and hpd_event_bits for speed (Ville) Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Ville Syrjälä ville.syrj

[Intel-gfx] [PATCH v3 2/5] drm/i915: fix HPD IRQ reenable work cancelation

2014-08-18 Thread Imre Deak
since the HPD IRQs will still be effectively masked by the first level interrupt mask. Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_irq.c | 33

[Intel-gfx] [PATCH v3 5/5] drm/i915: don't try to retrain a DP link on an inactive CRTC

2014-08-18 Thread Imre Deak
Atm we may retrain the DP link even if the CRTC is inactive through HPD work-intel_dp_check_link_status(). This in turn can lock up the PHY (at least on BYT), since the DP port is disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81948 Signed-off-by: Imre Deak imre.d...@intel.com

[Intel-gfx] [PATCH v3 4/5] drm/i915: make sure VDD is turned off during system suspend

2014-08-18 Thread Imre Deak
the needed serialization. v2: - add note to commit message about the runtime suspend path (Ville) - use edp_panel_vdd_off_sync(), so we can keep the WARN in edp_panel_vdd_off() (Ville) v3: - rebased on -fixes (for_each_intel_encoder()-list_for_each_entry()) (Imre) Signed-off-by: Imre Deak imre.d

[Intel-gfx] [PATCH v4 2/5] drm/i915: fix HPD IRQ reenable work cancelation

2014-08-18 Thread Imre Deak
since the HPD IRQs will still be effectively masked by the first level interrupt mask. v2-3: - unchanged v4: - use proper API for changing the expiration time for an already pending delayed work (Jani) Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Ville Syrjälä ville.syrj

Re: [Intel-gfx] [PATCH] drm/i915: fix suspend/resume for GENs w/o runtime PM support

2014-08-26 Thread Imre Deak
On Tue, 2014-08-26 at 09:45 +0200, Daniel Vetter wrote: On Tue, Aug 26, 2014 at 09:44:42AM +0200, Daniel Vetter wrote: On Mon, Aug 18, 2014 at 01:20:06PM +0300, Imre Deak wrote: Before sharing common parts between the system and runtime s/r handlers we WARNed if the runtime s/r handlers

[Intel-gfx] [PATCH v2] drm/i915: fix suspend/resume for GENs w/o runtime PM support

2014-08-26 Thread Imre Deak
) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82751 Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_drv.c | 31 ++- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915

Re: [Intel-gfx] [drm/i915/3.17] panic in i915_digport_work_func

2014-09-01 Thread Imre Deak
...@marge.simpson.net Reported-by: Mike Galbraith umgwanakikb...@gmail.com Signed-off-by: Dave Airlie airl...@redhat.com Daniel reviewed this already, but Jani asked me to take a look, so: Acked-by: Imre Deak imre.d...@intel.com One thing for the future is to move ibx_digital_port_connected

Re: [Intel-gfx] [PATCH v2 09/14] drm/i915: Fix edp vdd locking

2014-09-02 Thread Imre Deak
); intel_panel_disable_backlight(intel_dp-attached_connector); These need to be rebased on the latest backlight changes, moving the locking into _intel_edp_backlight_on/off() and adding it to intel_edp_backlight_power(). With the above things rebased the patch looks ok to me: Reviewed-by: Imre Deak imre.d

Re: [Intel-gfx] [PATCH v2 10.1/14] drm/i915: Reset power sequencer pipe tracking when disp2d is off

2014-09-02 Thread Imre Deak
functions and in edp_notifier_handler() need to be rebased, with that this patch looks ok: Reviewed-by: Imre Deak imre.d...@intel.com @@ -2290,18 +2340,19 @@ static void vlv_steal_power_sequencer(struct drm_device *dev, list_for_each_entry(encoder, dev-mode_config.encoder_list, base.head

Re: [Intel-gfx] [PATCH 11/14] drm/i915: Be more careful when picking the initial power sequencer pipe

2014-09-02 Thread Imre Deak
enabled, and finally look at just the port select bits. This should make us pick the correct power sequencer when the BIOS has already enabled the panel. Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_dp.c

Re: [Intel-gfx] [PATCH 12/14] drm/i915: Turn on panel power before doing aux transfers

2014-09-02 Thread Imre Deak
to that bug and ask the reporters to retest. The patch looks ok: Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_dp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 4952783

Re: [Intel-gfx] [PATCH 13/14] drm/i915: Enable DP port earlier

2014-09-03 Thread Imre Deak
ville.syrj...@linux.intel.com Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_dp.c | 172 +++- 1 file changed, 100 insertions(+), 72 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index

Re: [Intel-gfx] [PATCH 14/14] drm/i915: Move DP port disable to post_disable for pch platforms

2014-09-03 Thread Imre Deak
leave the port disable where it is since that matches the modeset sequence in the documentation and I don't have a suitable machine to test if the other order would work. Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm

Re: [Intel-gfx] [PATCH 15/14] drm/i915: Add comments explaining the vdd on/off functions

2014-09-03 Thread Imre Deak
); edp_panel_vdd_off_sync(intel_dp); mutex_unlock(dev_priv-pps_mutex); edp_panel_vdd_off_sync() could also use a clarification similar to the the rest of the API. With or without the above changes: Reviewed-by: Imre Deak imre.d...@intel.com signature.asc Description

[Intel-gfx] [igt PATCH 3/5] lib: add kmstest_get_connector_config

2013-05-31 Thread Imre Deak
This is used by multiple test cases, so make it shared. Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 134 lib/drmtest.h | 14 ++ tests/kms_flip.c| 115 tests

[Intel-gfx] [igt PATCH 1/5] lib: move connector_type_str and co to drmtest

2013-05-31 Thread Imre Deak
These are used by multiple test cases, so make them shared. Signed-off-by: Imre Deak imre.d...@intel.com --- demos/intel_sprite_on.c | 58 -- lib/drmtest.c | 54 +++ lib/drmtest.h | 3

[Intel-gfx] [igt PATCH 4/5] lib: refactor kmstest_create_fb

2013-05-31 Thread Imre Deak
Factor out parts that will be used by an upcoming patch adding kmstest_create_fb2. Also call the fb paint functions directly, there is not much point in passing a function pointer for that. Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 176

[Intel-gfx] [igt PATCH 5/5] tests: add kms_render

2013-05-31 Thread Imre Deak
Add a test going through all connectors/crtcs/modes/formats painting to a front FB with CPU or painting to a back FB with CPU and blitting it to the front FB. Only formats understood by cairo are supported for now. Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 101

[Intel-gfx] [igt PATCH 2/5] lib: add kmstest_cairo_printf_line

2013-05-31 Thread Imre Deak
Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 106 lib/drmtest.h | 13 +++ tests/testdisplay.c | 96 ++- 3 files changed, 99 insertions(+), 116 deletions(-) diff

Re: [Intel-gfx] [PATCH 2/2] drm/i915: hw state readout support for pixel_multiplier

2013-06-05 Thread Imre Deak
-pixel_multiplier, encoder_pixel_multiplier); } In intel_modeset_check_state() we call first encoder-get_config() and only afterwards display-get_pipe_config(), so this won't work on I915G/GM. Other than that the 2 patches look ok: Reviewed-by: Imre Deak imre.d...@intel.com Related but not affecting my r-b

Re: [Intel-gfx] [igt PATCH 2/5] lib: add kmstest_cairo_printf_line

2013-06-05 Thread Imre Deak
On Wed, 2013-06-05 at 14:44 -0300, Rodrigo Vivi wrote: This patch is big and doing considerable changes in paint_marker besides add cairo_printf line... doesn' t it deserves a split? Ok, will resend this with the paint_marker changes in a separate patch. --Imre

[Intel-gfx] [PATCH v2 0/6] tests: add tests for front buffer rendering

2013-06-05 Thread Imre Deak
v2: - split changes to paint_marker() to a separate patch (Rodrigo) Imre Deak (6): lib: move connector_type_str and co to drmtest lib: add kmstest_cairo_printf_line lib: use kmstest_cairo_printf_line in paint_marker lib: add kmstest_get_connector_config lib: refactor kmstest_create_fb

[Intel-gfx] [PATCH v2 2/6] lib: add kmstest_cairo_printf_line

2013-06-05 Thread Imre Deak
Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 44 lib/drmtest.h | 13 tests/testdisplay.c | 96 - 3 files changed, 86 insertions(+), 67 deletions(-) diff --git a/lib/drmtest.c b

[Intel-gfx] [PATCH v2 3/6] lib: use kmstest_cairo_printf_line in paint_marker

2013-06-05 Thread Imre Deak
Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 64 +-- 1 file changed, 14 insertions(+), 50 deletions(-) diff --git a/lib/drmtest.c b/lib/drmtest.c index 71dd06b..3ad77a8 100644 --- a/lib/drmtest.c +++ b/lib/drmtest.c

[Intel-gfx] [PATCH v2 5/6] lib: refactor kmstest_create_fb

2013-06-05 Thread Imre Deak
Factor out parts that will be used by an upcoming patch adding kmstest_create_fb2. Also call the fb paint functions directly, there is not much point in passing a function pointer for that. Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com --- lib

[Intel-gfx] [PATCH v2 6/6] tests: add kms_render

2013-06-05 Thread Imre Deak
Add a test going through all connectors/crtcs/modes/formats painting to a front FB with CPU or painting to a back FB with CPU and blitting it to the front FB. Only formats understood by cairo are supported for now. Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Rodrigo Vivi rodrigo.v

[Intel-gfx] [PATCH v2 4/6] lib: add kmstest_get_connector_config

2013-06-05 Thread Imre Deak
This is used by multiple test cases, so make it shared. Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com --- lib/drmtest.c | 134 lib/drmtest.h | 14 ++ tests/kms_flip.c| 115

[Intel-gfx] [PATCH v2 1/6] lib: move connector_type_str and co to drmtest

2013-06-05 Thread Imre Deak
These are used by multiple test cases, so make them shared. Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com --- demos/intel_sprite_on.c | 58 -- lib/drmtest.c | 54

[Intel-gfx] [PATCH v3 2/6] lib: add kmstest_cairo_printf_line

2013-06-05 Thread Imre Deak
Signed-off-by: Imre Deak imre.d...@intel.com Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com [v3: fix mode printing in paint_output_info() botched by debugging leftover :/ ] --- lib/drmtest.c | 44 lib/drmtest.h | 13 tests/testdisplay.c | 96

Re: [Intel-gfx] [igt PATCH 5/5] tests: add kms_render

2013-06-06 Thread Imre Deak
On Wed, 2013-06-05 at 15:28 -0300, Rodrigo Vivi wrote: nice tests, only now I understood why Daniel randomly volunteered me to review this series ;) Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com Thanks for the review, the patchset is pushed now to igt. --Imre

Re: [Intel-gfx] [PATCH] drm/i915: hw state readout support for pixel_multiplier

2013-06-06 Thread Imre Deak
to be consistent in both setup_hw_state and the modeset state checker. Otherwise the clever trick with handling the pixel mutliplier on i915G/GM where the encoder overrides the default value of 1 from the crtc get_pipe_config function doesn't work. Spotted by Imre Deak. v3: Actually cross-check

Re: [Intel-gfx] [PATCH 24/31] drm/i915: asserts for lvds pre_enable

2013-06-13 Thread Imre Deak
On Wed, 2013-06-05 at 13:34 +0200, Daniel Vetter wrote: Lots of bangin my head against the wall^UExperiments have shown that we really need to enable the lvds port before we enable plls. Strangely that seems to include the fdi rx pll on the pch. Anyway, encode this new evidence with a few

Re: [Intel-gfx] [PATCH 27/31] drm/i915: move i9xx dpll enabling into crtc enable function

2013-06-14 Thread Imre Deak
On Wed, 2013-06-05 at 13:34 +0200, Daniel Vetter wrote: Now that we have the proper pipe config to track this, we don't need to write any registers any more. v2: Drop a few now unnecessary local variables and switch the enable function to take a struct intel_crtc * to simply arguments.

Re: [Intel-gfx] [PATCH 28/31] drm/i915: s/pre_pll/pre/ on the lvds port enable function

2013-06-15 Thread Imre Deak
On Wed, 2013-06-05 at 13:34 +0200, Daniel Vetter wrote: i9xx doesn't use pre_enable at all, so we can fold this in now. Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch I managed to review 23-28 for now, so on those apart from the two nitpicks: Reviewed-by: Imre Deak imre.d...@intel.com

[Intel-gfx] [PATCH] drm/i915: fix lane bandwidth capping for DP 1.2 sinks

2013-07-09 Thread Imre Deak
DP 1.2 compatible displays may report a 5.4Gbps maximum bandwidth which the driver will treat as an invalid value and use 1.62Gbps instead. Fix this by capping to 2.7Gbps anything beyond the DP 1.1 bandwidth range. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_dp.c

Re: [Intel-gfx] [PATCH] drm/i915: fix lane bandwidth capping for DP 1.2 sinks

2013-07-09 Thread Imre Deak
On Tue, 2013-07-09 at 14:35 +0200, Daniel Vetter wrote: On Tue, Jul 9, 2013 at 12:40 PM, Imre Deak imre.d...@intel.com wrote: DP 1.2 compatible displays may report a 5.4Gbps maximum bandwidth which the driver will treat as an invalid value and use 1.62Gbps instead. Fix this by capping

[Intel-gfx] [PATCH v2] drm/i915: fix lane bandwidth capping for DP 1.2 sinks

2013-07-09 Thread Imre Deak
in the DP standard (Daniel, Chris) Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_dp.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 11eb697..7db2cd7 100644 --- a/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 01/11] drm/i915: Move gtt and ppgtt under address space umbrella

2013-07-11 Thread Imre Deak
On Mon, 2013-07-08 at 23:08 -0700, Ben Widawsky wrote: The GTT and PPGTT can be thought of more generally as GPU address spaces. Many of their actions (insert entries), state (LRU lists) and many of their characteristics (size), can be shared. Do that. The change itself doesn't actually

Re: [Intel-gfx] [PATCH 05/11] drm/i915: Create VMAs

2013-07-11 Thread Imre Deak
); - drm_mm_remove_node(obj-gtt_space); + drm_mm_remove_node(vma-node); return ret; } Freeing vma on the error path is missing. With this and the issue in 1/5 addressed things look good to me, so on 1-5: Reviewed-by: Imre Deak imre.d...@intel.com --Imre

Re: [Intel-gfx] [PATCH] drm/i915: clean up vlv -pre_pll_enable and pll enable sequence

2013-07-11 Thread Imre Deak
to vlv_enable_pll. Other than this patches 29-31 look ok, so on those: Reviewed-by: Imre Deak imre.d...@intel.com signature.asc Description: This is a digitally signed message part ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http

Re: [Intel-gfx] [PATCH 5/5] [v5] drm/i915: Create VMAs

2013-07-17 Thread Imre Deak
to allocate stolen GTT space\n); Haven't noticed last time around, but freeing vma is missing here. A separate issue, but the error path in this function needs to be fixed in other places too. With these fixed, on the series: Reviewed-by: Imre Deak imre.d...@intel.com signature.asc Description

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Create VMAs

2013-07-18 Thread Imre Deak
: Reviewed-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/i915_drv.h| 48 +- drivers/gpu/drm/i915/i915_gem.c| 74 +++--- drivers/gpu/drm/i915/i915_gem_evict.c | 12 -- drivers/gpu/drm/i915/i915_gem_gtt.c| 5

[Intel-gfx] [PATCH] drm/i915: restore debug message lost in merge resolution

2013-07-18 Thread Imre Deak
Restore debug message lost in merge commit e1b73cba13. Also clarify it that we are only clamping bpp not overwriting it. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/intel_dp.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915: dvo_ch7xxx: fix vsync polarity setting

2013-07-25 Thread Imre Deak
This fixes a typo which set the wrong vsync and possibly also hsync polarity for any modes with positive vsync polarity. Signed-off-by: Imre Deak imre.d...@intel.com --- drivers/gpu/drm/i915/dvo_ch7xxx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915: make user mode sync polarity setting explicit

2013-07-30 Thread Imre Deak
the polarity accordingly. This is what the NV driver does (drivers/gpu/drm/nouveau/dispnv04/crtc.c), but I think that's not very exact and would change the existing behavior of the Intel driver. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65442 Signed-off-by: Imre Deak imre.d

Re: [Intel-gfx] [PATCH] drm/i915: make user mode sync polarity setting explicit

2013-07-30 Thread Imre Deak
On Tue, 2013-07-30 at 15:43 +0300, Imre Deak wrote: On Tue, 2013-07-30 at 11:57 +0100, Chris Wilson wrote: On Tue, Jul 30, 2013 at 01:36:32PM +0300, Imre Deak wrote: Userspace can pass a mode with an unspecified vsync/hsync polarity setting. All encoders in the Intel driver take

[Intel-gfx] [igt PATCH 1/4] lib: shorten DP/eDP connector names

2013-08-05 Thread Imre Deak
Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/drmtest.c b/lib/drmtest.c index e599af7..d51f708 100644 --- a/lib/drmtest.c +++ b/lib/drmtest.c @@ -1254,11 +1254,11 @@ struct type_name connector_type_names

[Intel-gfx] [igt PATCH 2/4] lib: handle SIGSEGV similarly to other error signals

2013-08-05 Thread Imre Deak
Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/drmtest.c b/lib/drmtest.c index d51f708..afbaa35 100644 --- a/lib/drmtest.c +++ b/lib/drmtest.c @@ -1309,7 +1309,7 @@ static int exit_handler_count; static bool

[Intel-gfx] [igt PATCH 4/4] tests: add kms_setmode

2013-08-05 Thread Imre Deak
that are invalid, as I haven't found any machine that supports these (have to be GT2 with dvo and vga output). For configurations with one crtc per connector the FBs are per-crtc atm. Signed-off-by: Imre Deak imre.d...@intel.com --- tests/.gitignore| 1 + tests/Makefile.am | 1 + tests/kms_setmode.c

[Intel-gfx] [igt PATCH 0/4] add support for testing clone output configs

2013-08-05 Thread Imre Deak
of these. Note that this will take a while to run especially if you have 3 displays connected... Imre Deak (4): lib: shorten DP/eDP connector names lib: handle SIGSEGV similarly to other error signals lib: add subtest extra command line option handling tests: add kms_setmode lib/drmtest.c

[Intel-gfx] [igt PATCH 3/4] lib: add subtest extra command line option handling

2013-08-05 Thread Imre Deak
long options and handle both together in the same getopt_long call. Signed-off-by: Imre Deak imre.d...@intel.com --- lib/drmtest.c | 85 --- lib/drmtest.h | 6 + 2 files changed, 81 insertions(+), 10 deletions(-) diff --git a/lib

Re: [Intel-gfx] [igt PATCH 3/4] lib: add subtest extra command line option handling

2013-08-16 Thread Imre Deak
On Tue, 2013-08-06 at 11:09 +0200, Daniel Vetter wrote: On Mon, Aug 05, 2013 at 02:45:25PM +0300, Imre Deak wrote: At the moment any command line option handling done by tests will interfere with the option handling of the subtest interface. To fix this add a new version of the subtest_init

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