Hello!
Registration & Call for Proposals are now open for XDC 2021, which will
take place on September 15-17, 2021. This year we will repeat as
virtual event.
https://indico.freedesktop.org/event/1/
As usual, the conference is free of charge and open to the general
public. If you plan on attendi
Hello!
Registration & Call for Proposals are now open for XDC 2020, which will
take place at the Gdańsk University of Technology in Gdańsk, Poland on
September 16-18, 2020.
Thanks to LWN.net for hosting the website again this year!
https://xdc2020.x.org
As usual, the conference is free
On Wed, 2017-11-29 at 12:40 +, Chris Wilson wrote:
> Quoting Chris Wilson (2017-11-29 12:30:23)
> > Checking for a tainted kernel is a convenient way to see if the test
> > generated a critical error such as a oops, or machine check.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Daniel Vetter
On Fri, 2017-11-24 at 17:17 +0200, Arkadiusz Hiler wrote:
> This patch gets rid of the Android support, deleting all the hacks and
> moving code around to the places it belongs.
>
> Android build is not really maintained properly and rots rather fast.
> With recent push for Meson here and Android
On Tue, 2017-12-19 at 12:34 +, Chris Wilson wrote:
> Avoid having to test for spin[0] existing by starting the load-loop with
> it allocated.
>
> v2: Preallocate the spin[1] as well for high load.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=104060
> Signed-off-by: Chris Wilso
On Mon, 2017-04-24 at 14:55 +0200, Ewelina Musial wrote:
> In some cases we observed that forcewake isn't kept after
> resume and then RC6 residency is not constant.
>
> References: HSD#1804921797
> Cc: Arkadiusz Hiler
> Cc: Michal Winiarski
> Cc: Lukasz Fiedorowicz
> Signed-off-by: Ewelina Mus
On Fri, 2017-02-10 at 15:03 +, Chris Wilson wrote:
> If we receive a DOWN_TIMEOUT rps interrupt, we respond by reducing the
> GPU clocks significantly. Before we do, double check that the frequency
> we pick is actually a decrease.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Radoslaw Szwicht
On Fri, 2017-02-10 at 15:03 +, Chris Wilson wrote:
> When the RPS tuning was applied to Baytrail, in commit 8fb55197e64d
> ("drm/i915: Agressive downclocking on Baytrail"), concern was given that
> it might cause Cherryview excess wakeups of the common power well.
> However, the static threshol
On Fri, 2017-02-10 at 15:03 +, Chris Wilson wrote:
> Currently we apply the jump to rpe if we are below it and the GPU needs
> more power. For some GPUs, the rpe is 75% of the maximum range causing
> us to dramatically overshoot low power applications *and* unable to
> reach the low frequency t
On Fri, 2017-02-17 at 08:37 +, Chris Wilson wrote:
> Instead of having each back-end provide identical guards, just have a
> singular set in intel_set_rps() to verify that the caller is obeying the
> rules.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Radoslaw Szwichtenberg
_
On Fri, 2017-02-17 at 08:31 +, Chris Wilson wrote:
> The uncached mmio is sufficient to queue the mmio writes without raising
> forcewake. The forced flush along with acquiring forcewake from the
> posting read is not required for adjusting the RPS frequency.
>
> Signed-off-by: Chris Wilson
R
On Sat, 2017-02-18 at 15:00 +, Chris Wilson wrote:
> We don't need struct_mutex for acquiring an rpm wakeref, and do not need
> to serialise those register read (it's the wrong mutex for those
> registers in any case). Begone!
>
> Signed-off-by: Chris Wilson
Reviewed-by: Radoslaw Szwichtenber
On Sat, 2017-02-18 at 11:27 +, Chris Wilson wrote:
> Either by chance, or by misread, the current evaluation interval may be
> zero. If that is the case, don't divide by it!
>
> Signed-off-by: Chris Wilson
Reviewed-by: Radoslaw Szwichtenberg
___
In
On Mon, 2017-02-20 at 09:47 +, Chris Wilson wrote:
> The uncached mmio is sufficient to queue the mmio writes without raising
> forcewake. The forced flush along with acquiring forcewake from the
> posting read is not required for adjusting the RPS frequency.
>
> Signed-off-by: Chris Wilson
R
On Mon, 2017-02-20 at 09:47 +, Chris Wilson wrote:
> Disable RPS by setting RP_CONTROL to 0, remembering its earlier value.
> Then adjust the thresholds before re-enabling RP_CONTROL.
>
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> Cc: sta...@vger.kernel.org
Reviewed-by: Radoslaw Szwic
On Mon, 2017-02-20 at 09:47 +, Chris Wilson wrote:
> If intel_set_rps() is called whilst the hw is disabled, just store the
> requested frequency (from the user) for application when we wake the hw
> up.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Radoslaw Szwichtenberg
On Mon, 2017-02-20 at 09:47 +, Chris Wilson wrote:
> During initialisation, we set different flags for different
> architectures - these should be preserved when we reload the RPS
> thresholds. If we use a mmio read, it will first ensure that the
> threshold registers are written before we appl
was not
requested.
Thanks!
Radek
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Wednesday, December 30, 2015 10:31 AM
> To: Kamble, Sagar A
> Cc: S, Deepak; Szwichtenberg, Radoslaw; Intel Graphics Development; Goel,
> Akash
> Subj
8 PM
> To: Chris Wilson; Szwichtenberg, Radoslaw; S, Deepak; Intel Graphics
> Development; Goel, Akash
> Subject: Re: Why idle_freq is set to RPn and not RPe
>
>
>
> On 12/30/2015 4:20 PM, Chris Wilson wrote:
> > On Wed, Dec 30, 2015 at 04:09:46PM +0530, Kamble, Sagar A wrot
On Wed, 2017-06-07 at 10:45 -0700, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> RGB565 Pixel format planes can now be rotated at 90 and 270 degrees
>
> Signed-off-by: Clint Taylor
> ---
> drivers/gpu/drm/i915/intel_atomic_plane.c | 11 ---
> 1 file changed, 4 insertions(+
On Wed, 2017-06-14 at 12:44 -0700, jeff.mc...@intel.com wrote:
> From: Jeff McGee
>
> This completes the change started by:
>
> commit 39cccab83b7c515a2b57abe679a8cb304c8933ef
> Author: Chris Wilson
> Date: Fri May 19 09:41:40 2017 +0100
>
> igt/pm_rps: Allow CUR to be greater than MAX (
On Fri, 2017-06-23 at 12:31 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Default is not an engine but an ABI alias for RCS. Remove it
> from the engine list to eliminate redundant subtests and test
> passes.
Does it mean that we will have an ABI part that we don't test?
-Radek
On Fri, 2017-06-23 at 15:35 +0100, Tvrtko Ursulin wrote:
> On 23/06/2017 15:17, Szwichtenberg, Radoslaw wrote:
> > On Fri, 2017-06-23 at 12:31 +0100, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin
> > >
> > > Default is not an engine but an ABI alias for
On Wed, 2017-06-28 at 13:40 +0300, Arkadiusz Hiler wrote:
> "This is a wraps" -> "This wraps"
> "hw/hardware context" -> "context"
>
> gem_context_create does not use igt_require() but igt_skip_on() so make
> the similarity note more vague and in result true.
>
> Cc: Daniel Vetter
> Cc: Radoslaw
On Tue, 2017-07-25 at 17:26 +0200, Ewelina Musial wrote:
> Gem_mocs_settings and pm_rc6_residency tests are defining
> the same functionality to read residency from sysfs.
> Moving that function to lib/igt_aux and updating tests.
>
> Signed-off-by: Ewelina Musial
Reviewed-by: Radoslaw Szwichtenbe
On Mon, 2017-09-11 at 09:56 +0100, Chris Wilson wrote:
> At present, we try to do 1,000,000 cycles, which may be a reasonable
> estimate for detecting the race, takes 6 minutes in practice on bxt on a
> good day (as it spends more time doing rpm suspend/resume than actual work,
> and that accounts
On Fri, 2017-09-01 at 12:55 +0530, Sagar Arun Kamble wrote:
> SLPC (Single Loop Power Controller) is a replacement for some host-based
> power management features. The SLPC implementation runs in GuC firmware.
> This series has been tested with SKL/APL/KBL GuC firmware v9 and v10
> which are yet to
On Thu, 2017-09-14 at 11:09 -0700, Vinay Belgaumkar wrote:
> Added the missing IGT_TEST_DESCRIPTION and some subtest
> descriptions.
>
> v2: Removed duplication, addressed comments, cc'd test author
>
> v3: Only comment abstract code, change some igt_info to igt_debug.
> Changed description t
On Fri, 2017-09-15 at 07:34 +, Szwichtenberg, Radoslaw wrote:
> On Thu, 2017-09-14 at 11:09 -0700, Vinay Belgaumkar wrote:
> > Added the missing IGT_TEST_DESCRIPTION and some subtest
> > descriptions.
> >
> > v2: Removed duplication, addressed comments, cc'
On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote:
> This patch separates RC6 and RPS enabling for BDW.
> RC6/RPS Disabling are handled through gen6 functions.
>
> Cc: Imre Deak
> Cc: Chris Wilson
> Signed-off-by: Sagar Arun Kamble
> ---
> drivers/gpu/drm/i915/intel_pm.c | 27
On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote:
> This patch separates enable/disable of RC6 and RPS for gen6+
> platforms prior to VLV.
>
> Cc: Imre Deak
> Cc: Chris Wilson
> Signed-off-by: Sagar Arun Kamble
Reviewed-by: Radoslaw Szwichtenberg
On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote:
> This patch separates enable/disable of RC6 and RPS for VLV.
>
> Cc: Imre Deak
> Cc: Chris Wilson
> Signed-off-by: Sagar Arun Kamble
Reviewed-by: Radoslaw Szwichtenberg
___
Intel-gfx mailin
On Wed, 2017-09-20 at 11:14 +, Szwichtenberg, Radoslaw wrote:
> On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote:
> > This patch separates RC6 and RPS enabling for BDW.
> > RC6/RPS Disabling are handled through gen6 functions.
> >
> > Cc: Imre Deak
>
On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote:
> This patch separates enable/disable of RC6 and RPS for CHV.
>
> Cc: Imre Deak
> Cc: Chris Wilson
> Signed-off-by: Sagar Arun Kamble
Reviewed-by: Radoslaw Szwichtenberg
___
Intel-gfx mailin
On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote:
> Will be using pm for state containing RPS/RC6 state in the next patch.
>
> Cc: Imre Deak
> Cc: Chris Wilson
> Signed-off-by: Sagar Arun Kamble
Reviewed-by: Radoslaw Szwichtenberg
___
Intel
On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote:
> Prepared substructure rps for RPS related state. autoenable_work and
> pcu_lock are used for RC6 hence they are defined outside rps structure.
> Renamed the RPS lock as pcu_lock.
>
> Cc: Chris Wilson
> Cc: Imre Deak
> Signed-off-by: S
On Tue, 2017-09-19 at 23:11 +0530, Sagar Arun Kamble wrote:
> This function gives the status of RC6, whether disabled or if
> enabled then which state. intel_enable_rc6 will be used for
> enabling RC6 in the next patch.
>
> Cc: Chris Wilson
> Cc: Imre Deak
> Signed-off-by: Sagar Arun Kamble
Rev
On Fri, 2017-10-13 at 14:59 +0300, Arkadiusz Hiler wrote:
> General update to reflect current state of things.
>
> Signed-off-by: Arkadiusz Hiler
Acked-by: Radoslaw Szwichtenberg
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.
On Wed, 2017-10-18 at 11:10 +0530, Sagar Arun Kamble wrote:
>
> On 10/17/2017 6:13 PM, Radoslaw Szwichtenberg wrote:
> > Moving code out of the boost function will allow its usage
> > in other/new test scenarios.
> >
> > Signed-off-by: Radoslaw Szwichtenberg
> > Cc: Sagar Arun Kamble
> > ---
>
On Tue, 2017-08-08 at 15:09 -0700, Vinay Belgaumkar wrote:
> This is an RFC for adding documentation to IGT subtests. Each subtest can have
> something similar to a WHAT - explaining what the subtest actually does,
> and a WHY - which explains a use case, if applicable. Additionally,
> include comm
On Fri, 2017-08-04 at 12:20 +0100, Lionel Landwerlin wrote:
> We want the absolute max the hardware can do, not the max value
> set by a previous application/user.
>
> Signed-off-by: Lionel Landwerlin
> ---
> tests/perf.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/
On Fri, 2017-08-18 at 08:54 +0100, Chris Wilson wrote:
> Quoting Chris Wilson (2017-08-17 13:37:06)
> > If we miss the current vblank because the gpu was busy, that may cause a
> > jitter as the frame rate temporarily drops. We try to limit the impact
> > of this by then boosting the GPU clock to d
On Tue, 2017-08-22 at 01:31 +0300, Arkadiusz Hiler wrote:
> On Mon, Aug 21, 2017 at 09:39:24PM +0200, Daniel Vetter wrote:
> > On Mon, Aug 21, 2017 at 11:21:49AM +0100, Chris Wilson wrote:
> > > Quoting Chris Wilson (2017-08-21 10:53:36)
> > > > Quoting Arkadiusz Hiler (2017-08-21 10:42:25)
> > > >
On Tue, 2017-08-22 at 13:33 +0100, Chris Wilson wrote:
> Quoting Szwichtenberg, Radoslaw (2017-08-22 12:56:00)
> > On Tue, 2017-08-22 at 01:31 +0300, Arkadiusz Hiler wrote:
> > > On Mon, Aug 21, 2017 at 09:39:24PM +0200, Daniel Vetter wrote:
> > > > On Mon, Aug 21, 2
On Mon, 2017-08-28 at 10:50 +0200, Katarzyna Dec wrote:
> CI is observing sporadical failures in pm_rps subtests.
> There are a couple of reasons. One of them is the fact that
> on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
> is not set to RP0, but the value obtaind from PCODE (which
On Mon, 2017-08-28 at 11:12 +0300, Paul Kocialkowski wrote:
> This introduces plain-text documentation about the Chamelium aimed at
> users who wish to deploy the platform, as well as developers who wish
> to work on improving IGT support for it.
>
> Given the contents of this documentation, it fe
On Fri, 2017-08-11 at 10:20 +0200, Daniel Vetter wrote:
> On Thu, Aug 10, 2017 at 01:26:47PM +0300, Petri Latvala wrote:
> > The current documentation for tests is limited to a single string per
> > test binary. This patch adds support for documenting individual
> > subtests.
> >
> > The syntax fo
On Mon, 2017-09-04 at 12:27 +0300, Arkadiusz Hiler wrote:
> On Mon, Sep 04, 2017 at 10:45:19AM +0200, Daniel Vetter wrote:
> > On Mon, Sep 04, 2017 at 11:28:09AM +0300, Arkadiusz Hiler wrote:
> > > On Sat, Sep 02, 2017 at 07:03:56PM +0200, Daniel Vetter wrote:
> > > > We have it. Daniel Stone said
On Thu, 2017-09-07 at 14:15 +0200, Katarzyna Dec wrote:
> Added comments in tricky places for better feature understanding.
> Added IGT_TEST_DESCRIPTION and short description for non-obvious
> subtests.
> Changed name of 'magic' checkit() function to something meaningfull.
> Changed junk struct and
On Thu, 2017-09-07 at 11:28 -0700, Belgaumkar, Vinay wrote:
>
> On 9/7/2017 5:15 AM, Katarzyna Dec wrote:
> > Added comments in tricky places for better feature understanding.
> > Added IGT_TEST_DESCRIPTION and short description for non-obvious
> > subtests.
> > Changed name of 'magic' checkit() f
On Tue, 2017-09-05 at 14:36 +0200, Daniel Vetter wrote:
> Assuming we can get some consensus around this I'd like to merge it and
> polish the meson support in-tree, it's kinda growing into a bigger series
> already. And of course we need to keep autohell working for probably a
> fairly long time,
On Fri, 2017-09-01 at 12:55 +0530, Sagar Arun Kamble wrote:
> Input string parsing used in CRC control parameter parsing is generic
> and can be reused for other debugfs interfaces. Hence name it as
> buffer_tokenize instead of tieing to display_crc. Also fix the function
s/tieing/tying ?
> descipt
On Fri, 2017-09-01 at 12:55 +0530, Sagar Arun Kamble wrote:
> With GuC based SLPC, frequency control will be moved to GuC and Host will
> continue to control RC6 and Ring frequency setup. SLPC can be enabled in
> the GuC setup path and can happen in parallel in GuC with other i915 setup.
> Hence we
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