Re: [Intel-gfx] [PATCH 1/6] drm/i915: replace platform flags with a platform enum

[Joonas Lahtinen]

On ke, 2016-11-30 at 17:43 +0200, Jani Nikula wrote:
> The platform flags in device info are (mostly) mutually
> exclusive. Replace the flags with an enum. Add the platform enum also
> for platforms that previously didn't have a flag, and give them codename
> logging in dmesg.
> 
> Pineview remains an exception, the platform being G33 for that.
> 
> v2: Sort enum by gen and date
> 
> Signed-off-by: Jani Nikula 

The enum can be made into BIT() and the table can still be made with
some __builtin_ffs if that was found desireable.

With or without that;

Reviewed-by: Joonas Lahtinen 

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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[Intel-gfx] [PATCH 1/6] drm/i915: replace platform flags with a platform enum

[Jani Nikula]

The platform flags in device info are (mostly) mutually
exclusive. Replace the flags with an enum. Add the platform enum also
for platforms that previously didn't have a flag, and give them codename
logging in dmesg.

Pineview remains an exception, the platform being G33 for that.

v2: Sort enum by gen and date

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_debugfs.c  |  1 +
 drivers/gpu/drm/i915/i915_drv.h  | 76 +++-
 drivers/gpu/drm/i915/i915_gpu_error.c|  1 +
 drivers/gpu/drm/i915/i915_pci.c  | 53 +-
 drivers/gpu/drm/i915/intel_device_info.c | 40 -
 5 files changed, 117 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 2434130087be..15fb97dd9ed3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -77,6 +77,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
const struct intel_device_info *info = INTEL_INFO(dev_priv);
 
seq_printf(m, "gen: %d\n", INTEL_GEN(dev_priv));
+   seq_printf(m, "platform: %s\n", intel_platform_name(info->platform));
seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev_priv));
 #define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))
DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 297ad03ab0c2..494237ed084d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -686,24 +686,8 @@ struct intel_csr {
 };
 
 #define DEV_INFO_FOR_EACH_FLAG(func) \
-   /* Keep is_* in chronological order */ \
func(is_mobile); \
-   func(is_i85x); \
-   func(is_i915g); \
-   func(is_i945gm); \
-   func(is_g33); \
-   func(is_g4x); \
func(is_pineview); \
-   func(is_broadwater); \
-   func(is_crestline); \
-   func(is_ivybridge); \
-   func(is_valleyview); \
-   func(is_cherryview); \
-   func(is_haswell); \
-   func(is_broadwell); \
-   func(is_skylake); \
-   func(is_broxton); \
-   func(is_kabylake); \
func(is_alpha_support); \
/* Keep has_* in alphabetical order */ \
func(has_64bit_reloc); \
@@ -753,6 +737,34 @@ static inline unsigned int sseu_subslice_total(const 
struct sseu_dev_info *sseu)
return hweight8(sseu->slice_mask) * hweight8(sseu->subslice_mask);
 }
 
+/* Keep in gen based order, and chronological order within a gen */
+enum intel_platform {
+   INTEL_PLATFORM_UNINITIALIZED = 0,
+   INTEL_I830,
+   INTEL_I845G,
+   INTEL_I85X,
+   INTEL_I865G,
+   INTEL_I915G,
+   INTEL_I915GM,
+   INTEL_I945G,
+   INTEL_I945GM,
+   INTEL_G33,
+   INTEL_PINEVIEW,
+   INTEL_BROADWATER,
+   INTEL_CRESTLINE,
+   INTEL_G4X,
+   INTEL_IRONLAKE,
+   INTEL_SANDYBRIDGE,
+   INTEL_IVYBRIDGE,
+   INTEL_VALLEYVIEW,
+   INTEL_HASWELL,
+   INTEL_BROADWELL,
+   INTEL_CHERRYVIEW,
+   INTEL_SKYLAKE,
+   INTEL_BROXTON,
+   INTEL_KABYLAKE,
+};
+
 struct intel_device_info {
u32 display_mmio_offset;
u16 device_id;
@@ -760,6 +772,7 @@ struct intel_device_info {
u8 num_sprites[I915_MAX_PIPES];
u8 gen;
u16 gen_mask;
+   enum intel_platform platform;
u8 ring_mask; /* Rings supported by the HW */
u8 num_rings;
 #define DEFINE_FLAG(name) u8 name:1
@@ -2497,32 +2510,32 @@ intel_info(const struct drm_i915_private *dev_priv)
 
 #define IS_I830(dev_priv)  (INTEL_DEVID(dev_priv) == 0x3577)
 #define IS_845G(dev_priv)  (INTEL_DEVID(dev_priv) == 0x2562)
-#define IS_I85X(dev_priv)  ((dev_priv)->info.is_i85x)
+#define IS_I85X(dev_priv)  ((dev_priv)->info.platform == INTEL_I85X)
 #define IS_I865G(dev_priv) (INTEL_DEVID(dev_priv) == 0x2572)
-#define IS_I915G(dev_priv) ((dev_priv)->info.is_i915g)
+#define IS_I915G(dev_priv) ((dev_priv)->info.platform == INTEL_I915G)
 #define IS_I915GM(dev_priv)(INTEL_DEVID(dev_priv) == 0x2592)
 #define IS_I945G(dev_priv) (INTEL_DEVID(dev_priv) == 0x2772)
-#define IS_I945GM(dev_priv)((dev_priv)->info.is_i945gm)
-#define IS_BROADWATER(dev_priv)((dev_priv)->info.is_broadwater)
-#define IS_CRESTLINE(dev_priv) ((dev_priv)->info.is_crestline)
+#define IS_I945GM(dev_priv)((dev_priv)->info.platform == INTEL_I945GM)
+#define IS_BROADWATER(dev_priv)((dev_priv)->info.platform == 
INTEL_BROADWATER)
+#define IS_CRESTLINE(dev_priv) ((dev_priv)->info.platform == INTEL_CRESTLINE)
 #define IS_GM45(dev_priv)  (INTEL_DEVID(dev_priv) == 0x2A42)
-#define IS_G4X(dev_priv)   ((dev_priv)->info.is_g4x)
+#define IS_G4X(dev_priv)   ((dev_priv)->info.platform == INTEL_G4X)
 #define IS_PINEVIEW_G(dev_priv)(INTEL_DEVID(dev_priv) == 0xa001)
 #define IS_PINEVIEW_M(dev_priv)(INTEL_DEVID(dev_priv) ==