Re: [Intel-gfx] [PATCH 12/13] drm/i915/psr: use struct drm_device based logging

2020-03-25 Thread Daniel Vetter 
On Fri, Mar 20, 2020 at 04:36:37PM +0200, Jani Nikula wrote:
> Convert all the DRM_* logging macros to the struct drm_device based
> macros to provide device specific logging.
> 
> No functional changes.
> 
> Generated using the following semantic patch, originally written by
> Wambui Karuga , with manual fixups on top:
> 
> @@
> identifier fn, T;
> @@
> 
> fn(...,struct drm_i915_private *T,...) {
> <+...
> (
> -DRM_INFO(
> +drm_info(>drm,
> ...)
> |
> -DRM_NOTE(
> +drm_notice(>drm,
> ...)
> |
> -DRM_ERROR(
> +drm_err(>drm,
> ...)
> |
> -DRM_WARN(
> +drm_warn(>drm,
> ...)
> |
> -DRM_DEBUG_DRIVER(
> +drm_dbg(>drm,
> ...)
> |
> -DRM_DEBUG_KMS(
> +drm_dbg_kms(>drm,
> ...)
> |
> -DRM_DEBUG_ATOMIC(
> +drm_dbg_atomic(>drm,
> ...)
> )
> ...+>
> }
> 
> @@
> identifier fn, T;
> @@
> 
> fn(...) {
> ...
> struct drm_i915_private *T = ...;
> <+...
> (
> -DRM_INFO(
> +drm_info(>drm,
> ...)
> |
> -DRM_NOTE(
> +drm_notice(>drm,
> ...)
> |
> -DRM_ERROR(
> +drm_err(>drm,
> ...)
> |
> -DRM_WARN(
> +drm_warn(>drm,
> ...)
> |
> -DRM_DEBUG_DRIVER(
> +drm_dbg(>drm,
> ...)
> |
> -DRM_DEBUG_KMS(
> +drm_dbg_kms(>drm,
> ...)
> |
> -DRM_DEBUG_ATOMIC(
> +drm_dbg_atomic(>drm,
> ...)
> )
> ...+>
> }
> 
> Cc: Wambui Karuga 
> Signed-off-by: Jani Nikula 
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 47 +---
>  1 file changed, 26 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index fd9b146e3aba..a0569fdfeb16 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -137,41 +137,42 @@ static void psr_irq_control(struct drm_i915_private 
> *dev_priv)
>   intel_de_write(dev_priv, imr_reg, val);
>  }
>  
> -static void psr_event_print(u32 val, bool psr2_enabled)
> +static void psr_event_print(struct drm_i915_private *i915,
> + u32 val, bool psr2_enabled)
>  {
> - DRM_DEBUG_KMS("PSR exit events: 0x%x\n", val);
> + drm_dbg_kms(>drm, "PSR exit events: 0x%x\n", val);
>   if (val & PSR_EVENT_PSR2_WD_TIMER_EXPIRE)
> - DRM_DEBUG_KMS("\tPSR2 watchdog timer expired\n");
> + drm_dbg_kms(>drm, "\tPSR2 watchdog timer expired\n");
>   if ((val & PSR_EVENT_PSR2_DISABLED) && psr2_enabled)
> - DRM_DEBUG_KMS("\tPSR2 disabled\n");
> + drm_dbg_kms(>drm, "\tPSR2 disabled\n");
>   if (val & PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN)
> - DRM_DEBUG_KMS("\tSU dirty FIFO underrun\n");
> + drm_dbg_kms(>drm, "\tSU dirty FIFO underrun\n");
>   if (val & PSR_EVENT_SU_CRC_FIFO_UNDERRUN)
> - DRM_DEBUG_KMS("\tSU CRC FIFO underrun\n");
> + drm_dbg_kms(>drm, "\tSU CRC FIFO underrun\n");
>   if (val & PSR_EVENT_GRAPHICS_RESET)
> - DRM_DEBUG_KMS("\tGraphics reset\n");
> + drm_dbg_kms(>drm, "\tGraphics reset\n");
>   if (val & PSR_EVENT_PCH_INTERRUPT)
> - DRM_DEBUG_KMS("\tPCH interrupt\n");
> + drm_dbg_kms(>drm, "\tPCH interrupt\n");
>   if (val & PSR_EVENT_MEMORY_UP)
> - DRM_DEBUG_KMS("\tMemory up\n");
> + drm_dbg_kms(>drm, "\tMemory up\n");
>   if (val & PSR_EVENT_FRONT_BUFFER_MODIFY)
> - DRM_DEBUG_KMS("\tFront buffer modification\n");
> + drm_dbg_kms(>drm, "\tFront buffer modification\n");
>   if (val & PSR_EVENT_WD_TIMER_EXPIRE)
> - DRM_DEBUG_KMS("\tPSR watchdog timer expired\n");
> + drm_dbg_kms(>drm, "\tPSR watchdog timer expired\n");
>   if (val & PSR_EVENT_PIPE_REGISTERS_UPDATE)
> - DRM_DEBUG_KMS("\tPIPE registers updated\n");
> + drm_dbg_kms(>drm, "\tPIPE registers updated\n");
>   if (val & PSR_EVENT_REGISTER_UPDATE)
> - DRM_DEBUG_KMS("\tRegister updated\n");
> + drm_dbg_kms(>drm, "\tRegister updated\n");
>   if (val & PSR_EVENT_HDCP_ENABLE)
> - DRM_DEBUG_KMS("\tHDCP enabled\n");
> + drm_dbg_kms(>drm, "\tHDCP enabled\n");
>   if (val & PSR_EVENT_KVMR_SESSION_ENABLE)
> - DRM_DEBUG_KMS("\tKVMR session enabled\n");
> + drm_dbg_kms(>drm, "\tKVMR session enabled\n");
>   if (val & PSR_EVENT_VBI_ENABLE)
> - DRM_DEBUG_KMS("\tVBI enabled\n");
> + drm_dbg_kms(>drm, "\tVBI enabled\n");
>   if (val & PSR_EVENT_LPSP_MODE_EXIT)
> - DRM_DEBUG_KMS("\tLPSP mode exited\n");
> + drm_dbg_kms(>drm, "\tLPSP mode exited\n");
>   if ((val & PSR_EVENT_PSR_DISABLE) && !psr2_enabled)
> - DRM_DEBUG_KMS("\tPSR disabled\n");
> + drm_dbg_kms(>drm, "\tPSR disabled\n");
>  }
>  
>  void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir)
> @@ -209,7 +210,7 @@ void intel_psr_irq_handler(struct drm_i915_private 
> *dev_priv, u32 psr_iir)
>  
>   intel_de_write(dev_priv, PSR_EVENT(cpu_transcoder),
>

[Intel-gfx] [PATCH 12/13] drm/i915/psr: use struct drm_device based logging

2020-03-20 Thread Jani Nikula 
Convert all the DRM_* logging macros to the struct drm_device based
macros to provide device specific logging.

No functional changes.

Generated using the following semantic patch, originally written by
Wambui Karuga , with manual fixups on top:

@@
identifier fn, T;
@@

fn(...,struct drm_i915_private *T,...) {
<+...
(
-DRM_INFO(
+drm_info(>drm,
...)
|
-DRM_NOTE(
+drm_notice(>drm,
...)
|
-DRM_ERROR(
+drm_err(>drm,
...)
|
-DRM_WARN(
+drm_warn(>drm,
...)
|
-DRM_DEBUG_DRIVER(
+drm_dbg(>drm,
...)
|
-DRM_DEBUG_KMS(
+drm_dbg_kms(>drm,
...)
|
-DRM_DEBUG_ATOMIC(
+drm_dbg_atomic(>drm,
...)
)
...+>
}

@@
identifier fn, T;
@@

fn(...) {
...
struct drm_i915_private *T = ...;
<+...
(
-DRM_INFO(
+drm_info(>drm,
...)
|
-DRM_NOTE(
+drm_notice(>drm,
...)
|
-DRM_ERROR(
+drm_err(>drm,
...)
|
-DRM_WARN(
+drm_warn(>drm,
...)
|
-DRM_DEBUG_DRIVER(
+drm_dbg(>drm,
...)
|
-DRM_DEBUG_KMS(
+drm_dbg_kms(>drm,
...)
|
-DRM_DEBUG_ATOMIC(
+drm_dbg_atomic(>drm,
...)
)
...+>
}

Cc: Wambui Karuga 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 47 +---
 1 file changed, 26 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index fd9b146e3aba..a0569fdfeb16 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -137,41 +137,42 @@ static void psr_irq_control(struct drm_i915_private 
*dev_priv)
intel_de_write(dev_priv, imr_reg, val);
 }
 
-static void psr_event_print(u32 val, bool psr2_enabled)
+static void psr_event_print(struct drm_i915_private *i915,
+   u32 val, bool psr2_enabled)
 {
-   DRM_DEBUG_KMS("PSR exit events: 0x%x\n", val);
+   drm_dbg_kms(>drm, "PSR exit events: 0x%x\n", val);
if (val & PSR_EVENT_PSR2_WD_TIMER_EXPIRE)
-   DRM_DEBUG_KMS("\tPSR2 watchdog timer expired\n");
+   drm_dbg_kms(>drm, "\tPSR2 watchdog timer expired\n");
if ((val & PSR_EVENT_PSR2_DISABLED) && psr2_enabled)
-   DRM_DEBUG_KMS("\tPSR2 disabled\n");
+   drm_dbg_kms(>drm, "\tPSR2 disabled\n");
if (val & PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN)
-   DRM_DEBUG_KMS("\tSU dirty FIFO underrun\n");
+   drm_dbg_kms(>drm, "\tSU dirty FIFO underrun\n");
if (val & PSR_EVENT_SU_CRC_FIFO_UNDERRUN)
-   DRM_DEBUG_KMS("\tSU CRC FIFO underrun\n");
+   drm_dbg_kms(>drm, "\tSU CRC FIFO underrun\n");
if (val & PSR_EVENT_GRAPHICS_RESET)
-   DRM_DEBUG_KMS("\tGraphics reset\n");
+   drm_dbg_kms(>drm, "\tGraphics reset\n");
if (val & PSR_EVENT_PCH_INTERRUPT)
-   DRM_DEBUG_KMS("\tPCH interrupt\n");
+   drm_dbg_kms(>drm, "\tPCH interrupt\n");
if (val & PSR_EVENT_MEMORY_UP)
-   DRM_DEBUG_KMS("\tMemory up\n");
+   drm_dbg_kms(>drm, "\tMemory up\n");
if (val & PSR_EVENT_FRONT_BUFFER_MODIFY)
-   DRM_DEBUG_KMS("\tFront buffer modification\n");
+   drm_dbg_kms(>drm, "\tFront buffer modification\n");
if (val & PSR_EVENT_WD_TIMER_EXPIRE)
-   DRM_DEBUG_KMS("\tPSR watchdog timer expired\n");
+   drm_dbg_kms(>drm, "\tPSR watchdog timer expired\n");
if (val & PSR_EVENT_PIPE_REGISTERS_UPDATE)
-   DRM_DEBUG_KMS("\tPIPE registers updated\n");
+   drm_dbg_kms(>drm, "\tPIPE registers updated\n");
if (val & PSR_EVENT_REGISTER_UPDATE)
-   DRM_DEBUG_KMS("\tRegister updated\n");
+   drm_dbg_kms(>drm, "\tRegister updated\n");
if (val & PSR_EVENT_HDCP_ENABLE)
-   DRM_DEBUG_KMS("\tHDCP enabled\n");
+   drm_dbg_kms(>drm, "\tHDCP enabled\n");
if (val & PSR_EVENT_KVMR_SESSION_ENABLE)
-   DRM_DEBUG_KMS("\tKVMR session enabled\n");
+   drm_dbg_kms(>drm, "\tKVMR session enabled\n");
if (val & PSR_EVENT_VBI_ENABLE)
-   DRM_DEBUG_KMS("\tVBI enabled\n");
+   drm_dbg_kms(>drm, "\tVBI enabled\n");
if (val & PSR_EVENT_LPSP_MODE_EXIT)
-   DRM_DEBUG_KMS("\tLPSP mode exited\n");
+   drm_dbg_kms(>drm, "\tLPSP mode exited\n");
if ((val & PSR_EVENT_PSR_DISABLE) && !psr2_enabled)
-   DRM_DEBUG_KMS("\tPSR disabled\n");
+   drm_dbg_kms(>drm, "\tPSR disabled\n");
 }
 
 void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir)
@@ -209,7 +210,7 @@ void intel_psr_irq_handler(struct drm_i915_private 
*dev_priv, u32 psr_iir)
 
intel_de_write(dev_priv, PSR_EVENT(cpu_transcoder),
   val);
-   psr_event_print(val, psr2_enabled);
+   psr_event_print(dev_priv, val, psr2_enabled);
}
}
 
@@ -249,18 +250,21 @@ static bool intel_dp_get_alpm_status(struct intel_dp 
*intel_dp)
 
 static u8