Re: [Intel-gfx] [PATCH 26/43] drm/i915: Define Intel HDCP2.2 registers

2018-02-25 Thread Ramalingam C
On Thursday 22 February 2018 09:13 PM, Sean Paul wrote: On Wed, Feb 14, 2018 at 07:43:41PM +0530, Ramalingam C wrote: Intel HDCP2.2 registers are defined with addr offsets and bit details. Macros are defined for referencing the register offsets based on the port index. Signed-off-by:

Re: [Intel-gfx] [PATCH 26/43] drm/i915: Define Intel HDCP2.2 registers

2018-02-22 Thread Sean Paul
On Wed, Feb 14, 2018 at 07:43:41PM +0530, Ramalingam C wrote: > Intel HDCP2.2 registers are defined with addr offsets and bit details. > > Macros are defined for referencing the register offsets based on the > port index. > > Signed-off-by: Ramalingam C > --- >

[Intel-gfx] [PATCH 26/43] drm/i915: Define Intel HDCP2.2 registers

2018-02-14 Thread Ramalingam C
Intel HDCP2.2 registers are defined with addr offsets and bit details. Macros are defined for referencing the register offsets based on the port index. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/i915_reg.h | 120 1 file