Re: [Intel-gfx] [PATCH 5/9] drm/i915/gen9: minimum scanlines for Y tile is not always 4

2016-09-27 Thread Tvrtko Ursulin
Hi, On 22/09/2016 22:00, Paulo Zanoni wrote: During watermarks calculations, this value is used in 3 different places. Only one of them was not using a hardcoded 4. Move the code up so everybody can benefit from the actual value. This should only help on situations with Y tiling + 90/270

[Intel-gfx] [PATCH 5/9] drm/i915/gen9: minimum scanlines for Y tile is not always 4

2016-09-22 Thread Paulo Zanoni
During watermarks calculations, this value is used in 3 different places. Only one of them was not using a hardcoded 4. Move the code up so everybody can benefit from the actual value. This should only help on situations with Y tiling + 90/270 rotation + 1 or 2 bpp or NV12. Cc:

Re: [Intel-gfx] [PATCH 5/9] drm/i915/gen9: minimum scanlines for Y tile is not always 4

2016-09-15 Thread Maarten Lankhorst
Op 14-09-16 om 02:38 schreef Paulo Zanoni: > During watermarks calculations, this value is used in 3 different > places. Only one of them was not using a hardcoded 4. Move the code up > so everybody can benefit from the actual value. > > This should only help on situations with Y tiling + 90/270

[Intel-gfx] [PATCH 5/9] drm/i915/gen9: minimum scanlines for Y tile is not always 4

2016-09-13 Thread Paulo Zanoni
During watermarks calculations, this value is used in 3 different places. Only one of them was not using a hardcoded 4. Move the code up so everybody can benefit from the actual value. This should only help on situations with Y tiling + 90/270 rotation + 1 or 2 bpp or NV12. Signed-off-by: Paulo