[Intel-gfx] [PATCH i-g-t 3/3] i915/gem_ctx_isolation: Check engine relative registers - Part 2

[Dale B Stimson]

Modify previous i915/gem_ctx_isolation "Check engine relative registers"
for modified mmio_base infrastructure.

Signed-off-by: Dale B Stimson 
---
 tests/i915/gem_ctx_isolation.c | 87 +++---
 1 file changed, 48 insertions(+), 39 deletions(-)

diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index eff4b1df2..eec78c729 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -233,12 +233,12 @@ static bool ignore_register(uint32_t offset, uint32_t 
mmio_base)
 static void tmpl_regs(int fd,
  uint32_t ctx,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  uint32_t handle,
  uint32_t value)
 {
const unsigned int gen_bit = 1 << intel_gen(intel_get_drm_devid(fd));
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int regs_size;
uint32_t *regs;
 
@@ -278,12 +278,12 @@ static void tmpl_regs(int fd,
 static uint32_t read_regs(int fd,
  uint32_t ctx,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  unsigned int flags)
 {
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
const bool r64b = gen >= 8;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_relocation_entry *reloc;
@@ -359,12 +359,12 @@ static uint32_t read_regs(int fd,
 static void write_regs(int fd,
   uint32_t ctx,
   const struct intel_execution_engine2 *e,
+  uint32_t mmio_base,
   unsigned int flags,
   uint32_t value)
 {
const unsigned int gen_bit = 1 << intel_gen(intel_get_drm_devid(fd));
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
struct drm_i915_gem_exec_object2 obj;
struct drm_i915_gem_execbuffer2 execbuf;
unsigned int batch_size;
@@ -420,13 +420,13 @@ static void write_regs(int fd,
 static void restore_regs(int fd,
 uint32_t ctx,
 const struct intel_execution_engine2 *e,
+uint32_t mmio_base,
 unsigned int flags,
 uint32_t regs)
 {
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
const bool r64b = gen >= 8;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_execbuffer2 execbuf;
@@ -498,12 +498,12 @@ static void restore_regs(int fd,
 __attribute__((unused))
 static void dump_regs(int fd,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  unsigned int regs)
 {
const int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int regs_size;
uint32_t *out;
 
@@ -541,9 +541,9 @@ static void dump_regs(int fd,
 }
 
 static void compare_regs(int fd, const struct intel_execution_engine2 *e,
+uint32_t mmio_base,
 uint32_t A, uint32_t B, const char *who)
 {
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int num_errors;
unsigned int regs_size;
uint32_t *a, *b;
@@ -596,6 +596,7 @@ static void compare_regs(int fd, const struct 
intel_execution_engine2 *e,
 
 static void nonpriv(int fd,
const struct intel_execution_engine2 *e,
+   uint32_t mmio_base,
unsigned int flags)
 {
static const uint32_t values[] = {
@@ -623,16 +624,16 @@ static void nonpriv(int fd,
 
ctx = gem_context_clone_with_engines(fd, 0);
 
-   tmpl = read_regs(fd, ctx, e, flags);
-   regs[0] = read_regs(fd, ctx, e, flags);
+   tmpl = read_regs(fd, ctx, e, mmio_base, flags);
+   regs[0] = read_regs(fd, ctx, e, mmio_base, flags);
 
-   tmpl_regs(fd, ctx, e, tmpl, values[v]);
+   tmpl_regs(fd, ctx, e, mmio_base, tmpl, values[v]);
 
spin = igt_spin_new(fd, .ctx = ctx, .engine = e->flags);
 

[Intel-gfx] [PATCH i-g-t 3/3] i915/gem_ctx_isolation: Check engine relative registers - Part 2

[Dale B Stimson]

Modify previous i915/gem_ctx_isolation "Check engine relative registers"
for modified mmio_base infrastructure.

Signed-off-by: Dale B Stimson 
---
 tests/i915/gem_ctx_isolation.c | 87 +++---
 1 file changed, 48 insertions(+), 39 deletions(-)

diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index eff4b1df2..eec78c729 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -233,12 +233,12 @@ static bool ignore_register(uint32_t offset, uint32_t 
mmio_base)
 static void tmpl_regs(int fd,
  uint32_t ctx,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  uint32_t handle,
  uint32_t value)
 {
const unsigned int gen_bit = 1 << intel_gen(intel_get_drm_devid(fd));
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int regs_size;
uint32_t *regs;
 
@@ -278,12 +278,12 @@ static void tmpl_regs(int fd,
 static uint32_t read_regs(int fd,
  uint32_t ctx,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  unsigned int flags)
 {
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
const bool r64b = gen >= 8;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_relocation_entry *reloc;
@@ -359,12 +359,12 @@ static uint32_t read_regs(int fd,
 static void write_regs(int fd,
   uint32_t ctx,
   const struct intel_execution_engine2 *e,
+  uint32_t mmio_base,
   unsigned int flags,
   uint32_t value)
 {
const unsigned int gen_bit = 1 << intel_gen(intel_get_drm_devid(fd));
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
struct drm_i915_gem_exec_object2 obj;
struct drm_i915_gem_execbuffer2 execbuf;
unsigned int batch_size;
@@ -420,13 +420,13 @@ static void write_regs(int fd,
 static void restore_regs(int fd,
 uint32_t ctx,
 const struct intel_execution_engine2 *e,
+uint32_t mmio_base,
 unsigned int flags,
 uint32_t regs)
 {
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
const bool r64b = gen >= 8;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_execbuffer2 execbuf;
@@ -498,12 +498,12 @@ static void restore_regs(int fd,
 __attribute__((unused))
 static void dump_regs(int fd,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  unsigned int regs)
 {
const int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int regs_size;
uint32_t *out;
 
@@ -541,9 +541,9 @@ static void dump_regs(int fd,
 }
 
 static void compare_regs(int fd, const struct intel_execution_engine2 *e,
+uint32_t mmio_base,
 uint32_t A, uint32_t B, const char *who)
 {
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int num_errors;
unsigned int regs_size;
uint32_t *a, *b;
@@ -596,6 +596,7 @@ static void compare_regs(int fd, const struct 
intel_execution_engine2 *e,
 
 static void nonpriv(int fd,
const struct intel_execution_engine2 *e,
+   uint32_t mmio_base,
unsigned int flags)
 {
static const uint32_t values[] = {
@@ -623,16 +624,16 @@ static void nonpriv(int fd,
 
ctx = gem_context_clone_with_engines(fd, 0);
 
-   tmpl = read_regs(fd, ctx, e, flags);
-   regs[0] = read_regs(fd, ctx, e, flags);
+   tmpl = read_regs(fd, ctx, e, mmio_base, flags);
+   regs[0] = read_regs(fd, ctx, e, mmio_base, flags);
 
-   tmpl_regs(fd, ctx, e, tmpl, values[v]);
+   tmpl_regs(fd, ctx, e, mmio_base, tmpl, values[v]);
 
spin = igt_spin_new(fd, .ctx = ctx, .engine = e->flags);
 

[Intel-gfx] [PATCH i-g-t 3/3] i915/gem_ctx_isolation: Check engine relative registers - Part 2

[Dale B Stimson]

Modify previous i915/gem_ctx_isolation "Check engine relative registers"
for modified mmio_base infrastructure.

Signed-off-by: Dale B Stimson 
---
 tests/i915/gem_ctx_isolation.c | 87 +++---
 1 file changed, 48 insertions(+), 39 deletions(-)

diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index eff4b1df2..eec78c729 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -233,12 +233,12 @@ static bool ignore_register(uint32_t offset, uint32_t 
mmio_base)
 static void tmpl_regs(int fd,
  uint32_t ctx,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  uint32_t handle,
  uint32_t value)
 {
const unsigned int gen_bit = 1 << intel_gen(intel_get_drm_devid(fd));
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int regs_size;
uint32_t *regs;
 
@@ -278,12 +278,12 @@ static void tmpl_regs(int fd,
 static uint32_t read_regs(int fd,
  uint32_t ctx,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  unsigned int flags)
 {
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
const bool r64b = gen >= 8;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_relocation_entry *reloc;
@@ -359,12 +359,12 @@ static uint32_t read_regs(int fd,
 static void write_regs(int fd,
   uint32_t ctx,
   const struct intel_execution_engine2 *e,
+  uint32_t mmio_base,
   unsigned int flags,
   uint32_t value)
 {
const unsigned int gen_bit = 1 << intel_gen(intel_get_drm_devid(fd));
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
struct drm_i915_gem_exec_object2 obj;
struct drm_i915_gem_execbuffer2 execbuf;
unsigned int batch_size;
@@ -420,13 +420,13 @@ static void write_regs(int fd,
 static void restore_regs(int fd,
 uint32_t ctx,
 const struct intel_execution_engine2 *e,
+uint32_t mmio_base,
 unsigned int flags,
 uint32_t regs)
 {
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
const bool r64b = gen >= 8;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_execbuffer2 execbuf;
@@ -498,12 +498,12 @@ static void restore_regs(int fd,
 __attribute__((unused))
 static void dump_regs(int fd,
  const struct intel_execution_engine2 *e,
+ uint32_t mmio_base,
  unsigned int regs)
 {
const int gen = intel_gen(intel_get_drm_devid(fd));
const unsigned int gen_bit = 1 << gen;
const unsigned int engine_bit = ENGINE(e->class, e->instance);
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int regs_size;
uint32_t *out;
 
@@ -541,9 +541,9 @@ static void dump_regs(int fd,
 }
 
 static void compare_regs(int fd, const struct intel_execution_engine2 *e,
+uint32_t mmio_base,
 uint32_t A, uint32_t B, const char *who)
 {
-   const uint32_t mmio_base = gem_engine_mmio_base(fd, e->name);
unsigned int num_errors;
unsigned int regs_size;
uint32_t *a, *b;
@@ -596,6 +596,7 @@ static void compare_regs(int fd, const struct 
intel_execution_engine2 *e,
 
 static void nonpriv(int fd,
const struct intel_execution_engine2 *e,
+   uint32_t mmio_base,
unsigned int flags)
 {
static const uint32_t values[] = {
@@ -623,16 +624,16 @@ static void nonpriv(int fd,
 
ctx = gem_context_clone_with_engines(fd, 0);
 
-   tmpl = read_regs(fd, ctx, e, flags);
-   regs[0] = read_regs(fd, ctx, e, flags);
+   tmpl = read_regs(fd, ctx, e, mmio_base, flags);
+   regs[0] = read_regs(fd, ctx, e, mmio_base, flags);
 
-   tmpl_regs(fd, ctx, e, tmpl, values[v]);
+   tmpl_regs(fd, ctx, e, mmio_base, tmpl, values[v]);
 
spin = igt_spin_new(fd, .ctx = ctx, .engine = e->flags);