Now that we have that information in topology fields, let's just reuse it.

v2: Style tweaks (Tvrtko)

Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Acked-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_debugfs.c      | 27 +++++++++++----------------
 drivers/gpu/drm/i915/intel_device_info.c |  2 +-
 2 files changed, 12 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 67ba0484b415..653eedee411c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4337,11 +4337,11 @@ static void gen10_sseu_device_status(struct 
drm_i915_private *dev_priv,
                                     struct sseu_dev_info *sseu)
 {
        const struct intel_device_info *info = INTEL_INFO(dev_priv);
-       int s_max = 6, ss_max = 4;
        int s, ss;
-       u32 s_reg[s_max], eu_reg[2 * s_max], eu_mask[2];
+       u32 s_reg[info->sseu.max_slices];
+       u32 eu_reg[2 * info->sseu.max_subslices], eu_mask[2];
 
-       for (s = 0; s < s_max; s++) {
+       for (s = 0; s < info->sseu.max_slices; s++) {
                /*
                 * FIXME: Valid SS Mask respects the spec and read
                 * only valid bits for those registers, excluding reserverd
@@ -4363,7 +4363,7 @@ static void gen10_sseu_device_status(struct 
drm_i915_private *dev_priv,
                     GEN9_PGCTL_SSB_EU210_ACK |
                     GEN9_PGCTL_SSB_EU311_ACK;
 
-       for (s = 0; s < s_max; s++) {
+       for (s = 0; s < info->sseu.max_slices; s++) {
                if ((s_reg[s] & GEN9_PGCTL_SLICE_ACK) == 0)
                        /* skip disabled slice */
                        continue;
@@ -4371,7 +4371,7 @@ static void gen10_sseu_device_status(struct 
drm_i915_private *dev_priv,
                sseu->slice_mask |= BIT(s);
                sseu->subslice_mask[s] = info->sseu.subslice_mask[s];
 
-               for (ss = 0; ss < ss_max; ss++) {
+               for (ss = 0; ss < info->sseu.max_subslices; ss++) {
                        unsigned int eu_cnt;
 
                        if (!(s_reg[s] & (GEN9_PGCTL_SS_ACK(ss))))
@@ -4391,17 +4391,12 @@ static void gen10_sseu_device_status(struct 
drm_i915_private *dev_priv,
 static void gen9_sseu_device_status(struct drm_i915_private *dev_priv,
                                    struct sseu_dev_info *sseu)
 {
-       int s_max = 3, ss_max = 4;
+       const struct intel_device_info *info = INTEL_INFO(dev_priv);
        int s, ss;
-       u32 s_reg[s_max], eu_reg[2*s_max], eu_mask[2];
-
-       /* BXT has a single slice and at most 3 subslices. */
-       if (IS_GEN9_LP(dev_priv)) {
-               s_max = 1;
-               ss_max = 3;
-       }
+       u32 s_reg[info->sseu.max_slices];
+       u32 eu_reg[2 * info->sseu.max_subslices], eu_mask[2];
 
-       for (s = 0; s < s_max; s++) {
+       for (s = 0; s < info->sseu.max_slices; s++) {
                s_reg[s] = I915_READ(GEN9_SLICE_PGCTL_ACK(s));
                eu_reg[2*s] = I915_READ(GEN9_SS01_EU_PGCTL_ACK(s));
                eu_reg[2*s + 1] = I915_READ(GEN9_SS23_EU_PGCTL_ACK(s));
@@ -4416,7 +4411,7 @@ static void gen9_sseu_device_status(struct 
drm_i915_private *dev_priv,
                     GEN9_PGCTL_SSB_EU210_ACK |
                     GEN9_PGCTL_SSB_EU311_ACK;
 
-       for (s = 0; s < s_max; s++) {
+       for (s = 0; s < info->sseu.max_slices; s++) {
                if ((s_reg[s] & GEN9_PGCTL_SLICE_ACK) == 0)
                        /* skip disabled slice */
                        continue;
@@ -4427,7 +4422,7 @@ static void gen9_sseu_device_status(struct 
drm_i915_private *dev_priv,
                        sseu->subslice_mask[s] =
                                INTEL_INFO(dev_priv)->sseu.subslice_mask[s];
 
-               for (ss = 0; ss < ss_max; ss++) {
+               for (ss = 0; ss < info->sseu.max_subslices; ss++) {
                        unsigned int eu_cnt;
 
                        if (IS_GEN9_LP(dev_priv)) {
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index 463bf72028c5..361621278e0c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -320,7 +320,7 @@ static void gen9_sseu_info_init(struct drm_i915_private 
*dev_priv)
                                /* skip disabled subslice */
                                continue;
 
-                       eu_disabled_mask = (eu_disable >> (ss*8)) & eu_mask;
+                       eu_disabled_mask = (eu_disable >> (ss * 8)) & eu_mask;
 
                        sseu_set_eus(sseu, s, ss, ~eu_disabled_mask);
 
-- 
2.16.1

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