On Wed, Jun 13, 2018 at 08:27:46PM +0300, Imre Deak wrote:
> On ICL the pipe clock needs to be enabled before setting the HDMI
> infoframe, but these steps are in the reverse order atm. Move the pipe
> clock enabling to the encoders, so reordering of the two steps can be
> done in a clean way.
>
> No functional change.
>
> v2:
> - Rebased on drm-tip.
>
> Cc: Vandita Kulkarni
> Cc: Paulo Zanoni
> Cc: Ville Syrjälä
> Signed-off-by: Imre Deak
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_crt.c | 4
> drivers/gpu/drm/i915/intel_ddi.c | 8
> drivers/gpu/drm/i915/intel_display.c | 6 --
> 3 files changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_crt.c
> b/drivers/gpu/drm/i915/intel_crt.c
> index 211d601cd1b1..8daf170302a0 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -232,6 +232,8 @@ static void hsw_post_disable_crt(struct intel_encoder
> *encoder,
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>
> + intel_ddi_disable_pipe_clock(old_crtc_state);
> +
> pch_post_disable_crt(encoder, old_crtc_state, old_conn_state);
>
> lpt_disable_pch_transcoder(dev_priv);
> @@ -268,6 +270,8 @@ static void hsw_pre_enable_crt(struct intel_encoder
> *encoder,
> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
>
> dev_priv->display.fdi_link_train(crtc, crtc_state);
> +
> + intel_ddi_enable_pipe_clock(crtc_state);
> }
>
> static void hsw_enable_crt(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index ca73387bd596..df0e64a9721a 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2639,6 +2639,8 @@ static void intel_ddi_pre_enable_dp(struct
> intel_encoder *encoder,
> intel_dp_start_link_train(intel_dp);
> if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
> intel_dp_stop_link_train(intel_dp);
> +
> + intel_ddi_enable_pipe_clock(crtc_state);
> }
>
> static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
> @@ -2672,6 +2674,8 @@ static void intel_ddi_pre_enable_hdmi(struct
> intel_encoder *encoder,
> intel_dig_port->set_infoframes(&encoder->base,
> crtc_state->has_infoframe,
> crtc_state, conn_state);
> +
> + intel_ddi_enable_pipe_clock(crtc_state);
> }
>
> static void intel_ddi_pre_enable(struct intel_encoder *encoder,
> @@ -2738,6 +2742,8 @@ static void intel_ddi_post_disable_dp(struct
> intel_encoder *encoder,
> bool is_mst = intel_crtc_has_type(old_crtc_state,
> INTEL_OUTPUT_DP_MST);
>
> + intel_ddi_disable_pipe_clock(old_crtc_state);
> +
> /*
>* Power down sink before disabling the port, otherwise we end
>* up getting interrupts from the sink on detecting link loss.
> @@ -2763,6 +2769,8 @@ static void intel_ddi_post_disable_hdmi(struct
> intel_encoder *encoder,
> struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
> struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
>
> + intel_ddi_disable_pipe_clock(old_crtc_state);
> +
> intel_disable_ddi_buf(encoder);
>
> dig_port->set_infoframes(&encoder->base, false,
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index f8bbfc7ce7ce..cd10e83ec456 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5646,9 +5646,6 @@ static void haswell_crtc_enable(struct intel_crtc_state
> *pipe_config,
>
> intel_encoders_pre_enable(crtc, pipe_config, old_state);
>
> - if (!transcoder_is_dsi(cpu_transcoder))
> - intel_ddi_enable_pipe_clock(pipe_config);
> -
> if (intel_crtc_has_dp_encoder(intel_crtc->config))
> intel_dp_set_m_n(intel_crtc, M1_N1);
>
> @@ -5835,9 +5832,6 @@ static void haswell_crtc_disable(struct
> intel_crtc_state *old_crtc_state,
> else
> ironlake_pfit_disable(intel_crtc, false);
>
> - if (!transcoder_is_dsi(cpu_transcoder))
> - intel_ddi_disable_pipe_clock(old_crtc_state);
> -
> intel_encoders_post_disable(crtc, old_crtc_state, old_state);
>
> if (INTEL_GEN(dev_priv) >= 11)
> --
> 2.13.2
--
Ville Syrjälä
Intel
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