Re: [Intel-gfx] [PATCH] i915: Expose panel power cycle delay to i915_panel_timings
On Tue, 03 Dec 2019, Anshuamn Gupta wrote: > On 2019-11-28 at 16:05:03 +0200, Jani Nikula wrote: >> On Mon, 18 Nov 2019, Anshuman Gupta wrote: >> > Putting down the AUX power domain reference count in >> > edp vdd off async sequence takes too much of time >> > (relative to panel power cycle delay) therefore it make sense >> > to expose the panel power cycle delay to i915_panel_timings >> > along with other delays. >> > It can be use by DC state IGT to wait for strict power cycle delay >> > in order to check for various DC state counters. >> >> Catching up on review, are you suggesting to look at this kind of >> debugfs files for tests? Please find another way. > Actually on few panels power cycle delay is too much that it is required > to wait for 6 seconds in igt for an timeout, but this could really affect > CI execution time on panel with lesser power cycle delay. > (https://patchwork.freedesktop.org/series/68478/) > For this specific reason i thought it may be good to expose > panel power cycle delay with other panel delay and use that > in igt. Fix the kernel driver to DTRT instead of exposing the guts and having igt work around it. BR, Jani. > Thanks , > Anshuman. >> >> I don't mind having the debugfs info per se. >> >> BR, >> Jani. >> >> > >> > Cc: Imre Deak >> > Signed-off-by: Anshuman Gupta >> > --- >> > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ >> > 1 file changed, 2 insertions(+) >> > >> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c >> > b/drivers/gpu/drm/i915/i915_debugfs.c >> > index cab632791f73..c075cc2b7bb5 100644 >> > --- a/drivers/gpu/drm/i915/i915_debugfs.c >> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c >> > @@ -4436,6 +4436,8 @@ static int i915_panel_show(struct seq_file *m, void >> > *data) >> > intel_dp->panel_power_up_delay); >> >seq_printf(m, "Panel power down delay: %d\n", >> > intel_dp->panel_power_down_delay); >> > + seq_printf(m, "Panel power cycle delay: %d\n", >> > + intel_dp->panel_power_cycle_delay); >> >seq_printf(m, "Backlight on delay: %d\n", >> > intel_dp->backlight_on_delay); >> >seq_printf(m, "Backlight off delay: %d\n", >> >> -- >> Jani Nikula, Intel Open Source Graphics Center -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] i915: Expose panel power cycle delay to i915_panel_timings
On 2019-11-28 at 16:05:03 +0200, Jani Nikula wrote: > On Mon, 18 Nov 2019, Anshuman Gupta wrote: > > Putting down the AUX power domain reference count in > > edp vdd off async sequence takes too much of time > > (relative to panel power cycle delay) therefore it make sense > > to expose the panel power cycle delay to i915_panel_timings > > along with other delays. > > It can be use by DC state IGT to wait for strict power cycle delay > > in order to check for various DC state counters. > > Catching up on review, are you suggesting to look at this kind of > debugfs files for tests? Please find another way. Actually on few panels power cycle delay is too much that it is required to wait for 6 seconds in igt for an timeout, but this could really affect CI execution time on panel with lesser power cycle delay. (https://patchwork.freedesktop.org/series/68478/) For this specific reason i thought it may be good to expose panel power cycle delay with other panel delay and use that in igt. Thanks , Anshuman. > > I don't mind having the debugfs info per se. > > BR, > Jani. > > > > > Cc: Imre Deak > > Signed-off-by: Anshuman Gupta > > --- > > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > > b/drivers/gpu/drm/i915/i915_debugfs.c > > index cab632791f73..c075cc2b7bb5 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -4436,6 +4436,8 @@ static int i915_panel_show(struct seq_file *m, void > > *data) > >intel_dp->panel_power_up_delay); > > seq_printf(m, "Panel power down delay: %d\n", > >intel_dp->panel_power_down_delay); > > + seq_printf(m, "Panel power cycle delay: %d\n", > > + intel_dp->panel_power_cycle_delay); > > seq_printf(m, "Backlight on delay: %d\n", > >intel_dp->backlight_on_delay); > > seq_printf(m, "Backlight off delay: %d\n", > > -- > Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] i915: Expose panel power cycle delay to i915_panel_timings
On Mon, 18 Nov 2019, Anshuman Gupta wrote: > Putting down the AUX power domain reference count in > edp vdd off async sequence takes too much of time > (relative to panel power cycle delay) therefore it make sense > to expose the panel power cycle delay to i915_panel_timings > along with other delays. > It can be use by DC state IGT to wait for strict power cycle delay > in order to check for various DC state counters. Catching up on review, are you suggesting to look at this kind of debugfs files for tests? Please find another way. I don't mind having the debugfs info per se. BR, Jani. > > Cc: Imre Deak > Signed-off-by: Anshuman Gupta > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index cab632791f73..c075cc2b7bb5 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -4436,6 +4436,8 @@ static int i915_panel_show(struct seq_file *m, void > *data) > intel_dp->panel_power_up_delay); > seq_printf(m, "Panel power down delay: %d\n", > intel_dp->panel_power_down_delay); > + seq_printf(m, "Panel power cycle delay: %d\n", > +intel_dp->panel_power_cycle_delay); > seq_printf(m, "Backlight on delay: %d\n", > intel_dp->backlight_on_delay); > seq_printf(m, "Backlight off delay: %d\n", -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
