Regards
Shashank
On 8/16/2017 9:42 PM, Imre Deak wrote:
On Wed, Aug 16, 2017 at 09:18:58PM +0530, Sharma, Shashank wrote:
Thanks for the review, Imre.
My comments, inline.
Regards
Shashank
On 8/16/2017 7:35 PM, Imre Deak wrote:
On Fri, Aug 11, 2017 at 06:58:26PM +0530, Shashank Sharma
On Wed, Aug 16, 2017 at 09:18:58PM +0530, Sharma, Shashank wrote:
> Thanks for the review, Imre.
>
> My comments, inline.
>
> Regards
> Shashank
> On 8/16/2017 7:35 PM, Imre Deak wrote:
> > On Fri, Aug 11, 2017 at 06:58:26PM +0530, Shashank Sharma wrote:
> > > It's an observation during some CI
Thanks for the review, Imre.
My comments, inline.
Regards
Shashank
On 8/16/2017 7:35 PM, Imre Deak wrote:
On Fri, Aug 11, 2017 at 06:58:26PM +0530, Shashank Sharma wrote:
It's an observation during some CI tests that few LSPCON chips
respond slow while system is under load, and need some
On Fri, 2017-08-11 at 18:58 +0530, Shashank Sharma wrote:
> It's an observation during some CI tests that few LSPCON chips
> respond slow while system is under load, and need some delay
Thanks for the patch. Can you please explain what you mean by load here?
I can't follow why an external chip
