Re: [Intel-gfx] [PATCH 4/8] drm/i915: Retry HDCP BKSV read
On Fri, Feb 02, 2018 at 07:56:22PM +0530, Ramalingam C wrote: > > > On Friday 02 February 2018 07:46 PM, Sean Paul wrote: > > On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote: > > > When BKSV is invalid, to mitigate any communication errors, > > > BKSV is read once again. > > Why is the Bksv read any more volatile than other reads? If the channel is > > noisy, the retries should be done in the shim implementation (I think there > > are > > already i2c retries). > > > > Sean > True. But compliance spec says that when we determine that bksv is invalid > (not with 20 1s), we should re-read and confirm. > CTS test 1A-05 test expect this behavior. Ah, ok. So this is different from what you wrote in the commit message. I think we can simplify this to make it more clear. > > --Ram > > > > > > Signed-off-by: Ramalingam C> > > --- > > > drivers/gpu/drm/i915/intel_hdcp.c | 13 + > > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_hdcp.c > > > b/drivers/gpu/drm/i915/intel_hdcp.c > > > index b3f407cef8b0..fa2e7c727d00 100644 > > > --- a/drivers/gpu/drm/i915/intel_hdcp.c > > > +++ b/drivers/gpu/drm/i915/intel_hdcp.c > > > @@ -401,7 +401,7 @@ static int intel_hdcp_auth(struct intel_connector > > > *connector) > > > struct drm_i915_private *dev_priv; > > > enum port port; > > > unsigned long r0_prime_gen_start; > > > - int ret, i; > > > + int ret, i, retry = 1; > > > union { > > > u32 reg[2]; > > > u8 shim[DRM_HDCP_AN_LEN]; > > > @@ -443,11 +443,16 @@ static int intel_hdcp_auth(struct intel_connector > > > *connector) > > > r0_prime_gen_start = jiffies; > > > memset(, 0, sizeof(bksv)); > > > - ret = shim->read_bksv(intel_dig_port, bksv.shim); > > > + > > > + do { > > > + ret = shim->read_bksv(intel_dig_port, bksv.shim); > > > + if (!ret) > > > + if (!intel_hdcp_is_ksv_valid(bksv.shim)) > > > + ret = -ENODEV; > > > + } while (ret && retry--); /* HDCP spec states that we must retry the bksv if it is invalid */ for (i = 0; i < bksv_tries; i++) { ret = shim->read_bksv(intel_dig_port, bksv.shim); if (ret) return ret; if (intel_hdcp_is_ksv_valid(bksv.shim)) break; } if (i == bksv_tries) return -ENODEV; > > > + > > > if (ret) > > > return ret; > > > - else if (!intel_hdcp_is_ksv_valid(bksv.shim)) > > > - return -ENODEV; > > > I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]); > > > I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]); > > > -- > > > 2.7.4 > > > > -- Sean Paul, Software Engineer, Google / Chromium OS ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 4/8] drm/i915: Retry HDCP BKSV read
On Friday 02 February 2018 07:46 PM, Sean Paul wrote: On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote: When BKSV is invalid, to mitigate any communication errors, BKSV is read once again. Why is the Bksv read any more volatile than other reads? If the channel is noisy, the retries should be done in the shim implementation (I think there are already i2c retries). Sean True. But compliance spec says that when we determine that bksv is invalid (not with 20 1s), we should re-read and confirm. CTS test 1A-05 test expect this behavior. --Ram Signed-off-by: Ramalingam C--- drivers/gpu/drm/i915/intel_hdcp.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index b3f407cef8b0..fa2e7c727d00 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -401,7 +401,7 @@ static int intel_hdcp_auth(struct intel_connector *connector) struct drm_i915_private *dev_priv; enum port port; unsigned long r0_prime_gen_start; - int ret, i; + int ret, i, retry = 1; union { u32 reg[2]; u8 shim[DRM_HDCP_AN_LEN]; @@ -443,11 +443,16 @@ static int intel_hdcp_auth(struct intel_connector *connector) r0_prime_gen_start = jiffies; memset(, 0, sizeof(bksv)); - ret = shim->read_bksv(intel_dig_port, bksv.shim); + + do { + ret = shim->read_bksv(intel_dig_port, bksv.shim); + if (!ret) + if (!intel_hdcp_is_ksv_valid(bksv.shim)) + ret = -ENODEV; + } while (ret && retry--); + if (ret) return ret; - else if (!intel_hdcp_is_ksv_valid(bksv.shim)) - return -ENODEV; I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]); I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]); -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 4/8] drm/i915: Retry HDCP BKSV read
On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote: > When BKSV is invalid, to mitigate any communication errors, > BKSV is read once again. Why is the Bksv read any more volatile than other reads? If the channel is noisy, the retries should be done in the shim implementation (I think there are already i2c retries). Sean > > Signed-off-by: Ramalingam C> --- > drivers/gpu/drm/i915/intel_hdcp.c | 13 + > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_hdcp.c > b/drivers/gpu/drm/i915/intel_hdcp.c > index b3f407cef8b0..fa2e7c727d00 100644 > --- a/drivers/gpu/drm/i915/intel_hdcp.c > +++ b/drivers/gpu/drm/i915/intel_hdcp.c > @@ -401,7 +401,7 @@ static int intel_hdcp_auth(struct intel_connector > *connector) > struct drm_i915_private *dev_priv; > enum port port; > unsigned long r0_prime_gen_start; > - int ret, i; > + int ret, i, retry = 1; > union { > u32 reg[2]; > u8 shim[DRM_HDCP_AN_LEN]; > @@ -443,11 +443,16 @@ static int intel_hdcp_auth(struct intel_connector > *connector) > r0_prime_gen_start = jiffies; > > memset(, 0, sizeof(bksv)); > - ret = shim->read_bksv(intel_dig_port, bksv.shim); > + > + do { > + ret = shim->read_bksv(intel_dig_port, bksv.shim); > + if (!ret) > + if (!intel_hdcp_is_ksv_valid(bksv.shim)) > + ret = -ENODEV; > + } while (ret && retry--); > + > if (ret) > return ret; > - else if (!intel_hdcp_is_ksv_valid(bksv.shim)) > - return -ENODEV; > > I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]); > I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]); > -- > 2.7.4 > -- Sean Paul, Software Engineer, Google / Chromium OS ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx