Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-15 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-08-15 12:51:28) > > On 14/08/2018 16:22, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-08-14 15:40:58) > > Looks like we should be able to hook this up to a selftest to confirm > > the modification does land in the target context image, and a SRM to > > confirm

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-15 Thread Tvrtko Ursulin
On 14/08/2018 16:22, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-08-14 15:40:58) +static int +i915_gem_context_reconfigure_sseu(struct i915_gem_context *ctx, + struct intel_engine_cs *engine, + struct intel_sseu sseu) +{ +

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-15 Thread Tvrtko Ursulin
On 14/08/2018 19:53, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-08-14 19:44:09) On 14/08/2018 15:59, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-08-14 15:40:58) From: Chris Wilson We want to allow userspace to reconfigure the subslice configuration for its own use case. To do

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-14 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-08-14 19:44:09) > > On 14/08/2018 15:59, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-08-14 15:40:58) > >> From: Chris Wilson > >> > >> We want to allow userspace to reconfigure the subslice configuration for > >> its own use case. To do so, we expose a

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-14 Thread Tvrtko Ursulin
On 14/08/2018 15:59, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-08-14 15:40:58) From: Chris Wilson We want to allow userspace to reconfigure the subslice configuration for its own use case. To do so, we expose a context parameter to allow adjustment of the RPCS register stored within

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-14 Thread Lionel Landwerlin
On 14/08/18 17:05, Lionel Landwerlin wrote: On 14/08/18 16:18, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-08-14 16:11:36) On 14/08/18 15:59, Chris Wilson wrote: And I'd still recommend not using indirect access if we can apply the changes immediately. -Chris Hangs on Gen9 :( How

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-14 Thread Lionel Landwerlin
On 14/08/18 16:18, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-08-14 16:11:36) On 14/08/18 15:59, Chris Wilson wrote: And I'd still recommend not using indirect access if we can apply the changes immediately. -Chris Hangs on Gen9 :( How does modifying the context image of an idle

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-14 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-08-14 15:40:58) > +static int > +i915_gem_context_reconfigure_sseu(struct i915_gem_context *ctx, > + struct intel_engine_cs *engine, > + struct intel_sseu sseu) > +{ > + struct drm_i915_private *i915

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-14 Thread Chris Wilson
Quoting Lionel Landwerlin (2018-08-14 16:11:36) > On 14/08/18 15:59, Chris Wilson wrote: > > And I'd still recommend not using indirect access if we can apply the > > changes immediately. > > -Chris > > > > Hangs on Gen9 :( How does modifying the context image of an idle (unpinned) context cause

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-14 Thread Lionel Landwerlin
On 14/08/18 15:59, Chris Wilson wrote: And I'd still recommend not using indirect access if we can apply the changes immediately. -Chris Hangs on Gen9 :( - Lionel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-08-14 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-08-14 15:40:58) > From: Chris Wilson > > We want to allow userspace to reconfigure the subslice configuration for > its own use case. To do so, we expose a context parameter to allow > adjustment of the RPCS register stored within the context image (and > currently

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-09 Thread Lionel Landwerlin
On 08/05/18 21:56, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-05-03 18:18:43) On 25/04/2018 12:45, Lionel Landwerlin wrote: From: Chris Wilson We want to allow userspace to reconfigure the subslice configuration for its own use case. To do so, we expose a

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-08 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-05-03 18:18:43) > > On 25/04/2018 12:45, Lionel Landwerlin wrote: > > From: Chris Wilson > > > > We want to allow userspace to reconfigure the subslice configuration for > > its own use case. To do so, we expose a context parameter to allow

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-08 Thread Rogozhkin, Dmitry V
:tvrtko.ursu...@linux.intel.com] Sent: Tuesday, May 8, 2018 1:25 AM To: Rogozhkin, Dmitry V <dmitry.v.rogozh...@intel.com>; Landwerlin, Lionel G <lionel.g.landwer...@intel.com>; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configurati

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-08 Thread Tvrtko Ursulin
batch buffers? Regards, Tvrtko *From:*Landwerlin, Lionel G *Sent:* Friday, May 4, 2018 9:25 AM *To:* Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com>; intel-gfx@lists.freedesktop.org; Rogozhkin, Dmitry V <dmitry.v.rogozh...@intel.com> *Subject:* Re: [Intel-gfx] [PATCH 8/8] drm/

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-07 Thread Rogozhkin, Dmitry V
in, Dmitry V <dmitry.v.rogozh...@intel.com> Subject: Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace On 03/05/18 18:18, Tvrtko Ursulin wrote: +int intel_lr_context_set_sseu(struct i915_gem_context *ctx, + struct intel

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-04 Thread Lionel Landwerlin
On 03/05/18 18:18, Tvrtko Ursulin wrote:   +int intel_lr_context_set_sseu(struct i915_gem_context *ctx, +  struct intel_engine_cs *engine, +  struct i915_gem_context_sseu *sseu) +{ +    struct drm_i915_private *dev_priv = ctx->i915; +    struct intel_context *ce;

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-03 Thread Tvrtko Ursulin
On 25/04/2018 12:45, Lionel Landwerlin wrote: From: Chris Wilson We want to allow userspace to reconfigure the subslice configuration for its own use case. To do so, we expose a context parameter to allow adjustment of the RPCS register stored within the context

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-03 Thread Tvrtko Ursulin
On 03/05/2018 17:04, Joonas Lahtinen wrote: Quoting Lionel Landwerlin (2018-04-26 13:22:30) On 26/04/18 11:00, Joonas Lahtinen wrote: Quoting Lionel Landwerlin (2018-04-25 14:45:21) From: Chris Wilson We want to allow userspace to reconfigure the subslice

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-03 Thread Lionel Landwerlin
On 03/05/18 17:04, Joonas Lahtinen wrote: Quoting Lionel Landwerlin (2018-04-26 13:22:30) On 26/04/18 11:00, Joonas Lahtinen wrote: Quoting Lionel Landwerlin (2018-04-25 14:45:21) From: Chris Wilson We want to allow userspace to reconfigure the subslice

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-03 Thread Chris Wilson
Quoting Joonas Lahtinen (2018-05-03 17:04:31) > More advanced tactics would include scheduling work so that we try to > avoid the slice count changes and deduct the switching time from the > execution budget of the app requesting less slices (if we had fair > time slicing). Have you been peeking

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-05-03 Thread Joonas Lahtinen
Quoting Lionel Landwerlin (2018-04-26 13:22:30) > On 26/04/18 11:00, Joonas Lahtinen wrote: > > Quoting Lionel Landwerlin (2018-04-25 14:45:21) > >> From: Chris Wilson > >> > >> We want to allow userspace to reconfigure the subslice configuration for > >> its own use

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-04-26 Thread Lionel Landwerlin
On 26/04/18 11:00, Joonas Lahtinen wrote: Quoting Lionel Landwerlin (2018-04-25 14:45:21) From: Chris Wilson We want to allow userspace to reconfigure the subslice configuration for its own use case. To do so, we expose a context parameter to allow adjustment of the

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-04-26 Thread Joonas Lahtinen
Quoting Lionel Landwerlin (2018-04-25 14:45:21) > From: Chris Wilson > > We want to allow userspace to reconfigure the subslice configuration for > its own use case. To do so, we expose a context parameter to allow > adjustment of the RPCS register stored within the