Re: [Intel-gfx] [v2 02/14] drm: Add CEA extended tag blocks and HDR bitfield macros

2019-01-07 Thread Shankar, Uma


>-Original Message-
>From: Sharma, Shashank
>Sent: Thursday, December 20, 2018 11:38 PM
>To: Shankar, Uma ; intel-gfx@lists.freedesktop.org;
>dri-de...@lists.freedesktop.org
>Cc: Lankhorst, Maarten ; Syrjala, Ville
>; brian.star...@arm.com
>Subject: Re: [v2 02/14] drm: Add CEA extended tag blocks and HDR bitfield
>macros
>
>Regards
>
>Shashank
>
>
>On 12/12/2018 2:08 AM, Uma Shankar wrote:
>> Add bit field and macro for extended tag in CEA block. Also, declare
>> macros for HDR metadata block.
>This should have been a part of patch, where these macros are being used, so
>that we can see it being used properly. While re-basing can you please merge ?

Idea was to define all new block additions and bit fields in 1 patch. But will 
add to
respective patches where they are getting used as you mentioned.

>> v2: Rebase
>>
>> Signed-off-by: Uma Shankar 
>> ---
>>   drivers/gpu/drm/drm_edid.c | 16 
>>   1 file changed, 16 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
>> index b506e36..106fd38 100644
>> --- a/drivers/gpu/drm/drm_edid.c
>> +++ b/drivers/gpu/drm/drm_edid.c
>> @@ -2843,6 +2843,22 @@ static int drm_cvt_modes(struct drm_connector
>*connector,
>>   #define EDID_CEA_YCRCB422  (1 << 4)
>>   #define EDID_CEA_VCDB_QS   (1 << 6)
>>
>> +#define DATA_BLOCK_EXTENDED_TAG 0x07
>Alignment should be one tab back, also I think we already have added
>extended tag macro (for parsing YCBCR420 blocks)

Ok, will drop this.

>> +#define VIDEO_CAPABILITY_DATA_BLOCK 0x0
>> +#define VSVD_DATA_BLOCK 0x1
>Alignment one tab back

This is some editor issue, change looks ok on applying. Will recheck
while rebasing.

>> +#define COLORIMETRY_DATA_BLOCK  0x5
>> +#define HDR_STATIC_METADATA_BLOCK   0x6
>> +
>> +/* HDR Metadata Block: Bit fields */
>> +#define SUPPORTED_EOTF_MASK0x3f
>> +#define TRADITIONAL_GAMMA_SDR  (0x1 << 0)
>> +#define TRADITIONAL_GAMMA_HDR  (0x1 << 1)
>> +#define SMPTE_ST2084   (0x1 << 2)
>> +#define FUTURE_EOTF(0x1 << 3)
>why not properly call it HLG if we are adding a bit for it already ?

Ok. Will update.

Regards,
Uma Shankar

>> +#define RESERVED_EOTF  (0x3 << 4)
>> +
>> +#define STATIC_METADATA_TYPE1  (0x1 << 0)
>> +
>>   /*
>>* Search EDID for CEA extension block.
>>*/
>- Shashank
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Re: [Intel-gfx] [v2 02/14] drm: Add CEA extended tag blocks and HDR bitfield macros

2018-12-20 Thread Sharma, Shashank

Regards

Shashank


On 12/12/2018 2:08 AM, Uma Shankar wrote:

Add bit field and macro for extended tag in CEA block. Also,
declare macros for HDR metadata block.
This should have been a part of patch, where these macros are being 
used, so that we can see it being used properly. While re-basing can you 
please merge ?

v2: Rebase

Signed-off-by: Uma Shankar 
---
  drivers/gpu/drm/drm_edid.c | 16 
  1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index b506e36..106fd38 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2843,6 +2843,22 @@ static int drm_cvt_modes(struct drm_connector *connector,
  #define EDID_CEA_YCRCB422 (1 << 4)
  #define EDID_CEA_VCDB_QS  (1 << 6)
  
+#define DATA_BLOCK_EXTENDED_TAG		0x07
Alignment should be one tab back, also I think we already have added 
extended tag macro (for parsing YCBCR420 blocks)

+#define VIDEO_CAPABILITY_DATA_BLOCK0x0
+#define VSVD_DATA_BLOCK0x1

Alignment one tab back

+#define COLORIMETRY_DATA_BLOCK 0x5
+#define HDR_STATIC_METADATA_BLOCK  0x6
+
+/* HDR Metadata Block: Bit fields */
+#define SUPPORTED_EOTF_MASK0x3f
+#define TRADITIONAL_GAMMA_SDR  (0x1 << 0)
+#define TRADITIONAL_GAMMA_HDR  (0x1 << 1)
+#define SMPTE_ST2084   (0x1 << 2)
+#define FUTURE_EOTF(0x1 << 3)

why not properly call it HLG if we are adding a bit for it already ?

+#define RESERVED_EOTF  (0x3 << 4)
+
+#define STATIC_METADATA_TYPE1  (0x1 << 0)
+
  /*
   * Search EDID for CEA extension block.
   */

- Shashank
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