[PATCH v3 12/12] iommu/exynos: add debugfs entries for System MMU

This commit adds debugfs directory and nodes for inspecting internal state of System MMU. Change-Id: I4afcdd925609d381e7329ec118ffe52e38dc340e Signed-off-by: KyongHo Cho --- drivers/iommu/exynos-iommu.c | 204 +-- 1 file changed, 198 insertions(+), 6 delet

[PATCH v3 11/12] iommu/exynos: add literal name of System MMU for debugging

This commit adds System MMU name to the driver data of each System MMU. It is used by fault information. Change-Id: If6720b69609880873ebaf160188f1e726a67b806 Signed-off-by: KyongHo Cho --- drivers/iommu/exynos-iommu.c | 100 --- 1 file changed, 76 insertio

[PATCH v3 10/12] iommu/exynos: add support for System MMU 3.2 and 3.3

Since System MMU 3.2 and 3.3 have more prefetch buffers than 2, the existing function to set prefetch buffers, exynos_sysmmu_set_prefbuf() is not able to support them. This commit removes exynos_sysmmu_set_prefbuf() and introduces new interface, exynos_sysmmu_set_pbuf() that can pass information of

[PATCH v3 09/12] iommu/exynos: add supoort for runtime pm and suspend/resume

This change enables the client device drivers not to care about the state of System MMU since the internal state of System MMU is controlled by the runtime PM and suspend/resume callback functions. Change-Id: Ic04c8f259d8b8af2846175dd7b98dbc4e463c96e Signed-off-by: KyongHo Cho --- drivers/iommu/

[PATCH v3 08/12] iommu/exynos: set System MMU as the parent of client device

This commit sets System MM as the parent of the client device for power management. If System MMU is the parent of a device, it is guaranteed that System MMU is suspended later than the device and resumed earlier. Runtime suspend/resume on the device is also propagated to the System MMU. If a devic

[PATCH v3 07/12] iommu/exynos: change rwlock to spinlock

Since acquiring read_lock is not more frequent than write_lock, it is not beneficial to use rwlock, this commit changes rwlock to spinlock. Change-Id: Ia3365ccec0744e735b71f0389e5c56a0243bcd2c Signed-off-by: KyongHo Cho --- drivers/iommu/exynos-iommu.c | 32 1 fi

[PATCH v3 06/12] iommu/exynos: allocate lv2 page table from own slab

Since kmalloc() does not guarantee the alignment of 1KB when it allocates 1KB, it is required to allocate lv2 page table from own slab that guarantees alignment of 1KB. Change-Id: Ia25642c7c0143d2c50a8ed5a3d0dd9067f324c4e Signed-off-by: KyongHo Cho --- drivers/iommu/exynos-iommu.c | 24 +

[PATCH v3 05/12] iommu/exynos: pass version information from DT

System MMUs in some implementation of Exynos core does not include correct version information in the System MMU. If the version information is not correct, exynos-iommu driver cannot take advantages of feature of higher versions of System MMu like prefetching page table entries prior to TLB miss.

[PATCH v3 04/12] iommu/exynos: support for device tree

This commit adds device tree support for System MMU. Change-Id: If695448af4bd7829ad1543814281dfa8ce1e7aae Signed-off-by: KyongHo Cho --- drivers/iommu/Kconfig| 2 +- drivers/iommu/exynos-iommu.c | 289 ++- 2 files changed, 177 insertions(+), 114

[PATCH v3 03/12] ARM: EXYNOS: add System MMU definition to DT

This commit adds System MMU nodes to DT of Exynos SoCs. Change-Id: I30ea7adcc9c0ded876618f372ed1a5c5e935ee20 Signed-off-by: KyongHo Cho --- .../devicetree/bindings/arm/exynos/system-mmu.txt | 86 arch/arm/boot/dts/exynos4210.dtsi | 96 ++ arch/arm/boo

[PATCH v3 02/12] ARM: EXYNOS: Add clk_ops for gating clocks of System MMU

Touching some System MMU needs its master devices' clock to be enabled before. This commit adds clk_ops.set_parent of gating clocks of System MMU to ensure gating clocks of System MMU's mater devices are enabled when enabling gating clocks of System MMU. Change-Id: Icd58b12f599e92692c032516331a444

[PATCH v3 01/12] ARM: EXYNOS: remove system mmu initialization from exynos tree

This removes System MMU initialization from arch/arm/mach-exynos/ to move them to DT and the exynos-iommu driver except gating clock definitions. Change-Id: Ie29f587c01c645f28fc0e0b94eb3631a0170ebf5 Signed-off-by: KyongHo Cho --- arch/arm/mach-exynos/Kconfig | 5 - arch/arm/mach-

[PATCH v3 00/12] iommu/exynos: Fixes and Enhancements of System MMU driver with DT

The current exynos-iommu(System MMU) driver does not work autonomously since it is lack of support for power management of peripheral blocks. For example, MFC device driver must ensure that its System MMU is disabled before MFC block is power-down not to invalidate IOTLB in the System MMU when I/O

Re: [PATCH 4/4 v5] iommu/fsl: Freescale PAMU driver and IOMMU API implementation.

Varun Sethi wrote: > diff --git a/drivers/iommu/fsl_pamu.h b/drivers/iommu/fsl_pamu.h > new file mode 100644 > index 000..6d32fb5 > --- /dev/null > +++ b/drivers/iommu/fsl_pamu.h > @@ -0,0 +1,398 @@ > +/* > + * This program is free software; you can redistribute it and/or modify > + * it unde

Re: [PATCH v4] intel-iommu: Prevent devices with RMRRs from being placed into SI Domain

On 11/20/2012 02:43 PM, Tom Mingarelli wrote: This patch is to prevent non-USB devices that have RMRRs associated with them from being placed into the SI Domain during init. This fixes the issue where the RMRR info for devices being placed in and out of the SI Domain gets lost. Signed-off-by:

Re: [PATCH v4] intel-iommu: Prevent devices with RMRRs from being placed into SI Domain

On Tue, 2012-11-20 at 19:43 +, Tom Mingarelli wrote: > This patch is to prevent non-USB devices that have RMRRs associated with them > from > being placed into the SI Domain during init. This fixes the issue where the > RMRR info > for devices being placed in and out of the SI Domain gets los

[PATCH v4] intel-iommu: Prevent devices with RMRRs from being placed into SI Domain

This patch is to prevent non-USB devices that have RMRRs associated with them from being placed into the SI Domain during init. This fixes the issue where the RMRR info for devices being placed in and out of the SI Domain gets lost. Signed-off-by: Thomas Mingarelli Tested-by: Shuah Khan --- PA

[git pull] IOMMU Fixes for v3.7-rc6

Hi Linus, The following changes since commit f4a75d2eb7b1e2206094b901be09adb31ba63681: Linux 3.7-rc6 (2012-11-16 17:42:40 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git tags/iommu-fixes-v3.7-rc6 for you to fetch changes up to 3d

[PATCH 3/4 v5] iommu/fsl: Add iommu domain attributes required by fsl PAMU driver.

Added the following domain attributes required by FSL PAMU driver: 1. Subwindows field added to the iommu domain geometry attribute. 2. Added new iommu stash attribute, which allows setting of the LIODN specific stash id parameter through IOMMU API. 3. Added an attribute for enabling/disabling D

[PATCH 2/4] iommu/fsl: Add PAMU bypass enable register to ccsr_guts structure.

PAMU bypass enable register added to the ccsr_guts structure. Signed-off-by: Timur Tabi Signed-off-by: Varun Sethi --- arch/powerpc/include/asm/fsl_guts.h |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/

[PATCH 1/4 v2] iommu/fsl: Store iommu domain information pointer in archdata.

Add a new field in the device (powerpc) archdata structure for storing iommu domain information pointer. This pointer is stored when the device is attached to a particular domain. Signed-off-by: Varun Sethi --- arch/powerpc/include/asm/device.h |4 1 files changed, 4 insertions(+), 0

[PATCH 0/4] iommu/fsl: Freescale PAMU driver and IOMMU API implementation.

This patchset provides the Freescale PAMU (Peripheral Access Management Unit) driver and the corresponding IOMMU API implementation. PAMU is the IOMMU present on Freescale QorIQ platforms. PAMU can authorize memory access, remap the memory address, and remap the I/O transaction type. This set

[PATCH 14/19] x86, io-apic: Remove !irq_remapped() check from __target_IO_APIC_irq()

This function is only called from default_ioapic_set_affinity() which is only used when interrupt remapping is disabled since the introduction of the set_affinity function pointer. So the check will always evaluate as true and can be removed. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrze

[PATCH 13/19] x86, io-apic: Move CONFIG_IRQ_REMAP code out of x86 core

Move all the code to either to the header file asm/irq_remapping.h or to drivers/iommu/. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/hw_irq.h|1 + arch/x86/include/asm/io_apic.h |5 arch/x86/include/asm/irq_remapping.h |

[PATCH 10/19] x86, io_apic: Remove irq_remapping_enabled check in setup_timer_IRQ0_pin

This function is only called when irq-remapping is disabled. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/kernel/apic/io_apic.c |3 --- 1 file changed, 3 deletions(-) diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index edaa528.

[PATCH 08/19] x86, io_apic: Convert setup_ioapic_entry to function pointer

This pointer is changed to a different function when IRQ remapping is enabled. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/io_apic.h |5 + arch/x86/include/asm/x86_init.h |5 + arch/x86/kernel/apic/io_apic.c | 14 +- a

[PATCH 17/19] x86, msi: Introduce x86_msi.compose_msi_msg call-back

This call-back points to the right function for initializing the msi_msg structure. The old code for msi_msg generation was split up into the irq-remapped and the default case. The irq-remapped case just calls into the specific Intel or AMD implementation when the device is behind an IOMMU. Otherw

[PATCH 12/19] x86, irq: Add data structure to keep AMD specific irq remapping information

Add a data structure to store information the IOMMU driver can use to get from a 'struct irq_cfg' to the remapping entry. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/hw_irq.h | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff

[PATCH 18/19] x86, io_apic: Introduce eoi_ioapic_pin call-back

This callback replaces the old __eoi_ioapic_pin function which needs a special path for interrupt remapping. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/io_apic.h |5 + arch/x86/include/asm/x86_init.h |1 + arch/x86/kernel/apic/io_apic.c

[PATCH 11/19] x86, irq: Move irq_remapping_enabled declaration to iommu code

Remove the last left-over from this flag from x86 code. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/irq_remapping.h |4 drivers/iommu/dmar.c |2 ++ drivers/iommu/intel-iommu.c |2 ++ drivers/iommu/irq_remappi

[PATCH 15/19] x86, irq: Move irq_remapped() check into free_remapped_irq

The function is called unconditionally now in IO-APIC code removing another irq_remapped() check from x86 core code. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/kernel/apic/io_apic.c |4 ++-- drivers/iommu/irq_remapping.c |5 - 2 files changed, 6 in

[PATCH 16/19] x86, irq: Introduce setup_remapped_irq()

This function does irq-remapping specific interrupt setup like modifying the chip defaults. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/irq_remapping.h |9 + arch/x86/kernel/apic/io_apic.c | 13 +++-- drivers/iommu/irq_rem

[PATCH 19/19] x86, irq: Move irq_remapped out of x86 core code

The irq_remapped function is only used in IOMMU code after the last patch. So move its definition there too. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/irq_remapping.h | 10 -- drivers/iommu/irq_remapping.c|5 + 2 files cha

[PATCH 09/19] x86, io_apic: Move irq_remapping_enabled checks out of check_timer()

Move these checks to IRQ remapping code by introducing the panic_on_irq_remap() function. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/irq_remapping.h |5 + arch/x86/kernel/apic/io_apic.c |6 ++ drivers/iommu/irq_remapping.c

[PATCH 07/19] x86, io_apic: Introduce set_affinity function pointer

With interrupt remapping a special function is used to change the affinity of an IO-APIC interrupt. Abstract this with a function pointer. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/io_apic.h |4 arch/x86/include/asm/irq_remapping.h |

[PATCH 05/19] x86, hpet: Introduce x86_msi_ops.setup_hpet_msi

This function pointer can be overwritten by the IRQ remapping code. The irq_remapping_enabled check can be removed from default_setup_hpet_msi. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/hpet.h |5 +++-- arch/x86/include/asm/x86_init.h |

[PATCH 06/19] x86, msi: Use IRQ remapping specific setup_msi_irqs routine

Use seperate routines to setup MSI IRQs for both irq_remapping_enabled cases. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/irq_remapping.h | 12 --- arch/x86/include/asm/pci.h |2 ++ arch/x86/kernel/apic/io_apic.c | 26 ++--

[PATCH 04/19] x86, io_apic: Introduce x86_io_apic_ops.print_entries for debugging

This call-back is used to dump IO-APIC entries for debugging purposes into the kernel log. VT-d needs a special routine for this and will overwrite the default. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/include/asm/io_apic.h |3 + arch/x86/include/asm

[PATCH 03/19] x86, io_apic: Introduce x86_io_apic_ops.disable()

This function pointer is used to call a system-specific function for disabling the IO-APIC. Currently this is used for IRQ remapping which has its own disable routine. Also introduce the necessary infrastructure in the interrupt remapping code to overwrite this and other function pointers as neces

[PATCH 01/19] x86, apic: Move irq_remapping_enabled checks into IRQ-remapping code

Move the three easy to move checks in the x86' apic.c file into the IRQ-remapping code. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/kernel/apic/apic.c |9 +++-- drivers/iommu/irq_remapping.c | 11 +-- 2 files changed, 12 insertions(+), 8 dele

[PATCH 02/19] x86, apic: Mask IO-APIC and PIC unconditionally on LAPIC resume

IO-APIC and PIC use the same resume routines when IRQ remapping is enabled or disabled. So it should be safe to mask the other APICs for the IRQ-remapping-disabled case too. Signed-off-by: Joerg Roedel Acked-by: Sebastian Andrzej Siewior --- arch/x86/kernel/apic/apic.c | 19 +-

[PATCH 00/19 v4] Improve IRQ remapping abstraction in x86 core code

Hi, here is the fourth version of the patch-set to improve the abstraction of interrupt remapping in the x86 core code. A more detailed description can be found in the original post at: https://lkml.org/lkml/2012/8/7/317 Changes from v3->v4: * Rebased to v3.7-rc6 * Added

[PATCH v2 09/12] iommu/exynos: add supoort for runtime pm and suspend/resume

On Tue, Nov 20, 2012 at 5:03 PM, Prathyush K wrote: > On Tue, Nov 20, 2012 at 1:00 PM, Cho KyongHo wrote: >> >> This change enables the client device drivers not to care about >> the state of System MMU since the internal state of System MMU >> is controlled by the runtime PM and suspend/resume c

Re: [PATCH v2 09/12] iommu/exynos: add supoort for runtime pm and suspend/resume

On Tue, Nov 20, 2012 at 1:00 PM, Cho KyongHo wrote: > This change enables the client device drivers not to care about > the state of System MMU since the internal state of System MMU > is controlled by the runtime PM and suspend/resume callback functions. > > Signed-off-by: KyongHo Cho > --- >