Hi Joerg,
Please can you pull the following arm-smmu changes for 3.15?
The main changes are for accessing the buggy Calxeda SMMU, which is wired
as secure despite being non-secure. Unfortunately, the apparent demise
of Calxeda means that Andreas is no longer working on this, so I had to
extract
Hello,
This patch set adds a new driver for the Renesas IOMMU found in the R-Car H2
(r8a7790) and R-Car M2 (r8a7791) SoCs. Despite being called IPMMU like the
IOMMU present in older ARM Sh Mobile SoCs, the hardware has nothing in common
with the previous versions and thus requires a separate
Not-Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
---
arch/arm/mach-shmobile/board-koelsch-reference.c | 30
1 file changed, 30 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c
Instead of walking the list of registered SMMU devices at remove time to
locate the device being removed, set platform driver data at probe time
to point to the SMMU and retrieve the pointer at remove time.
Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
---
The IOMMU core expects the unmap operation to return the number of bytes
that have been unmapped or 0 on failure, a negative return value being
treated like a number of bytes.
Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
---
drivers/iommu/arm-smmu.c | 2 +-
1 file
On Fri, Feb 21, 2014 at 11:16 AM, Will Deacon will.dea...@arm.com wrote:
+- calxeda,smmu-secure-config-access : Enable proper handling of buggy
+ implementations that always use secure access to
+ SMMU configuration registers. In this case non-secure
+
On Fri, Feb 28, 2014 at 04:17:43PM +, Timur Tabi wrote:
On Fri, Feb 21, 2014 at 11:16 AM, Will Deacon will.dea...@arm.com wrote:
+- calxeda,smmu-secure-config-access : Enable proper handling of buggy
+ implementations that always use secure access to
+
Hi Laurent,
On Fri, Feb 28, 2014 at 03:37:09PM +, Laurent Pinchart wrote:
Instead of walking the list of registered SMMU devices at remove time to
locate the device being removed, set platform driver data at probe time
to point to the SMMU and retrieve the pointer at remove time.
What
On Fri, Feb 28, 2014 at 03:37:10PM +, Laurent Pinchart wrote:
The IOMMU core expects the unmap operation to return the number of bytes
that have been unmapped or 0 on failure, a negative return value being
treated like a number of bytes.
Makes sense, thanks. It's a pity we can't propagate
On Fri, Feb 28, 2014 at 4:24 PM, Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com wrote:
+/*
+ * VMSA that states in section B3.6.3 Control of Secure or Non-secure memory
VMSA states
+ * access, Long-descriptor format that the NStable bit being set in a table
+ * descriptor will
Paul,
On 02/28/2014 01:58 PM, Paul Walmsley wrote:
On Thu, 13 Feb 2014, Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
CONFIG_OMAP_IOMMU_IVA2 was defined originally to avoid conflicting
usage by tidspbridge and other iommu users. The same can be achieved
by marking the DT
Use the various devm_ interfaces to simplify the cleanup in
probe and remove functions.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Signed-off-by: Suman Anna s-a...@ti.com
Acked-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
drivers/iommu/omap-iommu.c | 52
From: Laurent Pinchart laurent.pinch...@ideasonboard.com
The OMAP IOMMU driver locates the IOMMU associated to a device using the
IOMMU name stored in the device archdata iommu field. That field is
expected to be populated by platform code and is left unset for DT-based
devices. This results in a
The remoteproc MMUs in OMAP4+ SoCs have some additional debug
registers that can give out the PC value in addition to the
MMU fault address. The PC value can be extracted properly only
on the DSP cores, and is not available on the ARM processors
within the IPU sub-systems. Instead, the MMUs have
OMAP5 has the same iommus as OMAP4, so extend the OMAP4
iommu pdata quirks for OMAP5 as well.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/pdata-quirks.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-omap2/pdata-quirks.c
From: Florian Vaussard florian.vauss...@epfl.ch
Add the IOMMU nodes for the DSP and IPU subsystems. The MMU
within the IPU sub-system also supports a bus error back
capability, not available on the DSP MMU.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
[s-a...@ti.com: IPU bus error
The IOMMU DT nodes have been added for the DSP and IPU
subsystems. The MMUs in OMAP5 are identical to those in
OMAP4, including the bus error back capability on IPU.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 15 +++
1 file changed, 15 insertions(+)
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